diff --git a/.gitignore b/.gitignore index 122bac3..040c678 100644 --- a/.gitignore +++ b/.gitignore @@ -1,3 +1,5 @@ case/.DS_Store .DS_Store + +*.FCBak diff --git a/README.md b/README.md index 8341ad7..bd00a44 100644 --- a/README.md +++ b/README.md @@ -8,3 +8,17 @@ original Tetris, or do some die-hard computing on 2.11BSD. Well, someone had to put back the 'mini' in 'minicomputer', right? +--- + +This fork contains a set of patches to correct build errors in IDF 5.0 +Ian Schofield (Isysxp) +October 2023 + +--- + +This fork integrates the sunton ESP32 2832S028 board. I try to do this in a way it simplifys the integration of other boards. +Patched for IDF 5.2.1 + +SvenMb +April 2024 + diff --git a/pcb/.gitignore b/boards/Spritetm_final/.gitignore similarity index 100% rename from pcb/.gitignore rename to boards/Spritetm_final/.gitignore diff --git a/case/README.md b/boards/Spritetm_final/case/README.md similarity index 100% rename from case/README.md rename to boards/Spritetm_final/case/README.md diff --git a/case/digital_badge.svg b/boards/Spritetm_final/case/digital_badge.svg similarity index 100% rename from case/digital_badge.svg rename to boards/Spritetm_final/case/digital_badge.svg diff --git a/case/source-images/digital_badge.png b/boards/Spritetm_final/case/source-images/digital_badge.png similarity index 100% rename from case/source-images/digital_badge.png rename to boards/Spritetm_final/case/source-images/digital_badge.png diff --git a/case/source-images/digital_badge.xcf b/boards/Spritetm_final/case/source-images/digital_badge.xcf similarity index 100% rename from case/source-images/digital_badge.xcf rename to boards/Spritetm_final/case/source-images/digital_badge.xcf diff --git a/case/source-images/digital_vt100-7349.jpg b/boards/Spritetm_final/case/source-images/digital_vt100-7349.jpg similarity index 100% rename from case/source-images/digital_vt100-7349.jpg rename to boards/Spritetm_final/case/source-images/digital_vt100-7349.jpg diff --git a/case/source-images/digital_vt100-7349.xcf b/boards/Spritetm_final/case/source-images/digital_vt100-7349.xcf similarity index 100% rename from case/source-images/digital_vt100-7349.xcf rename to boards/Spritetm_final/case/source-images/digital_vt100-7349.xcf diff --git a/case/source-images/digital_vt100-back-7363.jpg b/boards/Spritetm_final/case/source-images/digital_vt100-back-7363.jpg similarity index 100% rename from case/source-images/digital_vt100-back-7363.jpg rename to boards/Spritetm_final/case/source-images/digital_vt100-back-7363.jpg diff --git a/case/source-images/digital_vt100-back-7363.xcf b/boards/Spritetm_final/case/source-images/digital_vt100-back-7363.xcf similarity index 100% rename from case/source-images/digital_vt100-back-7363.xcf rename to boards/Spritetm_final/case/source-images/digital_vt100-back-7363.xcf diff --git a/case/source-images/digital_vt100-side-7362.jpg b/boards/Spritetm_final/case/source-images/digital_vt100-side-7362.jpg similarity index 100% rename from case/source-images/digital_vt100-side-7362.jpg rename to boards/Spritetm_final/case/source-images/digital_vt100-side-7362.jpg diff --git a/case/source-images/digital_vt100-side-7362.xcf b/boards/Spritetm_final/case/source-images/digital_vt100-side-7362.xcf similarity index 100% rename from case/source-images/digital_vt100-side-7362.xcf rename to boards/Spritetm_final/case/source-images/digital_vt100-side-7362.xcf diff --git a/case/vt100.scad b/boards/Spritetm_final/case/vt100.scad similarity index 100% rename from case/vt100.scad rename to boards/Spritetm_final/case/vt100.scad diff --git a/pcb/datasheet/1810301220_HRS-Hirose-DM3AT-SF-PEJM5_C114218.pdf b/boards/Spritetm_final/datasheet/1810301220_HRS-Hirose-DM3AT-SF-PEJM5_C114218.pdf similarity index 100% rename from pcb/datasheet/1810301220_HRS-Hirose-DM3AT-SF-PEJM5_C114218.pdf rename to boards/Spritetm_final/datasheet/1810301220_HRS-Hirose-DM3AT-SF-PEJM5_C114218.pdf diff --git a/pcb/datasheet/ESP-WROVER-KIT_V4_1.pdf b/boards/Spritetm_final/datasheet/ESP-WROVER-KIT_V4_1.pdf similarity index 100% rename from pcb/datasheet/ESP-WROVER-KIT_V4_1.pdf rename to boards/Spritetm_final/datasheet/ESP-WROVER-KIT_V4_1.pdf diff --git a/pcb/datasheet/HT78xxv150.pdf b/boards/Spritetm_final/datasheet/HT78xxv150.pdf similarity index 100% rename from pcb/datasheet/HT78xxv150.pdf rename to boards/Spritetm_final/datasheet/HT78xxv150.pdf diff --git a/pcb/datasheet/KD018QVFMN010 SPEC V1.2.pdf b/boards/Spritetm_final/datasheet/KD018QVFMN010 SPEC V1.2.pdf similarity index 100% rename from pcb/datasheet/KD018QVFMN010 SPEC V1.2.pdf rename to boards/Spritetm_final/datasheet/KD018QVFMN010 SPEC V1.2.pdf diff --git a/pcb/datasheet/Startek's Main products for Dear Clients V1.0.pdf b/boards/Spritetm_final/datasheet/Startek's Main products for Dear Clients V1.0.pdf similarity index 100% rename from pcb/datasheet/Startek's Main products for Dear Clients V1.0.pdf rename to boards/Spritetm_final/datasheet/Startek's Main products for Dear Clients V1.0.pdf diff --git a/pcb/datasheet/TP4056.pdf b/boards/Spritetm_final/datasheet/TP4056.pdf similarity index 100% rename from pcb/datasheet/TP4056.pdf rename to boards/Spritetm_final/datasheet/TP4056.pdf diff --git a/pcb/esppdp-cache.lib b/boards/Spritetm_final/esppdp-cache.lib similarity index 100% rename from pcb/esppdp-cache.lib rename to boards/Spritetm_final/esppdp-cache.lib diff --git a/pcb/esppdp.kicad_pcb b/boards/Spritetm_final/esppdp.kicad_pcb similarity index 100% rename from pcb/esppdp.kicad_pcb rename to boards/Spritetm_final/esppdp.kicad_pcb diff --git a/pcb/esppdp.pro b/boards/Spritetm_final/esppdp.pro similarity index 100% rename from pcb/esppdp.pro rename to boards/Spritetm_final/esppdp.pro diff --git a/pcb/esppdp.sch b/boards/Spritetm_final/esppdp.sch similarity index 100% rename from pcb/esppdp.sch rename to boards/Spritetm_final/esppdp.sch diff --git a/pcb/fp-info-cache b/boards/Spritetm_final/fp-info-cache similarity index 100% rename from pcb/fp-info-cache rename to boards/Spritetm_final/fp-info-cache diff --git a/boards/Sunton_2832S028/README.md b/boards/Sunton_2832S028/README.md new file mode 100644 index 0000000..66782e6 --- /dev/null +++ b/boards/Sunton_2832S028/README.md @@ -0,0 +1,25 @@ +# Sunton ESP32 2832S028 + +The Sunton ESP32 2832S028 is avaiable for very cheap and integrates most of the needed hardware to run this PDP11 emulator. +Unfortunately they decided not to include PSRAM, so we have to add it to the board. But it is not that complicated. + +I only have the newer version of this board with a ST7789 display, so you are are bit on yourself if you want to use the +older version with ILI9341, since the board layout changed. + +## Modifications + +Board before modification: +![pre modification](pre.png) + +You have to remove the RGB-led and cut two lines: +![LED removal and lines cut](led_removed_lines_cutted.png) + +Now you can solder the PSRAM chip and add lines to the IO16, IO17 exposed on the former led place. Also add 10k pull-up as you can see here: +![post modification](post.png) + +## flash firmware + +after flashing the firmware and inserting the sdcard with the harddrive image, BSD 2.11 will boot: +![in use](in_use.png) + + diff --git a/boards/Sunton_2832S028/case/2432S028.FCStd b/boards/Sunton_2832S028/case/2432S028.FCStd new file mode 100644 index 0000000..48b31de Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028.FCStd differ diff --git a/boards/Sunton_2832S028/case/2432S028_Bezel.FCStd b/boards/Sunton_2832S028/case/2432S028_Bezel.FCStd new file mode 100644 index 0000000..c288e48 Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_Bezel.FCStd differ diff --git a/boards/Sunton_2832S028/case/2432S028_Bezel.stl b/boards/Sunton_2832S028/case/2432S028_Bezel.stl new file mode 100644 index 0000000..4afded3 Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_Bezel.stl differ diff --git a/boards/Sunton_2832S028/case/2432S028_Pin_Boot.stl b/boards/Sunton_2832S028/case/2432S028_Pin_Boot.stl new file mode 100644 index 0000000..6509725 Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_Pin_Boot.stl differ diff --git a/boards/Sunton_2832S028/case/2432S028_Pin_Reset.stl b/boards/Sunton_2832S028/case/2432S028_Pin_Reset.stl new file mode 100644 index 0000000..224e55b Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_Pin_Reset.stl differ diff --git a/boards/Sunton_2832S028/case/2432S028_USB.stl b/boards/Sunton_2832S028/case/2432S028_USB.stl new file mode 100644 index 0000000..f65dc6e Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_USB.stl differ diff --git a/boards/Sunton_2832S028/case/2432S028_inner.FCStd b/boards/Sunton_2832S028/case/2432S028_inner.FCStd new file mode 100644 index 0000000..3b6434b Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_inner.FCStd differ diff --git a/boards/Sunton_2832S028/case/2432S028_inner.stl b/boards/Sunton_2832S028/case/2432S028_inner.stl new file mode 100644 index 0000000..920f7fb Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_inner.stl differ diff --git a/boards/Sunton_2832S028/case/2432S028_inner_03.FCStd b/boards/Sunton_2832S028/case/2432S028_inner_03.FCStd new file mode 100644 index 0000000..55d627e Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_inner_03.FCStd differ diff --git a/boards/Sunton_2832S028/case/2432S028_outer.stl b/boards/Sunton_2832S028/case/2432S028_outer.stl new file mode 100644 index 0000000..082b360 Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_outer.stl differ diff --git a/boards/Sunton_2832S028/case/2432S028_pins.FCStd b/boards/Sunton_2832S028/case/2432S028_pins.FCStd new file mode 100644 index 0000000..f698235 Binary files /dev/null and b/boards/Sunton_2832S028/case/2432S028_pins.FCStd differ diff --git a/boards/Sunton_2832S028/case/MicroSD_2432S028.stl b/boards/Sunton_2832S028/case/MicroSD_2432S028.stl new file mode 100644 index 0000000..c9edfb6 Binary files /dev/null and b/boards/Sunton_2832S028/case/MicroSD_2432S028.stl differ diff --git a/boards/Sunton_2832S028/in_use.png b/boards/Sunton_2832S028/in_use.png new file mode 100644 index 0000000..4148660 Binary files /dev/null and b/boards/Sunton_2832S028/in_use.png differ diff --git a/boards/Sunton_2832S028/led_removed_lines_cutted.png b/boards/Sunton_2832S028/led_removed_lines_cutted.png new file mode 100644 index 0000000..c2b63b2 Binary files /dev/null and b/boards/Sunton_2832S028/led_removed_lines_cutted.png differ diff --git a/boards/Sunton_2832S028/post.png b/boards/Sunton_2832S028/post.png new file mode 100644 index 0000000..acb5aaa Binary files /dev/null and b/boards/Sunton_2832S028/post.png differ diff --git a/boards/Sunton_2832S028/pre.png b/boards/Sunton_2832S028/pre.png new file mode 100644 index 0000000..2bc5d7e Binary files /dev/null and b/boards/Sunton_2832S028/pre.png differ diff --git a/firmware/.gitignore b/firmware/.gitignore index 567609b..bd4cb6d 100644 --- a/firmware/.gitignore +++ b/firmware/.gitignore @@ -1 +1,3 @@ build/ +*~ +*old diff --git a/firmware/CMakeLists.txt b/firmware/CMakeLists.txt index 960a914..c11992c 100644 --- a/firmware/CMakeLists.txt +++ b/firmware/CMakeLists.txt @@ -6,3 +6,6 @@ cmake_minimum_required(VERSION 3.5) include($ENV{IDF_PATH}/tools/cmake/project.cmake) project(esppdp) spiffs_create_partition_image(storage spiffs/ FLASH_IN_PROJECT) +set_target_properties(${COMPONENT_LIB} PROPERTIES COMPILE_FLAGS -Wformat=n) +idf_build_set_property(COMPILE_OPTIONS "-Wno-error" APPEND) + diff --git a/firmware/README.md b/firmware/README.md index 955d901..c75fd2b 100644 --- a/firmware/README.md +++ b/firmware/README.md @@ -7,7 +7,7 @@ BT device afterwards will be detected automatically. Unfortunately there's no ea the pairing to use a different keyboard without erasing the flash of the ESP32 (idf.py erase-flash). This firmware works on either the final hardware (as detailed in the ../pcb directory) as well -as a standard ESP32-Wrover-Kit development board + LCD. You can configure which board to run on +as a standard ESP32-Wrover-Kit development board + LCD and a modified Sunton 2432S028 board. You can configure which board to run on in menuconfig. (If your LCDs backlight doesn't turn on, you selected the wrong one.) The firmware embeds a floppy disk containing RTX-11 as well as Tetris, and will start this up @@ -22,3 +22,5 @@ from uploading the Tetris floppy every time. This firmware is developed on the current (11 jan 2021) master branch of ESP-IDF, but will likely compile on ESP-IDF 4.2 and possibly other versions. +As of April 2024 it is patched for latest ESP-IDF 5.2.1 and compiles with that. + diff --git a/firmware/components/boards/CMakeLists.txt b/firmware/components/boards/CMakeLists.txt new file mode 100644 index 0000000..0347e9a --- /dev/null +++ b/firmware/components/boards/CMakeLists.txt @@ -0,0 +1,4 @@ + +idf_component_register( .. + INCLUDE_DIRS "." ) + diff --git a/firmware/components/boards/hw_2432S028.h b/firmware/components/boards/hw_2432S028.h new file mode 100644 index 0000000..3d73658 --- /dev/null +++ b/firmware/components/boards/hw_2432S028.h @@ -0,0 +1,37 @@ +// HW definition for Sunton 2432S028 +// Sven Muehlberg + + +#define ESP32_2432S028R + +#define DISPLAY_WIDTH 240 +#define DISPLAY_HEIGHT 320 +#define DISPLAY_CHW 4 +#define DISPLAY_CHH 10 +#define DISPLAY_BCKL 21 +#define DISPLAY_BCKL_ON 1 +#define DISPLAY_BCKL_OFF 0 +#define DISPLAY_INVERT 0 +#define DISPLAY_ROTATE 1 + +#define DISPLAY_SPI +#define DISPLAY_SPI_HOST HSPI_HOST +#define DISPLAY_SPI_DMA SPI_DMA_CH2 +#define DISPLAY_SPI_MODE 0 +#define DISPLAY_SPI_MISO GPIO_NUM_NC +#define DISPLAY_SPI_MOSI 13 +#define DISPLAY_SPI_SCLK 14 +#define DISPLAY_SPI_CS 15 +#define DISPLAY_SPI_DC 2 +#define DISPLAY_SPI_RST GPIO_NUM_NC +#define DISPLAY_SPI_HZ 24000000 + +#define SD_SPI +#define SD_SPI_HOST SPI3_HOST +#define SD_SPI_DMA SPI_DMA_CH1 +#define SD_SPI_CS 5 +#define SD_SPI_MOSI 23 +#define SD_SPI_SCLK 18 +#define SD_SPI_MISO 19 + +// #define SD_NONE diff --git a/firmware/components/boards/hw_final.h b/firmware/components/boards/hw_final.h new file mode 100644 index 0000000..0d81e93 --- /dev/null +++ b/firmware/components/boards/hw_final.h @@ -0,0 +1,34 @@ +// HW definition for Jeroens final hardware +// Sven Muehlberg + + +#define ESP32_FINAL + +#define DISPLAY_WIDTH 240 +#define DISPLAY_HEIGHT 320 +#define DISPLAY_CHW 4 +#define DISPLAY_CHH 10 +#define DISPLAY_BCKL 5 +#define DISPLAY_BCKL_ON 1 +#define DISPLAY_BCKL_OFF 0 +#define DISPLAY_ID 1 +#define DISPLAY_INVERT 1 + +#define DISPLAY_SPI +#define DISPLAY_SPI_HOST HSPI_HOST +#define DISPLAY_SPI_DMA SPI_DMA_CH2 +#define DISPLAY_SPI_MODE 0 +#define DISPLAY_SPI_MISO GPIO_NUM_NC +#define DISPLAY_SPI_MOSI 23 +#define DISPLAY_SPI_SCLK 19 +#define DISPLAY_SPI_CS 22 +#define DISPLAY_SPI_DC 21 +#define DISPLAY_SPI_RST GPIO_NUM_NC +#define DISPLAY_SPI_HZ 24000000 + +#define SD_MMC +#define SD_MMC_CMD 15 +#define SD_MMC_D0 2 +#define SD_MMC_D1 4 +#define SD_MMC_D2 12 +#define SD_MMC_D3 13 diff --git a/firmware/components/boards/hw_wrover.h b/firmware/components/boards/hw_wrover.h new file mode 100644 index 0000000..f564a82 --- /dev/null +++ b/firmware/components/boards/hw_wrover.h @@ -0,0 +1,44 @@ +// HW definition for Jeroens wrover based hardware +// Sven Muehlberg + + +#define ESP32_WROVER + +#define DISPLAY_WIDTH 240 +#define DISPLAY_HEIGHT 320 +#define DISPLAY_CHW 4 +#define DISPLAY_CHH 10 +#define DISPLAY_BCKL 5 +#define DISPLAY_BCKL_ON 0 +#define DISPLAY_BCKL_OFF 1 +// #define DISPLAY_ID 1 +#define DISPLAY_INVERT 0 + +#define DISPLAY_SPI +#define DISPLAY_SPI_HOST HSPI_HOST +#define DISPLAY_SPI_DMA SPI_DMA_CH2 +#define DISPLAY_SPI_MODE 0 +#define DISPLAY_SPI_MISO GPIO_NUM_NC +#define DISPLAY_SPI_MOSI 23 +#define DISPLAY_SPI_SCLK 19 +#define DISPLAY_SPI_CS 22 +#define DISPLAY_SPI_DC 21 +#define DISPLAY_SPI_RST GPIO_NUM_NC +#define DISPLAY_SPI_HZ 24000000 + +// #define SD_SPI +// #define SD_SPI_HOST SPI3_HOST +// #define SD_SPI_DMA SPI_DMA_CH1 +// #define SD_SPI_CS 5 +// #define SD_SPI_MOSI 23 +// #define SD_SPI_SCLK 18 +// #define SD_SPI_MISO 19 + +#define SD_MMC +#define SD_MMC_CMD 15 +#define SD_MMC_D0 2 +#define SD_MMC_D1 4 +#define SD_MMC_D2 12 +#define SD_MMC_D3 13 + +// #define SD_NONE diff --git a/firmware/components/hid_server/CMakeLists.txt b/firmware/components/hid_server/CMakeLists.txt index a243759..4ee703a 100644 --- a/firmware/components/hid_server/CMakeLists.txt +++ b/firmware/components/hid_server/CMakeLists.txt @@ -1,5 +1,5 @@ idf_component_register(SRCS "hci_server.cpp" "hci_transport_esp32.cpp" "hid_server.cpp" REQUIRES bt - INCLUDE_DIRS ".") + INCLUDE_DIRS "." $ENV{IDF_PATH}/components/nvs_flash/include ) diff --git a/firmware/components/hid_server/hci_server.cpp b/firmware/components/hid_server/hci_server.cpp index 75b0d94..dd13d64 100644 --- a/firmware/components/hid_server/hci_server.cpp +++ b/firmware/components/hid_server/hci_server.cpp @@ -38,6 +38,10 @@ using namespace std; #define PRINTF(...) #endif +#include "esp_log.h" +#define TAG "hci_server" + + #define HCI_GRP_LINK_CONT_CMDS (0x01 << 10) // 0x0400 #define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) // 0x0800 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) // 0x0C00 @@ -509,7 +513,7 @@ class BTDevice { // this will happen before hid knows about it void hci_connected(const connection_info* ci) { - PRINTF("%s connected on handle %d\n",batostr(ci->bdaddr),ci->handle); + ESP_LOGI(TAG,"%s connected on handle %d\n",batostr(ci->bdaddr),ci->handle); _handle = ci->handle; } @@ -575,7 +579,7 @@ class BTDevice { void control(const l2cap_cmd* c) { - PRINTF("acl recv:%d %s %d:%d:%d:%d len:%d\n",c->id,L2CAP_ComandCodeStr(c->cmd), + ESP_LOGI(TAG,"acl recv:%d %s %d:%d:%d:%d len:%d\n",c->id,L2CAP_ComandCodeStr(c->cmd), c->params[0],c->params[1],c->params[2],c->params[3],c->cmdLength); _txid++; // TODO. advance _txid on recev? @@ -596,7 +600,7 @@ class BTDevice { if (status != 1) { if (s) s->set_state(L2CAP_CLOSED); - PRINTF("l2cap connection FAILED: %d\n",status); + ESP_LOGE(TAG,"l2cap connection FAILED: %d\n",status); } } } @@ -663,7 +667,7 @@ class BTDevice { break; default: - PRINTF("%02X l2cap weird %d %s\n",c->cmd,c->cmdLength,L2CAP_ComandCodeStr(c->cmd)); + ESP_LOGI(TAG,"%02X l2cap weird %d %s\n",c->cmd,c->cmdLength,L2CAP_ComandCodeStr(c->cmd)); } } @@ -685,7 +689,7 @@ class BTDevice { int l2cap(uint8_t cmd, uint8_t id, u16* params, int count) { - PRINTF("acl send:%d %s\n",id,L2CAP_ComandCodeStr(cmd)); + ESP_LOGI(TAG,"acl send:%d %s\n",id,L2CAP_ComandCodeStr(cmd)); l2cap_cmd b; b.cmd = cmd; b.id = id; @@ -854,7 +858,7 @@ class HCI { { _hci = hci_open(); if (!_hci) - PRINTF("hci_open failed\n"); + ESP_LOGI(TAG,"hci_open failed\n"); else { hci_set_packet_handler(_hci,packet_,this); hci_set_ready_to_send_handler(_hci,ready_to_send_,this); @@ -882,11 +886,11 @@ class HCI { static void trace(int dir, const uint8_t* data, int len) { static const char *tagnames[5] = { "???", "CMD", "ACL", "ISO", "EVT" }; - fprintf(stdout,"%c %s ",dir ? '>' : '<',tagnames[*data++]); + ESP_LOGI(TAG,"%c %s ",dir ? '>' : '<',tagnames[*data++]); len--; for (int i = 0; i < len; i++) - fprintf(stdout,"%02X",data[i]); - fprintf(stdout,"\n"); + ESP_LOGI(TAG,"%02X",data[i]); + ESP_LOGI(TAG,"\n"); } int update() @@ -907,7 +911,7 @@ class HCI { case 0x2: acl(&buf[0],(int)buf.size()); break; case 0x4: hci(buf[1],&buf[3],buf[2]); break; default: - PRINTF("bad hci packet\n"); + ESP_LOGE(TAG,"bad hci packet\n"); } } return 0; @@ -1024,7 +1028,7 @@ class HCI { auto* d = get_device(&ri->bdaddr); if (d) { d->_name = ri->name; - PRINTF("remote_name_response %s %s\n",batostr(ri->bdaddr),ri->name); + ESP_LOGI(TAG,"remote_name_response %s %s\n",batostr(ri->bdaddr),ri->name); } return d; } @@ -1134,7 +1138,7 @@ class HCI { //uint16_t buf[1] = {(uint16_t)d->_handle}; //cmd(HCI_AUTHENTICATION_REQUESTED,buf,sizeof(buf)); // ask for auth } else { - PRINTF("hci connection failed: %s\n",hci_status_str(c->status)); + ESP_LOGE(TAG,"hci connection failed: %s\n",hci_status_str(c->status)); d->_handle = -1; } } @@ -1169,7 +1173,7 @@ class HCI { void hci(uint8_t evt, const uint8_t* data, uint8_t len) { - PRINTF("%s %d bytes\n",hci_evt(evt),len); + ESP_LOGI(TAG,"%s %d bytes\n",hci_evt(evt),len); switch (evt) { case HCI_INQUIRY_COMP_EVT: _state &= ~MASK_INQUIRY; @@ -1263,7 +1267,7 @@ class HCI { { int c = data[1] | (data[2] << 8); int status = data[3]; - PRINTF(" -> %s %04X %s\n",hci_cmd(c),c,hci_status_str(status)); + ESP_LOGI(TAG," -> %s %04X %s\n",hci_cmd(c),c,hci_status_str(status)); switch (c) { // Init phase 0 case HCI_RESET: @@ -1336,7 +1340,7 @@ class HCI { case HCI_COMMAND_STATUS_EVT: // after starting inquiry/connect etc { int cmd = data[2] + (data[3] << 8); - PRINTF(" -> %s %04X %s\n",hci_cmd(cmd),cmd,hci_status_str(data[0])); + ESP_LOGI(TAG," -> %s %04X %s\n",hci_cmd(cmd),cmd,hci_status_str(data[0])); } break; case HCI_QOS_SETUP_COMP_EVT: @@ -1353,7 +1357,7 @@ class HCI { write_link_key((const bdaddr_t*)data,data+6); break; default: - PRINTF("unhandled hci case\n"); + ESP_LOGE(TAG,"unhandled hci case\n"); } } @@ -1381,7 +1385,7 @@ class HCI { // interesting bug on libusb/simulator where ACL open packet arrives before hci connection complete // hci arrives on libusb_fill_interrupt_transfer, acl on libusb_fill_bulk_transfer but acl gets ahead - PRINTF("ACL PACKET DROPPED! handle %d, %d bytes\n",h,len); + ESP_LOGE(TAG,"ACL PACKET DROPPED! handle %d, %d bytes\n",h,len); _dongle_bug.resize(len); memcpy(&_dongle_bug[0],data,len); } diff --git a/firmware/components/hid_server/hci_transport_esp32.cpp b/firmware/components/hid_server/hci_transport_esp32.cpp index 3eae922..148bcb3 100644 --- a/firmware/components/hid_server/hci_transport_esp32.cpp +++ b/firmware/components/hid_server/hci_transport_esp32.cpp @@ -3,6 +3,9 @@ #include "hci_transport.h" +#include "esp_log.h" +#define TAG "hci_transport_esp32" + //============================================================================================= //============================================================================================= // hci transport for esp32 @@ -22,13 +25,13 @@ hci_handle hci_open() esp_bt_controller_config_t bt_cfg = BT_CONTROLLER_INIT_CONFIG_DEFAULT(); esp_err_t ret = esp_bt_controller_init(&bt_cfg); if (ret != ESP_OK) { - printf("Bluetooth Controller initialize failed: %s", esp_err_to_name(ret)); + ESP_LOGE(TAG,"Bluetooth Controller initialize failed: %s", esp_err_to_name(ret)); return NULL; } //Note: the mode is dependent on what's enabled in menuconfig; will fail if they differ ret = esp_bt_controller_enable(ESP_BT_MODE_CLASSIC_BT); //ESP_BT_MODE_BTDM if (ret != ESP_OK) { - printf("Bluetooth Controller enable failed: %s", esp_err_to_name(ret)); + ESP_LOGE(TAG,"Bluetooth Controller enable failed: %s", esp_err_to_name(ret)); return NULL; } @@ -83,14 +86,14 @@ static uint32_t open_nvs() { nvs_open("esp_8_bit", NVS_READWRITE, &_nvs_handle); if (!_nvs_handle) - printf("_nvs_handle open failed!\n"); + ESP_LOGE(TAG,"_nvs_handle open failed!\n"); #if 0 nvs_iterator_t it = nvs_entry_find("nvs", "esp_8_bit", NVS_TYPE_ANY); while (it != NULL) { nvs_entry_info_t info; nvs_entry_info(it, &info); it = nvs_entry_next(it); - printf("key '%s', type '%d' \n", info.key, info.type); + ESP_LOGE(TAG,"key '%s', type '%d' \n", info.key, info.type); }; #endif return _nvs_handle; @@ -119,5 +122,5 @@ void sys_set_pref(const char* key, const char* value) if (ESP_OK == nvs_set_str(h, key, value)) nvs_commit(h); else - printf("sys_set_pref %s:%s failed (key length <= 15?)\n",key,value); + ESP_LOGE(TAG,"sys_set_pref %s:%s failed (key length <= 15?)\n",key,value); } diff --git a/firmware/components/hid_server/hid_server.cpp b/firmware/components/hid_server/hid_server.cpp index ab209c8..4b267c1 100644 --- a/firmware/components/hid_server/hid_server.cpp +++ b/firmware/components/hid_server/hid_server.cpp @@ -14,7 +14,7 @@ ** ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS ** SOFTWARE. */ - +#pragma GCC diagnostic ignored "-Wformat" #include #include #include @@ -27,6 +27,9 @@ using namespace std; #include "hci_server.h" #include "hid_server.h" +#include "esp_log.h" +#define TAG "hid_server" + enum { HID_SDP_PSM = 0x0001, HID_CONTROL_PSM = 0x0011, @@ -301,7 +304,7 @@ class SDPParse { void PAD(int n) { while (n--) - printf(" "); + ESP_LOGI(TAG," "); } int get_id16() @@ -309,7 +312,7 @@ class SDPParse { uint32_t n; int t = header(n); if (t != SDP_DE_UINT || n != 2) { - printf("bad sdp id\n"); + ESP_LOGE(TAG,"bad sdp id\n"); return -1; } return u16(); @@ -333,7 +336,7 @@ class SDPParse { int item(int len, int level = 0, bool want_id = true) { PAD(level); - printf("{\n"); + ESP_LOGI(TAG,"{\n"); const uint8_t* end = _data + len; uint32_t n,id; while (_data < end) { @@ -341,12 +344,12 @@ class SDPParse { _current_id = get_id16(); if (_current_id == -1) return -1; - printf("%s %d\n",get_name(_current_id),_current_id); + ESP_LOGI(TAG,"%s %d\n",get_name(_current_id),_current_id); } int t = header(n); switch (t) { case SDP_DE_NULL: - printf("SDP_DE_NULL\n"); + ESP_LOGI(TAG,"SDP_DE_NULL\n"); break; case SDP_DE_SEQ: // it is a sequence item(n,level+1,false); // just a list @@ -357,21 +360,21 @@ class SDPParse { case 1: id = u8(); PAD(level); - printf("SDP_DE_UINT8 %d\n",id); + ESP_LOGI(TAG,"SDP_DE_UINT8 %d\n",id); break; case 2: id = u16(); PAD(level); - printf("SDP_DE_UINT16 %d\n",id); + ESP_LOGI(TAG,"SDP_DE_UINT16 %d\n",id); break; case 4: id = u32(); PAD(level); - printf("SDP_DE_UINT32 %d\n",id); + ESP_LOGI(TAG,"SDP_DE_UINT32 %d\n",id); break; default: PAD(level); - printf("type:%d skipping %d\n",t,n); + ESP_LOGI(TAG,"type:%d skipping %d\n",t,n); _data += n; } break; @@ -381,7 +384,7 @@ class SDPParse { _data += n; on_string(s); PAD(level); - printf("SDP_DE_STRING: %s\n",s.c_str()); + ESP_LOGI(TAG,"SDP_DE_STRING: %s\n",s.c_str()); } break; case SDP_DE_UUID: @@ -393,25 +396,25 @@ class SDPParse { default: _data += n; } PAD(level); - printf("SDP_DE_UUID 0x%08X\n",id); + ESP_LOGI(TAG,"SDP_DE_UUID 0x%08X\n",id); break; case SDP_DE_BOOL: PAD(level); - printf("SDP_DE_BOOL "); - printf("%s\n",*_data++ ? "true" : "false"); + ESP_LOGI(TAG,"SDP_DE_BOOL "); + ESP_LOGI(TAG,"%s\n",*_data++ ? "true" : "false"); break; case SDP_DE_URL: - printf("SDP_DE_URL %d bytes\n",n); + ESP_LOGI(TAG,"SDP_DE_URL %d bytes\n",n); _data += n; break; default: PAD(level); - printf("unhandled type:%d skipping %d\n",t,n); + ESP_LOGI(TAG,"unhandled type:%d skipping %d\n",t,n); _data += n; } } PAD(level); - printf("}\n"); + ESP_LOGI(TAG,"}\n"); return 0; } @@ -432,11 +435,11 @@ class SDPParse { void dump() { string s = _SrvName + " " + _SrvDesc + " " + _ProviderName; - printf("%s\n",s.c_str()); + ESP_LOGI(TAG,"%s\n",s.c_str()); const uint8_t* d = (const uint8_t*)_HIDDescriptor.c_str(); int n = (int)_HIDDescriptor.length(); for (int i = 0; i < n; i++) - printf("%02X,",d[i]); + ESP_LOGI(TAG,"%02X,",d[i]); } void parse(const uint8_t* data, int len) @@ -574,9 +577,9 @@ void InputDevice::authentication_complete(int status) { // entered the wrong kb code... if (status) { - printf("pin didn't work, won't create a link key: %d\n", status); + ESP_LOGE(TAG,"pin didn't work, won't create a link key: %d\n", status); } - printf("Auth complete\n"); + ESP_LOGI(TAG,"Auth complete\n"); if (!_reconnect) { _control = l2_open(&_bdaddr, HID_CONTROL_PSM, false); @@ -607,7 +610,7 @@ const char* _nams[] = { void InputDevice::socket_changed(int socket, int state) { - printf("s:%d %s\n",socket,_nams[state]); + ESP_LOGI(TAG,"s:%d %s\n",socket,_nams[state]); if ((socket == _sdp) && (state == L2CAP_OPEN)) // wait for sdp channel to be open before sending query start_sdp(); else if ((socket == _control) && (state == L2CAP_OPEN)) { @@ -675,7 +678,7 @@ class HIDSource { d->_control = d->_interrupt = d->_sdp = 0; d->_state = InputDevice::CLOSED; _devices.push_back(d); - printf("%s:%06X input device added\n",batostr(d->_bdaddr),d->_dev_class); + ESP_LOGI(TAG,"%s:%06X input device added\n",batostr(d->_bdaddr),d->_dev_class); } return d; } @@ -757,7 +760,7 @@ class HIDSource { void hid_control(InputDevice* d, const uint8_t* data, int len) { - printf("HID CONTROL %02X %d\n",data[0],len); + ESP_LOGI(TAG,"HID CONTROL %02X %d\n",data[0],len); } // get hid (events). max one per call @@ -771,7 +774,7 @@ class HIDSource { return len; } if (len < 0) { - printf("hid shutting down TODO\n"); + ESP_LOGI(TAG,"hid shutting down TODO\n"); d->disconnection_complete(); } } diff --git a/firmware/components/ie15term/CMakeLists.txt b/firmware/components/ie15term/CMakeLists.txt index 856b0e0..5bc65a3 100644 --- a/firmware/components/ie15term/CMakeLists.txt +++ b/firmware/components/ie15term/CMakeLists.txt @@ -1,5 +1,6 @@ idf_component_register(SRCS "ie15lcd.c" - INCLUDE_DIRS "." + REQUIRES driver + INCLUDE_DIRS "." "../boards" $ENV{IDF_PATH}/components/nvs_flash/include $ENV{IDF_PATH}/components/esp_ringbuf/include $ENV{IDF_PATH}/components/driver/include $ENV{IDF_PATH}/components/vfs/include EMBED_FILES chargen.bin) diff --git a/firmware/components/ie15term/ie15lcd.c b/firmware/components/ie15term/ie15lcd.c index 7eb7665..61f3842 100644 --- a/firmware/components/ie15term/ie15lcd.c +++ b/firmware/components/ie15term/ie15lcd.c @@ -19,6 +19,22 @@ #include "esp_vfs.h" #include "esp_vfs_dev.h" #include "sdkconfig.h" + +#include "esp_log.h" +#define TAG "ie15lcd" + +// load hardware specific definitions, use 'idf.py menuconfig' to set it + +#if CONFIG_ESPPDP_HW_WROVER_KIT +#include "hw_wrover.h" +#elif CONFIG_ESPPDP_HW_2432S028 +#include "hw_2432S028.h" +#elif CONFIG_ESPPDP_HW_FINAL +#include "hw_final.h" +#else +#error ESPPDP Hardware not configured, use 'idf.py menuconfig' to choose +#endif + /* Emulation of a Russian IE15-type terminal on a ILI9341/ST7789V 320x240 LCD in landscape mode. */ @@ -26,18 +42,6 @@ Emulation of a Russian IE15-type terminal on a ILI9341/ST7789V 320x240 LCD in l //Reference the binary-included character generator ROM contents of an original terminal extern const uint8_t chargenrom[] asm("_binary_chargen_bin_start"); -#define LCD_HOST HSPI_HOST -#define DMA_CHAN 2 - -#define PIN_NUM_MISO -1 -#define PIN_NUM_MOSI 23 -#define PIN_NUM_CLK 19 -#define PIN_NUM_CS 22 - -#define PIN_NUM_DC 21 -#define PIN_NUM_RST 18 -#define PIN_NUM_BCKL 5 - // The LCD needs a bunch of command/argument values to be initialized. They are stored in this struct. typedef struct { uint8_t cmd; @@ -53,8 +57,13 @@ typedef enum { //Place data into DRAM. Constant data gets placed into DROM by default, which is not accessible by DMA. DRAM_ATTR static const lcd_init_cmd_t st_init_cmds[]={ +#if DISPLAY_ROTATE + /* Memory Data Access Control, MX=MV=1, MX=ML=MH=0, RGB=0 */ + {0x36, {(1<<5)|(1<<7)}, 1}, +#else /* Memory Data Access Control, MX=MV=1, MY=ML=MH=0, RGB=0 */ {0x36, {(1<<5)|(1<<6)}, 1}, +#endif // DISPLAY_ROTATE /* Interface Pixel Format, 16bits/pixel for RGB/MCU interface */ {0x3A, {0x55}, 1}, /* Porch Setting */ @@ -81,7 +90,7 @@ DRAM_ATTR static const lcd_init_cmd_t st_init_cmds[]={ {0xE1, {0xD0, 0x00, 0x05, 0x0D, 0x0C, 0x06, 0x2D, 0x44, 0x40, 0x0E, 0x1C, 0x18, 0x16, 0x19}, 14}, /* Sleep Out */ {0x11, {0}, 0x80}, -#if !CONFIG_ESPPDP_HW_WROVER_KIT +#if DISPLAY_INVERT {0x21, {0}, 0x80}, #endif /* Display On */ @@ -118,8 +127,13 @@ DRAM_ATTR static const lcd_init_cmd_t ili_init_cmds[]={ {0xC5, {0x35, 0x3E}, 2}, /* VCOM control 2, VCOMH=VMH-2, VCOML=VML-2 */ {0xC7, {0xBE}, 1}, +#if DISPLAY_ROTATE + /* Memory access contorl, MX=MY=1, MV=1, ML=0, BGR=1, MH=0 */ + {0x36, {0xE8}, 1}, +#else /* Memory access contorl, MX=MY=0, MV=1, ML=0, BGR=1, MH=0 */ {0x36, {0x28}, 1}, +#endif //DISPLAY_ROTATE /* Pixel format, 16bits/pixel for RGB/MCU interface */ {0x3A, {0x55}, 1}, /* Frame rate control, f=fosc, 70Hz fps */ @@ -144,6 +158,9 @@ DRAM_ATTR static const lcd_init_cmd_t ili_init_cmds[]={ {0xB6, {0x0A, 0x82, 0x27, 0x00}, 4}, /* Sleep out */ {0x11, {0}, 0x80}, +#if DISPLAY_INVERT + {0x21, {0}, 0x80}, +#endif /* Display on */ {0x29, {0}, 0x80}, {0, {0}, 0xff}, @@ -190,7 +207,7 @@ static void lcd_data(spi_device_handle_t spi, const uint8_t *data, int len) { //set the D/C line to the value indicated in the user field. static void lcd_spi_pre_transfer_callback(spi_transaction_t *t) { int dc=(int)t->user; - gpio_set_level(PIN_NUM_DC, dc); + gpio_set_level(DISPLAY_SPI_DC, dc); } static uint32_t lcd_get_id(spi_device_handle_t spi) { @@ -215,42 +232,45 @@ static void lcd_init(spi_device_handle_t spi) { const lcd_init_cmd_t* lcd_init_cmds; //Initialize non-SPI GPIOs - gpio_set_direction(PIN_NUM_DC, GPIO_MODE_OUTPUT); - gpio_set_direction(PIN_NUM_RST, GPIO_MODE_OUTPUT); - gpio_set_direction(PIN_NUM_BCKL, GPIO_MODE_OUTPUT); + gpio_set_direction(DISPLAY_SPI_DC, GPIO_MODE_OUTPUT); + gpio_set_direction(DISPLAY_BCKL, GPIO_MODE_OUTPUT); + // reset if reset line is given +#if DISPLAY_SPI_RST != GPIO_NUM_NC + gpio_set_direction(DISPLAY_SPI_RST, GPIO_MODE_OUTPUT); //Reset the display - gpio_set_level(PIN_NUM_RST, 0); - vTaskDelay(100 / portTICK_RATE_MS); - gpio_set_level(PIN_NUM_RST, 1); - vTaskDelay(100 / portTICK_RATE_MS); + gpio_set_level(DISPLAY_SPI_RST, 0); + vTaskDelay(100 / portTICK_PERIOD_MS); + gpio_set_level(DISPLAY_SPI_RST, 1); + vTaskDelay(100 / portTICK_PERIOD_MS); +#endif //detect LCD type -#if CONFIG_ESPPDP_HW_WROVER_KIT - uint32_t lcd_id = lcd_get_id(spi); +#if defined(DISPLAY_ID) + uint32_t lcd_id = DISPLAY_ID;//lcd_get_id(spi); #else - uint32_t lcd_id = 1;//lcd_get_id(spi); + uint32_t lcd_id = lcd_get_id(spi); #endif int lcd_detected_type = 0; int lcd_type; - printf("LCD ID: %08X\n", lcd_id); + ESP_LOGI(TAG,"LCD ID: %08X\n", (unsigned int)lcd_id); if ( lcd_id == 0 ) { //zero, ili lcd_detected_type = LCD_TYPE_ILI; - printf("ILI9341 detected.\n"); + ESP_LOGI(TAG,"ILI9341 detected.\n"); } else { // none-zero, ST lcd_detected_type = LCD_TYPE_ST; - printf("ST7789V detected.\n"); + ESP_LOGI(TAG,"ST7789V detected.\n"); } lcd_type = lcd_detected_type; if ( lcd_type == LCD_TYPE_ST ) { - printf("LCD ST7789V initialization.\n"); + ESP_LOGI(TAG,"LCD ST7789V initialization.\n"); lcd_init_cmds = st_init_cmds; } else { - printf("LCD ILI9341 initialization.\n"); + ESP_LOGI(TAG,"LCD ILI9341 initialization.\n"); lcd_init_cmds = ili_init_cmds; } @@ -259,16 +279,14 @@ static void lcd_init(spi_device_handle_t spi) { lcd_cmd(spi, lcd_init_cmds[cmd].cmd); lcd_data(spi, lcd_init_cmds[cmd].data, lcd_init_cmds[cmd].databytes&0x1F); if (lcd_init_cmds[cmd].databytes&0x80) { - vTaskDelay(100 / portTICK_RATE_MS); + vTaskDelay(100 / portTICK_PERIOD_MS); } cmd++; } - ///Enable backlight -#if CONFIG_ESPPDP_HW_WROVER_KIT - gpio_set_level(PIN_NUM_BCKL, 0); -#else - gpio_set_level(PIN_NUM_BCKL, 1); + ///Enable backlight if DISPLAY_BCKL is given +#if DISPLAY_BCKL != GPIO_NUM_NC + gpio_set_level(DISPLAY_BCKL, DISPLAY_BCKL_ON ); #endif } @@ -277,8 +295,8 @@ static inline int get_pix(int c, int x, int y) { return (chargenrom[p+y]>>(7-x))&1; } -#define CHW 4 -#define CHH 10 +// #define CHW 4 +// #define CHH 10 static const int lcdrgb(int r, int g, int b) { r=r>>3; @@ -289,23 +307,23 @@ static const int lcdrgb(int r, int g, int b) { } static void draw_char(spi_device_handle_t spi,int c, int cx, int cy) { - int x=cx*CHW; - int y=cy*CHH; + int x=cx*DISPLAY_CHW; + int y=cy*DISPLAY_CHH; int cols[3]; cols[0]=lcdrgb(0, 0, 0); cols[1]=lcdrgb(13, 210, 13); cols[2]=lcdrgb(16, 255, 16); - uint16_t chardata[CHW*CHH]; - for (int ly=0; ly>8; //Start Col High trans[1].tx_data[1]=x&0xff; //Start Col Low - trans[1].tx_data[2]=(x+CHW-1)>>8; //End Col High - trans[1].tx_data[3]=(x+CHW-1)&0xff; //End Col Low + trans[1].tx_data[2]=(x+DISPLAY_CHW-1)>>8; //End Col High + trans[1].tx_data[3]=(x+DISPLAY_CHW-1)&0xff; //End Col Low trans[2].tx_data[0]=0x2B; //Page address set trans[3].tx_data[0]=y>>8; //Start page high trans[3].tx_data[1]=y&0xff; //start page low - trans[3].tx_data[2]=(y+CHH-1)>>8; //end page high - trans[3].tx_data[3]=(y+CHH-1)&0xff; //end page low + trans[3].tx_data[2]=(y+DISPLAY_CHH-1)>>8; //end page high + trans[3].tx_data[3]=(y+DISPLAY_CHH-1)&0xff; //end page low trans[4].tx_data[0]=0x2C; //memory write trans[5].tx_buffer=chardata; //finally send the line data - trans[5].length=(CHW*CHH)*2*8; //Data length, in bits + trans[5].length=(DISPLAY_CHW*DISPLAY_CHH)*2*8; //Data length, in bits trans[5].flags=0; //undo SPI_TRANS_USE_TXDATA flag //Send all transactions. @@ -369,31 +387,31 @@ static void ie15_task(void *ptr) { esp_err_t ret; spi_device_handle_t spi; spi_bus_config_t buscfg={ - .miso_io_num=PIN_NUM_MISO, - .mosi_io_num=PIN_NUM_MOSI, - .sclk_io_num=PIN_NUM_CLK, + .miso_io_num=DISPLAY_SPI_MISO, + .mosi_io_num=DISPLAY_SPI_MOSI, + .sclk_io_num=DISPLAY_SPI_SCLK, .quadwp_io_num=-1, .quadhd_io_num=-1, .max_transfer_sz=4094 }; spi_device_interface_config_t devcfg={ - .clock_speed_hz=10*1000*1000, //Clock out at 20 MHz + .clock_speed_hz=DISPLAY_SPI_HZ, //Clock out at 20 MHz .mode=0, //SPI mode 0 - .spics_io_num=PIN_NUM_CS, //CS pin + .spics_io_num=DISPLAY_SPI_CS, //CS pin .queue_size=7, //We want to be able to queue 7 transactions at a time .pre_cb=lcd_spi_pre_transfer_callback, //Specify pre-transfer callback to handle D/C line }; //Initialize the SPI bus - ret=spi_bus_initialize(LCD_HOST, &buscfg, DMA_CHAN); + ret=spi_bus_initialize(DISPLAY_SPI_HOST, &buscfg, DISPLAY_SPI_DMA); ESP_ERROR_CHECK(ret); //Attach the LCD to the SPI bus - ret=spi_bus_add_device(LCD_HOST, &devcfg, &spi); + ret=spi_bus_add_device(DISPLAY_SPI_HOST, &devcfg, &spi); ESP_ERROR_CHECK(ret); //Initialize the LCD lcd_init(spi); - for (int y=0; y<240/CHH; y++) { - for (int x=0; x<320/CHW; x++) { + for (int y=0; y<240/DISPLAY_CHH; y++) { + for (int x=0; x<320/DISPLAY_CHW; x++) { draw_char(spi, 0, x, y); } } diff --git a/firmware/main/Kconfig.projbuild b/firmware/main/Kconfig.projbuild index d81827c..59206a1 100644 --- a/firmware/main/Kconfig.projbuild +++ b/firmware/main/Kconfig.projbuild @@ -10,6 +10,8 @@ menu "ESP-PDP11 Configuration" bool "Esp32-Wrover-Kit development board" config ESPPDP_HW_FINAL bool "Final dedicated board" + config ESPPDP_HW_2432S028 + bool "Sunton 2432S028 board" endchoice diff --git a/firmware/main/bthid.c b/firmware/main/bthid.c index 0bb82be..3ec77f3 100644 --- a/firmware/main/bthid.c +++ b/firmware/main/bthid.c @@ -19,6 +19,10 @@ #include "bthid.h" #include "usb_hid_keys.h" +#include "esp_log.h" +#define TAG "bthid" + + static RingbufHandle_t bthidrb; typedef struct { @@ -142,7 +146,7 @@ static void handle_kb_key(uint8_t modifiers, uint8_t key) { static void bthid_task(void *parm) { - printf("bthid: starting\n"); + ESP_LOGI(TAG,"bthid: starting\n"); hid_init("esppdp"); uint8_t old_kbrep[64]; int old_kbrep_len=0; @@ -151,9 +155,9 @@ static void bthid_task(void *parm) { uint8_t buf[64]; int len=hid_get(buf, 64); if (len>0 && buf[0]==0xa1) { - printf("HID report: %d bytes\n", len); - for (int j=0; j +#include #include "sdkconfig.h" #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "esp_system.h" + +// load hardware specific definitions, use 'idf.py menuconfig' to set it + +#if CONFIG_ESPPDP_HW_WROVER_KIT +#include "hw_wrover.h" +#elif CONFIG_ESPPDP_HW_2432S028 +#include "hw_2432S028.h" +#elif CONFIG_ESPPDP_HW_FINAL +#include "hw_final.h" +#else +#error ESPPDP Hardware not configured, use 'idf.py menuconfig' to choose +#endif + #include "esp_spi_flash.h" #include "esp_err.h" #include "esp_log.h" @@ -22,8 +44,12 @@ #include "nvs_flash.h" #include "bthid.h" #include "esp_vfs_fat.h" -#include "driver/sdmmc_host.h" +#ifdef SD_MMC + #include "driver/sdmmc_host.h" +#endif // SD_MMC +#ifdef SD_SPI #include "driver/sdspi_host.h" +#endif // SD_SPI #include "driver/spi_common.h" #include "sdmmc_cmd.h" #include "sdkconfig.h" @@ -95,35 +121,72 @@ void app_main(void) { const char signon[]="Initializing emulator...\r\n"; for (const char *p=signon; *p!=0; p++) ie15_sendchar(*p); +#if !defined(SD_NONE) //Initialize SD-card, if possible + ESP_LOGI(TAG,"Initialize SD-card"); esp_vfs_fat_sdmmc_mount_config_t mount_config = { .format_if_mount_failed = false, .max_files = 2, .allocation_unit_size = 16 * 1024 }; sdmmc_card_t* card; - + #if defined(SD_MMC) + ESP_LOGI(TAG,"Create SDMMC_HOST"); sdmmc_host_t host = SDMMC_HOST_DEFAULT(); // host.max_freq_khz=5000; sdmmc_slot_config_t slot_config = SDMMC_SLOT_CONFIG_DEFAULT(); // GPIOs 15, 2, 4, 12, 13 should have external 10k pull-ups. // Internal pull-ups are not sufficient. However, enabling internal pull-ups // does make a difference some boards, so we do that here. - gpio_set_pull_mode(15, GPIO_PULLUP_ONLY); // CMD, needed in 4- and 1- line modes - gpio_set_pull_mode(2, GPIO_PULLUP_ONLY); // D0, needed in 4- and 1-line modes - gpio_set_pull_mode(4, GPIO_PULLUP_ONLY); // D1, needed in 4-line mode only - gpio_set_pull_mode(12, GPIO_PULLUP_ONLY); // D2, needed in 4-line mode only - gpio_set_pull_mode(13, GPIO_PULLUP_ONLY); // D3, needed in 4- and 1-line modes + gpio_set_pull_mode(SD_MMC_CMD, GPIO_PULLUP_ONLY); // CMD, needed in 4- and 1- line modes + gpio_set_pull_mode(SD_MMC_D0, GPIO_PULLUP_ONLY); // D0, needed in 4- and 1-line modes + gpio_set_pull_mode(SD_MMC_D1, GPIO_PULLUP_ONLY); // D1, needed in 4-line mode only + gpio_set_pull_mode(SD_MMC_D2, GPIO_PULLUP_ONLY); // D2, needed in 4-line mode only + gpio_set_pull_mode(SD_MMC_D3, GPIO_PULLUP_ONLY); // D3, needed in 4- and 1-line modes + ESP_LOGI(TAG,"Initialize VFS via SDMMC\n"); ret = esp_vfs_fat_sdmmc_mount("/sdcard", &host, &slot_config, &mount_config, &card); + #elif defined(SD_SPI) + ESP_LOGI(TAG,"Create SDSPI_HOST\n"); + sdmmc_host_t host = SDSPI_HOST_DEFAULT(); + host.slot = SD_SPI_HOST; + spi_bus_config_t bus_cfg = { + .mosi_io_num = SD_SPI_MOSI, + .miso_io_num = SD_SPI_MISO, + .sclk_io_num = SD_SPI_SCLK, + .quadwp_io_num = -1, + .quadhd_io_num = -1, + .max_transfer_sz = 4000, + }; + ESP_LOGI(TAG,"Initialize SPI_BUS\n"); + // ret = spi_bus_initialize(host.slot, &bus_cfg, SDSPI_DEFAULT_DMA); + ret = spi_bus_initialize(host.slot, &bus_cfg, SD_SPI_DMA); + if (ret != ESP_OK) { + ESP_LOGE(TAG,"Failed to initialize bus."); + return; + } + sdspi_device_config_t slot_config = SDSPI_DEVICE_CONFIG_DEFAULT(); + slot_config.gpio_cs = SD_SPI_CS; + slot_config.host_id = host.slot; + + ESP_LOGI(TAG,"Initialize VFS via SDSPI\n"); + //ret = esp_vfs_fat_sdmmc_mount("/sdcard", &host, &slot_config, &mount_config, &card); + ret = esp_vfs_fat_sdspi_mount("/sdcard", &host, &slot_config, &mount_config, &card); + #else + #error SD_MMC or SD_SPI or SD_NONE must be defined +#endif // defined(SD_MMC) // defined(SD_SPI) if (ret != ESP_OK) { ESP_LOGE(TAG, "SD-card: Failed to mount filesystem."); - const char noflopstr[]="No SD card. Booting from built-in floppy.\r\n"; + const char noflopstr[]="No SD card. Trying boot from built-in floppy.\r\n"; for (const char *p=noflopstr; *p!=0; p++) ie15_sendchar(*p); } else { sdmmc_card_print_info(stdout, card); } +#else + ESP_LOGI(TAG,"No SD-Card defined"); +#endif // defined(SD_NONE) - //Mount spiffs. This contains a floppy image. +#if !defined(SPIFFS_NONE) + //Mount spiffs. This contains (a) floppy image(s). esp_vfs_spiffs_conf_t conf = { .base_path = "/spiffs", .partition_label = NULL, @@ -136,7 +199,7 @@ void app_main(void) { if (ret != ESP_OK) { if (ret == ESP_FAIL) { - ESP_LOGE(TAG, "Failed to mount or format filesystem"); + ESP_LOGE(TAG, "Failed to mount filesystem"); } else if (ret == ESP_ERR_NOT_FOUND) { ESP_LOGE(TAG, "Failed to find SPIFFS partition"); } else { @@ -144,7 +207,10 @@ void app_main(void) { } return; } - +#else + ESP_LOGI(TAG,"No SPIFFS defined"); +#endif // defined(SPIFFS_NONE) + bthid_start(); nanosleep_init(); diff --git a/firmware/main/pdp11_cpu.c b/firmware/main/pdp11_cpu.c index 729388c..bb5eb65 100644 --- a/firmware/main/pdp11_cpu.c +++ b/firmware/main/pdp11_cpu.c @@ -3609,8 +3609,8 @@ if (cptr) { if (r == SCPE_OK) { pa = relocC (va, sim_switches); /* relocate */ if (pa < MAXMEMSIZE) - fprintf (of, "Virtual %-o = physical %-o\n", va, pa); - else fprintf (of, "Virtual %-o is not valid\n", va); + fprintf (of, "Virtual %-lo = physical %-o\n", va, pa); + else fprintf (of, "Virtual %-lo is not valid\n", va); return SCPE_OK; } } diff --git a/firmware/main/pdp11_defs.h b/firmware/main/pdp11_defs.h index 4ac6639..f807fbc 100644 --- a/firmware/main/pdp11_defs.h +++ b/firmware/main/pdp11_defs.h @@ -77,7 +77,7 @@ 05-Apr-01 RMS Added TS11/TSV05 support 10-Feb-01 RMS Added DECtape support */ - +#pragma GCC diagnostic ignored "-Wformat" #ifndef PDP11_DEFS_H #define PDP11_DEFS_H 0 diff --git a/firmware/main/sim_defs.h b/firmware/main/sim_defs.h index 0c3ce70..7b029c3 100644 --- a/firmware/main/sim_defs.h +++ b/firmware/main/sim_defs.h @@ -104,7 +104,8 @@ print_sym print symbolic output parse_sym parse symbolic input */ - +#pragma GCC diagnostic ignored "-Wformat" +#pragma GCC diagnostic ignored "-Wchar-subscripts" #ifndef SIM_DEFS_H_ #define SIM_DEFS_H_ 0 diff --git a/firmware/main/wifi_if_esp32.c b/firmware/main/wifi_if_esp32.c index 71db18f..1e16dae 100644 --- a/firmware/main/wifi_if_esp32.c +++ b/firmware/main/wifi_if_esp32.c @@ -66,6 +66,7 @@ typedef struct { QueueHandle_t rxqueue; static esp_netif_t *netif; +void esp_read_mac(uint8_t *,int); //Gets called whenever the local tcp/ip stack wants to transmit something static esp_err_t wifi_netif_tx(void *driver, void *buffer, size_t len) { diff --git a/firmware/main/wifid.c b/firmware/main/wifid.c index c164660..cd7793e 100644 --- a/firmware/main/wifid.c +++ b/firmware/main/wifid.c @@ -144,9 +144,9 @@ void wifid_parse_packet(uint8_t *buffer, int len) { } else if (wcmd->cmd == CMD_QUIT) { //Ignore, we aren't the one needing to quit here. } else { - printf("WiFiD: Got unknown commmand %d\n", wcmd->cmd); + printf("WiFiD: Got unknown commmand %ld\n", wcmd->cmd); char buff[32]; - sprintf(buff, "Unknown cmd %d", wcmd->cmd); + sprintf(buff, "Unknown cmd %ld", wcmd->cmd); send_error_msg(buff); } } diff --git a/firmware/sdkconfig b/firmware/sdkconfig index 6ea1df0..7dafa4c 100644 --- a/firmware/sdkconfig +++ b/firmware/sdkconfig @@ -1,42 +1,264 @@ # # Automatically generated file. DO NOT EDIT. -# Espressif IoT Development Framework (ESP-IDF) Project Configuration -# +# Espressif IoT Development Framework (ESP-IDF) 5.2.1 Project Configuration +# +CONFIG_SOC_BROWNOUT_RESET_SUPPORTED="Not determined" +CONFIG_SOC_TWAI_BRP_DIV_SUPPORTED="Not determined" +CONFIG_SOC_DPORT_WORKAROUND="Not determined" +CONFIG_SOC_CAPS_ECO_VER_MAX=301 +CONFIG_SOC_ADC_SUPPORTED=y +CONFIG_SOC_DAC_SUPPORTED=y +CONFIG_SOC_UART_SUPPORTED=y +CONFIG_SOC_MCPWM_SUPPORTED=y +CONFIG_SOC_GPTIMER_SUPPORTED=y +CONFIG_SOC_SDMMC_HOST_SUPPORTED=y +CONFIG_SOC_BT_SUPPORTED=y +CONFIG_SOC_PCNT_SUPPORTED=y +CONFIG_SOC_WIFI_SUPPORTED=y +CONFIG_SOC_SDIO_SLAVE_SUPPORTED=y +CONFIG_SOC_TWAI_SUPPORTED=y +CONFIG_SOC_EFUSE_SUPPORTED=y +CONFIG_SOC_EMAC_SUPPORTED=y +CONFIG_SOC_ULP_SUPPORTED=y +CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y +CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y +CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y +CONFIG_SOC_RTC_MEM_SUPPORTED=y +CONFIG_SOC_I2S_SUPPORTED=y +CONFIG_SOC_RMT_SUPPORTED=y +CONFIG_SOC_SDM_SUPPORTED=y +CONFIG_SOC_GPSPI_SUPPORTED=y +CONFIG_SOC_LEDC_SUPPORTED=y +CONFIG_SOC_I2C_SUPPORTED=y +CONFIG_SOC_SUPPORT_COEXISTENCE=y +CONFIG_SOC_AES_SUPPORTED=y +CONFIG_SOC_MPI_SUPPORTED=y +CONFIG_SOC_SHA_SUPPORTED=y +CONFIG_SOC_FLASH_ENC_SUPPORTED=y +CONFIG_SOC_SECURE_BOOT_SUPPORTED=y +CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y +CONFIG_SOC_BOD_SUPPORTED=y +CONFIG_SOC_ULP_FSM_SUPPORTED=y +CONFIG_SOC_CLK_TREE_SUPPORTED=y +CONFIG_SOC_MPU_SUPPORTED=y +CONFIG_SOC_WDT_SUPPORTED=y +CONFIG_SOC_SPI_FLASH_SUPPORTED=y +CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL=5 +CONFIG_SOC_XTAL_SUPPORT_26M=y +CONFIG_SOC_XTAL_SUPPORT_40M=y +CONFIG_SOC_XTAL_SUPPORT_AUTO_DETECT=y +CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y +CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y +CONFIG_SOC_ADC_DMA_SUPPORTED=y +CONFIG_SOC_ADC_PERIPH_NUM=2 +CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10 +CONFIG_SOC_ADC_ATTEN_NUM=4 +CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2 +CONFIG_SOC_ADC_PATT_LEN_MAX=16 +CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=9 +CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12 +CONFIG_SOC_ADC_DIGI_RESULT_BYTES=2 +CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4 +CONFIG_SOC_ADC_DIGI_MONITOR_NUM=0 +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=2 +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=20 +CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=9 +CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12 +CONFIG_SOC_ADC_SHARED_POWER=y +CONFIG_SOC_SHARED_IDCACHE_SUPPORTED=y +CONFIG_SOC_IDCACHE_PER_CORE=y +CONFIG_SOC_CPU_CORES_NUM=2 +CONFIG_SOC_CPU_INTR_NUM=32 +CONFIG_SOC_CPU_HAS_FPU=y +CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES=y +CONFIG_SOC_CPU_BREAKPOINTS_NUM=2 +CONFIG_SOC_CPU_WATCHPOINTS_NUM=2 +CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=64 +CONFIG_SOC_DAC_CHAN_NUM=2 +CONFIG_SOC_DAC_RESOLUTION=8 +CONFIG_SOC_DAC_DMA_16BIT_ALIGN=y +CONFIG_SOC_GPIO_PORT=1 +CONFIG_SOC_GPIO_PIN_COUNT=40 +CONFIG_SOC_GPIO_VALID_GPIO_MASK=0xFFFFFFFFFF +CONFIG_SOC_GPIO_IN_RANGE_MAX=39 +CONFIG_SOC_GPIO_OUT_RANGE_MAX=33 +CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0xEF0FEA +CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX=y +CONFIG_SOC_I2C_NUM=2 +CONFIG_SOC_I2C_FIFO_LEN=32 +CONFIG_SOC_I2C_CMD_REG_NUM=16 +CONFIG_SOC_I2C_SUPPORT_SLAVE=y +CONFIG_SOC_I2C_SUPPORT_APB=y +CONFIG_SOC_I2C_STOP_INDEPENDENT=y +CONFIG_SOC_I2S_NUM=2 +CONFIG_SOC_I2S_HW_VERSION_1=y +CONFIG_SOC_I2S_SUPPORTS_APLL=y +CONFIG_SOC_I2S_SUPPORTS_PLL_F160M=y +CONFIG_SOC_I2S_SUPPORTS_PDM=y +CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y +CONFIG_SOC_I2S_PDM_MAX_TX_LINES=1 +CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y +CONFIG_SOC_I2S_PDM_MAX_RX_LINES=1 +CONFIG_SOC_I2S_SUPPORTS_ADC_DAC=y +CONFIG_SOC_I2S_SUPPORTS_ADC=y +CONFIG_SOC_I2S_SUPPORTS_DAC=y +CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA=y +CONFIG_SOC_I2S_TRANS_SIZE_ALIGN_WORD=y +CONFIG_SOC_I2S_LCD_I80_VARIANT=y +CONFIG_SOC_LCD_I80_SUPPORTED=y +CONFIG_SOC_LCD_I80_BUSES=2 +CONFIG_SOC_LCD_I80_BUS_WIDTH=24 +CONFIG_SOC_LEDC_HAS_TIMER_SPECIFIC_MUX=y +CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y +CONFIG_SOC_LEDC_SUPPORT_REF_TICK=y +CONFIG_SOC_LEDC_SUPPORT_HS_MODE=y +CONFIG_SOC_LEDC_CHANNEL_NUM=8 +CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=20 +CONFIG_SOC_MCPWM_GROUPS=2 +CONFIG_SOC_MCPWM_TIMERS_PER_GROUP=3 +CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP=3 +CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR=2 +CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR=2 +CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR=2 +CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP=3 +CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP=y +CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER=3 +CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP=3 +CONFIG_SOC_MMU_PERIPH_NUM=2 +CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=3 +CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000 +CONFIG_SOC_MPU_REGIONS_MAX_NUM=8 +CONFIG_SOC_PCNT_GROUPS=1 +CONFIG_SOC_PCNT_UNITS_PER_GROUP=8 +CONFIG_SOC_PCNT_CHANNELS_PER_UNIT=2 +CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT=2 +CONFIG_SOC_RMT_GROUPS=1 +CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=8 +CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=8 +CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8 +CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=64 +CONFIG_SOC_RMT_SUPPORT_REF_TICK=y +CONFIG_SOC_RMT_SUPPORT_APB=y +CONFIG_SOC_RMT_CHANNEL_CLK_INDEPENDENT=y +CONFIG_SOC_RTCIO_PIN_COUNT=18 +CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y +CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y +CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y +CONFIG_SOC_SDM_GROUPS=1 +CONFIG_SOC_SDM_CHANNELS_PER_GROUP=8 +CONFIG_SOC_SDM_CLK_SUPPORT_APB=y +CONFIG_SOC_SPI_HD_BOTH_INOUT_SUPPORTED=y +CONFIG_SOC_SPI_AS_CS_SUPPORTED=y +CONFIG_SOC_SPI_PERIPH_NUM=3 +CONFIG_SOC_SPI_DMA_CHAN_NUM=2 +CONFIG_SOC_SPI_MAX_CS_NUM=3 +CONFIG_SOC_SPI_SUPPORT_CLK_APB=y +CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64 +CONFIG_SOC_SPI_MAX_PRE_DIVIDER=8192 +CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y +CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y +CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED=y +CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y +CONFIG_SOC_TIMER_GROUPS=2 +CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=2 +CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=64 +CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=4 +CONFIG_SOC_TIMER_GROUP_SUPPORT_APB=y +CONFIG_SOC_TOUCH_VERSION_1=y +CONFIG_SOC_TOUCH_SENSOR_NUM=10 +CONFIG_SOC_TOUCH_PAD_MEASURE_WAIT_MAX=0xFF +CONFIG_SOC_TWAI_CONTROLLER_NUM=1 +CONFIG_SOC_TWAI_BRP_MIN=2 +CONFIG_SOC_TWAI_CLK_SUPPORT_APB=y +CONFIG_SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT=y +CONFIG_SOC_UART_NUM=3 +CONFIG_SOC_UART_HP_NUM=3 +CONFIG_SOC_UART_SUPPORT_APB_CLK=y +CONFIG_SOC_UART_SUPPORT_REF_TICK=y +CONFIG_SOC_UART_FIFO_LEN=128 +CONFIG_SOC_UART_BITRATE_MAX=5000000 +CONFIG_SOC_SPIRAM_SUPPORTED=y +CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y +CONFIG_SOC_SHA_SUPPORT_PARALLEL_ENG=y +CONFIG_SOC_SHA_ENDIANNESS_BE=y +CONFIG_SOC_SHA_SUPPORT_SHA1=y +CONFIG_SOC_SHA_SUPPORT_SHA256=y +CONFIG_SOC_SHA_SUPPORT_SHA384=y +CONFIG_SOC_SHA_SUPPORT_SHA512=y +CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4 +CONFIG_SOC_MPI_OPERATIONS_NUM=y +CONFIG_SOC_RSA_MAX_BIT_LEN=4096 +CONFIG_SOC_AES_SUPPORT_AES_128=y +CONFIG_SOC_AES_SUPPORT_AES_192=y +CONFIG_SOC_AES_SUPPORT_AES_256=y +CONFIG_SOC_SECURE_BOOT_V1=y +CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=y +CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=32 +CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21 +CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y +CONFIG_SOC_PM_SUPPORT_RTC_FAST_MEM_PD=y +CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD=y +CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y +CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y +CONFIG_SOC_PM_SUPPORT_MODEM_PD=y +CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED=y +CONFIG_SOC_CLK_APLL_SUPPORTED=y +CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED=y +CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256=y +CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y +CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y +CONFIG_SOC_SDMMC_USE_IOMUX=y +CONFIG_SOC_SDMMC_NUM_SLOTS=2 +CONFIG_SOC_WIFI_WAPI_SUPPORT=y +CONFIG_SOC_WIFI_CSI_SUPPORT=y +CONFIG_SOC_WIFI_MESH_SUPPORT=y +CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW=y +CONFIG_SOC_WIFI_NAN_SUPPORT=y +CONFIG_SOC_BLE_SUPPORTED=y +CONFIG_SOC_BLE_MESH_SUPPORTED=y +CONFIG_SOC_BT_CLASSIC_SUPPORTED=y +CONFIG_SOC_BLUFI_SUPPORTED=y +CONFIG_SOC_ULP_HAS_ADC=y +CONFIG_SOC_PHY_COMBO_MODULE=y CONFIG_IDF_CMAKE=y +CONFIG_IDF_TOOLCHAIN="gcc" +CONFIG_IDF_TARGET_ARCH_XTENSA=y +CONFIG_IDF_TARGET_ARCH="xtensa" CONFIG_IDF_TARGET="esp32" +CONFIG_IDF_INIT_VERSION="5.2.1" CONFIG_IDF_TARGET_ESP32=y CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 -# -# SDK tool configuration -# -CONFIG_SDK_TOOLPREFIX="xtensa-esp32-elf-" -# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set -# end of SDK tool configuration - # # Build type # CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y -# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set +# CONFIG_APP_BUILD_TYPE_RAM is not set CONFIG_APP_BUILD_GENERATE_BINARIES=y CONFIG_APP_BUILD_BOOTLOADER=y CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y +# CONFIG_APP_REPRODUCIBLE_BUILD is not set +# CONFIG_APP_NO_BLOBS is not set +# CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +# CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set # end of Build type # -# Application manager +# Bootloader config # -CONFIG_APP_COMPILE_TIME_DATE=y -# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set -# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set -# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set -CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 -# end of Application manager # -# Bootloader config +# Bootloader manager # +CONFIG_BOOTLOADER_COMPILE_TIME_DATE=y +CONFIG_BOOTLOADER_PROJECT_VER=1 +# end of Bootloader manager + +CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set @@ -48,16 +270,27 @@ CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set CONFIG_BOOTLOADER_LOG_LEVEL=3 + +# +# Serial Flash Configurations +# # CONFIG_BOOTLOADER_SPI_CUSTOM_WP_PIN is not set CONFIG_BOOTLOADER_SPI_WP_PIN=7 +# CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set +CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y +# end of Serial Flash Configurations + CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y # CONFIG_BOOTLOADER_FACTORY_RESET is not set # CONFIG_BOOTLOADER_APP_TEST is not set +CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y CONFIG_BOOTLOADER_WDT_ENABLE=y # CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set CONFIG_BOOTLOADER_WDT_TIME_MS=9000 # CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set # CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set # end of Bootloader config @@ -65,20 +298,41 @@ CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 # # Security features # +CONFIG_SECURE_BOOT_V1_SUPPORTED=y # CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set # CONFIG_SECURE_BOOT is not set # CONFIG_SECURE_FLASH_ENC_ENABLED is not set # end of Security features +# +# Application manager +# +CONFIG_APP_COMPILE_TIME_DATE=y +# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set +# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set +# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set +CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 +# end of Application manager + +CONFIG_ESP_ROM_HAS_CRC_LE=y +CONFIG_ESP_ROM_HAS_CRC_BE=y +CONFIG_ESP_ROM_HAS_MZ_CRC32=y +CONFIG_ESP_ROM_HAS_JPEG_DECODE=y +CONFIG_ESP_ROM_HAS_UART_BUF_SWITCH=y +CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y +CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y +CONFIG_ESP_ROM_HAS_SW_FLOAT=y +CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=-1 + # # Serial flasher config # -CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 -CONFIG_ESPTOOLPY_WITH_STUB=y +# CONFIG_ESPTOOLPY_NO_STUB is not set CONFIG_ESPTOOLPY_FLASHMODE_QIO=y # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set # CONFIG_ESPTOOLPY_FLASHMODE_DIO is not set # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set +CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y CONFIG_ESPTOOLPY_FLASHMODE="dio" CONFIG_ESPTOOLPY_FLASHFREQ_80M=y # CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set @@ -90,22 +344,17 @@ CONFIG_ESPTOOLPY_FLASHFREQ="80m" CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set CONFIG_ESPTOOLPY_FLASHSIZE="4MB" -CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y +# CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set CONFIG_ESPTOOLPY_BEFORE_RESET=y # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set CONFIG_ESPTOOLPY_BEFORE="default_reset" CONFIG_ESPTOOLPY_AFTER_RESET=y # CONFIG_ESPTOOLPY_AFTER_NORESET is not set CONFIG_ESPTOOLPY_AFTER="hard_reset" -# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set -CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y -# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set -# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set -CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200 CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 # end of Serial flasher config @@ -113,6 +362,7 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 # Partition Table # # CONFIG_PARTITION_TABLE_SINGLE_APP is not set +# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set # CONFIG_PARTITION_TABLE_TWO_OTA is not set CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" @@ -124,20 +374,25 @@ CONFIG_PARTITION_TABLE_MD5=y # # ESP-PDP11 Configuration # -CONFIG_ESPPDP_HW_WROVER_KIT=y +# CONFIG_ESPPDP_HW_WROVER_KIT is not set # CONFIG_ESPPDP_HW_FINAL is not set +CONFIG_ESPPDP_HW_2432S028=y # end of ESP-PDP11 Configuration # # Compiler options # -# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set +# CONFIG_COMPILER_OPTIMIZATION_DEBUG is not set CONFIG_COMPILER_OPTIMIZATION_SIZE=y # CONFIG_COMPILER_OPTIMIZATION_PERF is not set # CONFIG_COMPILER_OPTIMIZATION_NONE is not set -CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y -# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set +CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y +CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=1 +# CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set +CONFIG_COMPILER_HIDE_PATHS_MACROS=y # CONFIG_COMPILER_CXX_EXCEPTIONS is not set # CONFIG_COMPILER_CXX_RTTI is not set CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y @@ -145,7 +400,11 @@ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y # CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set -# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set +# CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set +# CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set +# CONFIG_COMPILER_DUMP_RTL_FILES is not set +CONFIG_COMPILER_RT_LIB_GCCLIB=y +CONFIG_COMPILER_RT_LIB_NAME="gcc" # end of Compiler options # @@ -155,8 +414,12 @@ CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y # # Application Level Tracing # -# CONFIG_APPTRACE_DEST_TRAX is not set +# CONFIG_APPTRACE_DEST_JTAG is not set CONFIG_APPTRACE_DEST_NONE=y +# CONFIG_APPTRACE_DEST_UART1 is not set +# CONFIG_APPTRACE_DEST_UART2 is not set +CONFIG_APPTRACE_DEST_UART_NONE=y +CONFIG_APPTRACE_UART_TASK_PRIO=1 CONFIG_APPTRACE_LOCK_ENABLE=y # end of Application Level Tracing @@ -164,9 +427,14 @@ CONFIG_APPTRACE_LOCK_ENABLE=y # Bluetooth # CONFIG_BT_ENABLED=y +# CONFIG_BT_BLUEDROID_ENABLED is not set +# CONFIG_BT_NIMBLE_ENABLED is not set +CONFIG_BT_CONTROLLER_ONLY=y +CONFIG_BT_CONTROLLER_ENABLED=y +# CONFIG_BT_CONTROLLER_DISABLED is not set # -# Bluetooth controller +# Controller Options # # CONFIG_BTDM_CTRL_MODE_BLE_ONLY is not set CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY=y @@ -192,67 +460,148 @@ CONFIG_BTDM_CTRL_HCI_MODE_VHCI=y # # MODEM SLEEP Options # -# CONFIG_BTDM_MODEM_SLEEP is not set +CONFIG_BTDM_CTRL_MODEM_SLEEP=y +CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG=y +# CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED is not set +CONFIG_BTDM_CTRL_LPCLK_SEL_MAIN_XTAL=y # end of MODEM SLEEP Options CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF=1 -# end of Bluetooth controller - -# CONFIG_BT_BLUEDROID_ENABLED is not set -# CONFIG_BT_NIMBLE_ENABLED is not set -CONFIG_BT_CONTROLLER_ONLY=y -CONFIG_BT_RESERVE_DRAM=0xdb5c +CONFIG_BTDM_RESERVE_DRAM=0xdb5c +CONFIG_BTDM_CTRL_HLI=y +# end of Controller Options # end of Bluetooth # CONFIG_BLE_MESH is not set # -# CoAP Configuration +# Driver Configurations # -CONFIG_COAP_MBEDTLS_PSK=y -# CONFIG_COAP_MBEDTLS_PKI is not set -# CONFIG_COAP_MBEDTLS_DEBUG is not set -CONFIG_COAP_LOG_DEFAULT_LEVEL=0 -# end of CoAP Configuration # -# Driver configurations +# Legacy ADC Configuration # +CONFIG_ADC_DISABLE_DAC=y +# CONFIG_ADC_SUPPRESS_DEPRECATE_WARN is not set # -# ADC configuration +# Legacy ADC Calibration Configuration # -# CONFIG_ADC_FORCE_XPD_FSM is not set -CONFIG_ADC_DISABLE_DAC=y -# end of ADC configuration +CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y +CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y +CONFIG_ADC_CAL_LUT_ENABLE=y +# CONFIG_ADC_CALI_SUPPRESS_DEPRECATE_WARN is not set +# end of Legacy ADC Calibration Configuration +# end of Legacy ADC Configuration # -# SPI configuration +# SPI Configuration # -# CONFIG_SPI_MASTER_IN_IRAM is not set # CONFIG_SPI_MASTER_ISR_IN_IRAM is not set # CONFIG_SPI_SLAVE_IN_IRAM is not set # CONFIG_SPI_SLAVE_ISR_IN_IRAM is not set -# end of SPI configuration +# end of SPI Configuration # -# TWAI configuration +# TWAI Configuration # # CONFIG_TWAI_ISR_IN_IRAM is not set -# end of TWAI configuration +CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC=y +CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST=y +CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID=y +CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT=y +CONFIG_TWAI_ERRATA_FIX_LISTEN_ONLY_DOM=y +# end of TWAI Configuration # -# UART configuration +# UART Configuration # # CONFIG_UART_ISR_IN_IRAM is not set -# end of UART configuration +# end of UART Configuration # -# RTCIO configuration +# GPIO Configuration # -# CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC is not set -# end of RTCIO configuration -# end of Driver configurations +# CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL is not set +# CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set +# end of GPIO Configuration + +# +# Sigma Delta Modulator Configuration +# +# CONFIG_SDM_CTRL_FUNC_IN_IRAM is not set +# CONFIG_SDM_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_SDM_ENABLE_DEBUG_LOG is not set +# end of Sigma Delta Modulator Configuration + +# +# GPTimer Configuration +# +CONFIG_GPTIMER_ISR_HANDLER_IN_IRAM=y +# CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM is not set +# CONFIG_GPTIMER_ISR_IRAM_SAFE is not set +# CONFIG_GPTIMER_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_GPTIMER_ENABLE_DEBUG_LOG is not set +# end of GPTimer Configuration + +# +# PCNT Configuration +# +# CONFIG_PCNT_CTRL_FUNC_IN_IRAM is not set +# CONFIG_PCNT_ISR_IRAM_SAFE is not set +# CONFIG_PCNT_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_PCNT_ENABLE_DEBUG_LOG is not set +# end of PCNT Configuration + +# +# RMT Configuration +# +# CONFIG_RMT_ISR_IRAM_SAFE is not set +# CONFIG_RMT_RECV_FUNC_IN_IRAM is not set +# CONFIG_RMT_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_RMT_ENABLE_DEBUG_LOG is not set +# end of RMT Configuration + +# +# MCPWM Configuration +# +# CONFIG_MCPWM_ISR_IRAM_SAFE is not set +# CONFIG_MCPWM_CTRL_FUNC_IN_IRAM is not set +# CONFIG_MCPWM_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_MCPWM_ENABLE_DEBUG_LOG is not set +# end of MCPWM Configuration + +# +# I2S Configuration +# +# CONFIG_I2S_ISR_IRAM_SAFE is not set +# CONFIG_I2S_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_I2S_ENABLE_DEBUG_LOG is not set +# end of I2S Configuration + +# +# DAC Configuration +# +# CONFIG_DAC_CTRL_FUNC_IN_IRAM is not set +# CONFIG_DAC_ISR_IRAM_SAFE is not set +# CONFIG_DAC_SUPPRESS_DEPRECATE_WARN is not set +# CONFIG_DAC_ENABLE_DEBUG_LOG is not set +CONFIG_DAC_DMA_AUTO_16BIT_ALIGN=y +# end of DAC Configuration + +# +# LEDC Configuration +# +# CONFIG_LEDC_CTRL_FUNC_IN_IRAM is not set +# end of LEDC Configuration + +# +# I2C Configuration +# +# CONFIG_I2C_ISR_IRAM_SAFE is not set +# CONFIG_I2C_ENABLE_DEBUG_LOG is not set +# end of I2C Configuration +# end of Driver Configurations # # eFuse Bit Manager @@ -270,47 +619,253 @@ CONFIG_EFUSE_MAX_BLK_LEN=192 # CONFIG_ESP_TLS_USING_MBEDTLS=y # CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set +# CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set # CONFIG_ESP_TLS_SERVER is not set # CONFIG_ESP_TLS_PSK_VERIFICATION is not set +# CONFIG_ESP_TLS_INSECURE is not set # end of ESP-TLS # -# ESP32-specific +# ADC and ADC Calibration # -CONFIG_ESP32_ECO3_CACHE_LOCK_FIX=y -# CONFIG_ESP32_REV_MIN_0 is not set -CONFIG_ESP32_REV_MIN_1=y +# CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set +# CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set + +# +# ADC Calibration Configurations +# +CONFIG_ADC_CALI_EFUSE_TP_ENABLE=y +CONFIG_ADC_CALI_EFUSE_VREF_ENABLE=y +CONFIG_ADC_CALI_LUT_ENABLE=y +# end of ADC Calibration Configurations + +CONFIG_ADC_DISABLE_DAC_OUTPUT=y +# end of ADC and ADC Calibration + +# +# Wireless Coexistence +# +# CONFIG_ESP_COEX_SW_COEXIST_ENABLE is not set +# end of Wireless Coexistence + +# +# Common ESP-related +# +CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +# end of Common ESP-related + +# +# Ethernet +# +# CONFIG_ETH_USE_ESP32_EMAC is not set +# CONFIG_ETH_USE_SPI_ETHERNET is not set +# CONFIG_ETH_USE_OPENETH is not set +# end of Ethernet + +# +# Event Loop Library +# +# CONFIG_ESP_EVENT_LOOP_PROFILING is not set +# CONFIG_ESP_EVENT_POST_FROM_ISR is not set +# end of Event Loop Library + +# +# GDB Stub +# +# CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set +# end of GDB Stub + +# +# ESP HTTP client +# +CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y +# CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set +# CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH is not set +# end of ESP HTTP client + +# +# HTTP Server +# +CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 +CONFIG_HTTPD_MAX_URI_LEN=512 +CONFIG_HTTPD_ERR_RESP_NO_DELAY=y +CONFIG_HTTPD_PURGE_BUF_LEN=32 +# CONFIG_HTTPD_LOG_PURGE_DATA is not set +# CONFIG_HTTPD_WS_SUPPORT is not set +# CONFIG_HTTPD_QUEUE_WORK_BLOCKING is not set +# end of HTTP Server + +# +# ESP HTTPS OTA +# +# CONFIG_ESP_HTTPS_OTA_DECRYPT_CB is not set +# CONFIG_ESP_HTTPS_OTA_ALLOW_HTTP is not set +# end of ESP HTTPS OTA + +# +# ESP HTTPS server +# +# CONFIG_ESP_HTTPS_SERVER_ENABLE is not set +# end of ESP HTTPS server + +# +# Hardware Settings +# + +# +# Chip revision +# +CONFIG_ESP32_REV_MIN_0=y +# CONFIG_ESP32_REV_MIN_1 is not set +# CONFIG_ESP32_REV_MIN_1_1 is not set # CONFIG_ESP32_REV_MIN_2 is not set # CONFIG_ESP32_REV_MIN_3 is not set -CONFIG_ESP32_REV_MIN=1 -CONFIG_ESP32_DPORT_WORKAROUND=y -# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set -# CONFIG_ESP32_DEFAULT_CPU_FREQ_160 is not set -CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y -CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 -CONFIG_ESP32_SPIRAM_SUPPORT=y +# CONFIG_ESP32_REV_MIN_3_1 is not set +CONFIG_ESP32_REV_MIN=0 +CONFIG_ESP32_REV_MIN_FULL=0 +CONFIG_ESP_REV_MIN_FULL=0 + +# +# Maximum Supported ESP32 Revision (Rev v3.99) +# +CONFIG_ESP32_REV_MAX_FULL=399 +CONFIG_ESP_REV_MAX_FULL=399 +# end of Chip revision + +# +# MAC Config +# +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y +CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y +# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 +# CONFIG_ESP_MAC_IGNORE_MAC_CRC_ERROR is not set +# CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set +# end of MAC Config + +# +# Sleep Config +# +CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y +CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND=y +# CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set +CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y +# CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set +CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=2000 +# CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set +# CONFIG_ESP_SLEEP_DEBUG is not set +CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y +# end of Sleep Config + +# +# RTC Clock Config +# +CONFIG_RTC_CLK_SRC_INT_RC=y +# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set +# CONFIG_RTC_CLK_SRC_EXT_OSC is not set +# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set +CONFIG_RTC_CLK_CAL_CYCLES=1024 +# end of RTC Clock Config + +# +# Peripheral Control +# +# CONFIG_PERIPH_CTRL_FUNC_IN_IRAM is not set +# end of Peripheral Control + +# +# Main XTAL Config +# +# CONFIG_XTAL_FREQ_26 is not set +CONFIG_XTAL_FREQ_40=y +# CONFIG_XTAL_FREQ_AUTO is not set +CONFIG_XTAL_FREQ=40 +# end of Main XTAL Config +# end of Hardware Settings + +# +# LCD and Touch Panel +# + +# +# LCD Touch Drivers are maintained in the IDF Component Registry +# + +# +# LCD Peripheral Configuration +# +CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE=32 +# CONFIG_LCD_ENABLE_DEBUG_LOG is not set +# end of LCD Peripheral Configuration +# end of LCD and Touch Panel + +# +# ESP NETIF Adapter +# +CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 +CONFIG_ESP_NETIF_TCPIP_LWIP=y +# CONFIG_ESP_NETIF_LOOPBACK is not set +CONFIG_ESP_NETIF_USES_TCPIP_WITH_BSD_API=y +# CONFIG_ESP_NETIF_RECEIVE_REPORT_ERRORS is not set +# CONFIG_ESP_NETIF_L2_TAP is not set +# CONFIG_ESP_NETIF_BRIDGE_EN is not set +# end of ESP NETIF Adapter + +# +# Partition API Configuration +# +# end of Partition API Configuration + +# +# PHY +# +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y +# CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_RF_CAL_PARTIAL=y +# CONFIG_ESP_PHY_RF_CAL_NONE is not set +# CONFIG_ESP_PHY_RF_CAL_FULL is not set +CONFIG_ESP_PHY_CALIBRATION_MODE=0 +# end of PHY + +# +# Power Management +# +# CONFIG_PM_ENABLE is not set +# end of Power Management + +# +# ESP PSRAM +# +CONFIG_SPIRAM=y # # SPI RAM config # +CONFIG_SPIRAM_MODE_QUAD=y CONFIG_SPIRAM_TYPE_AUTO=y # CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set # CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set # CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set -CONFIG_SPIRAM_SIZE=-1 # CONFIG_SPIRAM_SPEED_40M is not set CONFIG_SPIRAM_SPEED_80M=y -CONFIG_SPIRAM=y +CONFIG_SPIRAM_SPEED=80 CONFIG_SPIRAM_BOOT_INIT=y # CONFIG_SPIRAM_IGNORE_NOTFOUND is not set # CONFIG_SPIRAM_USE_MEMMAP is not set # CONFIG_SPIRAM_USE_CAPS_ALLOC is not set CONFIG_SPIRAM_USE_MALLOC=y CONFIG_SPIRAM_MEMTEST=y -CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=1024 +CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384 # CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP is not set -CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=65536 +CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set CONFIG_SPIRAM_CACHE_WORKAROUND=y # @@ -321,7 +876,25 @@ CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_MEMW=y # CONFIG_SPIRAM_CACHE_WORKAROUND_STRATEGY_NOPS is not set # end of SPIRAM cache workaround debugging -# CONFIG_SPIRAM_BANKSWITCH_ENABLE is not set +# +# SPIRAM workaround libraries placement +# +CONFIG_SPIRAM_CACHE_LIBJMP_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBMATH_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBNUMPARSER_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBIO_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBTIME_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBCHAR_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBMEM_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBSTR_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBRAND_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBENV_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBFILE_IN_IRAM=y +CONFIG_SPIRAM_CACHE_LIBMISC_IN_IRAM=y +# end of SPIRAM workaround libraries placement + +CONFIG_SPIRAM_BANKSWITCH_ENABLE=y +CONFIG_SPIRAM_BANKSWITCH_RESERVE=8 # CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY is not set # CONFIG_SPIRAM_OCCUPY_HSPI_HOST is not set CONFIG_SPIRAM_OCCUPY_VSPI_HOST=y @@ -342,207 +915,192 @@ CONFIG_D2WD_PSRAM_CS_IO=10 # end of PSRAM clock and cs IO for ESP32-D2WD # -# PSRAM clock and cs IO for ESP32-PICO +# PSRAM clock and cs IO for ESP32-PICO-D4 # CONFIG_PICO_PSRAM_CS_IO=10 -# end of PSRAM clock and cs IO for ESP32-PICO +# end of PSRAM clock and cs IO for ESP32-PICO-D4 -CONFIG_SPIRAM_2T_MODE=y +# CONFIG_SPIRAM_2T_MODE is not set # end of SPI RAM config +# end of ESP PSRAM -# CONFIG_ESP32_TRAX is not set -CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 -# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set -CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y -CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 -# CONFIG_ESP32_ULP_COPROC_ENABLED is not set -CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0 -CONFIG_ESP32_DEBUG_OCDAWARE=y -# CONFIG_ESP32_BROWNOUT_DET is not set -CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y -# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set -# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set -# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set -CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y -# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set -# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set -# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set -CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 -CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 -CONFIG_ESP32_XTAL_FREQ_40=y -# CONFIG_ESP32_XTAL_FREQ_26 is not set -# CONFIG_ESP32_XTAL_FREQ_AUTO is not set -CONFIG_ESP32_XTAL_FREQ=40 -# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set -# CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set -# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set -CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5 -# end of ESP32-specific - -# -# Power Management -# -# CONFIG_PM_ENABLE is not set -# end of Power Management - -# -# ADC-Calibration -# -CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y -CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y -CONFIG_ADC_CAL_LUT_ENABLE=y -# end of ADC-Calibration - -# -# Common ESP-related -# -CONFIG_ESP_ERR_TO_NAME_LOOKUP=y -CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 -CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 -CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 -CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 -CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y -CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 -CONFIG_ESP_CONSOLE_UART_DEFAULT=y -# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set -# CONFIG_ESP_CONSOLE_UART_NONE is not set -CONFIG_ESP_CONSOLE_UART_NUM=0 -CONFIG_ESP_CONSOLE_UART_TX_GPIO=1 -CONFIG_ESP_CONSOLE_UART_RX_GPIO=3 -CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 -CONFIG_ESP_INT_WDT=y -CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 -CONFIG_ESP_INT_WDT_CHECK_CPU1=y -# CONFIG_ESP_TASK_WDT is not set -# CONFIG_ESP_PANIC_HANDLER_IRAM is not set -CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y -CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y -CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y -CONFIG_ESP_MAC_ADDR_UNIVERSE_BT_OFFSET=2 -CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y -# end of Common ESP-related - -# -# Ethernet -# -# CONFIG_ETH_USE_ESP32_EMAC is not set -# CONFIG_ETH_USE_SPI_ETHERNET is not set -# CONFIG_ETH_USE_OPENETH is not set -# end of Ethernet - -# -# Event Loop Library # -# CONFIG_ESP_EVENT_LOOP_PROFILING is not set -# CONFIG_ESP_EVENT_POST_FROM_ISR is not set -# end of Event Loop Library - -# -# GDB Stub -# -# end of GDB Stub - -# -# ESP HTTP client -# -CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y -# CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set -# end of ESP HTTP client - -# -# HTTP Server +# ESP Ringbuf # -CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 -CONFIG_HTTPD_MAX_URI_LEN=512 -CONFIG_HTTPD_ERR_RESP_NO_DELAY=y -CONFIG_HTTPD_PURGE_BUF_LEN=32 -# CONFIG_HTTPD_LOG_PURGE_DATA is not set -# CONFIG_HTTPD_WS_SUPPORT is not set -# end of HTTP Server +# CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH is not set +# end of ESP Ringbuf # -# ESP HTTPS OTA +# ESP System Settings # -# CONFIG_OTA_ALLOW_HTTP is not set -# end of ESP HTTPS OTA +# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set +# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 is not set +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=240 # -# ESP HTTPS server +# Memory # -# CONFIG_ESP_HTTPS_SERVER_ENABLE is not set -# end of ESP HTTPS server +# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set # -# ESP NETIF Adapter +# Non-backward compatible options # -CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 -CONFIG_ESP_NETIF_TCPIP_LWIP=y -# CONFIG_ESP_NETIF_LOOPBACK is not set -CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y -# end of ESP NETIF Adapter +# CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM is not set +# end of Non-backward compatible options +# end of Memory # -# ESP System Settings +# Trace memory # +# CONFIG_ESP32_TRAX is not set +CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 +# end of Trace memory + CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y # CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set + +# +# Memory protection +# +# end of Memory protection + +CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 +CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y +# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set +# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set +CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 +CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_NONE is not set +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_INT_WDT=y +CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 +CONFIG_ESP_INT_WDT_CHECK_CPU1=y +CONFIG_ESP_TASK_WDT_EN=y +# CONFIG_ESP_TASK_WDT_INIT is not set +# CONFIG_ESP_PANIC_HANDLER_IRAM is not set +# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set +CONFIG_ESP_DEBUG_OCDAWARE=y +CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5=y + +# +# Brownout Detector +# +# CONFIG_ESP_BROWNOUT_DET is not set +# end of Brownout Detector + +# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set +CONFIG_ESP32_ECO3_CACHE_LOCK_FIX=y +CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y # end of ESP System Settings +# +# IPC (Inter-Processor Call) +# +CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 +CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y +CONFIG_ESP_IPC_ISR_ENABLE=y +# end of IPC (Inter-Processor Call) + # # High resolution timer (esp_timer) # # CONFIG_ESP_TIMER_PROFILING is not set +CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y +CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 -# CONFIG_ESP_TIMER_IMPL_FRC2 is not set +CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 +# CONFIG_ESP_TIMER_SHOW_EXPERIMENTAL is not set +CONFIG_ESP_TIMER_TASK_AFFINITY=0x0 +CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0=y +CONFIG_ESP_TIMER_ISR_AFFINITY=0x1 +CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0=y +# CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set CONFIG_ESP_TIMER_IMPL_TG0_LAC=y # end of High resolution timer (esp_timer) # # Wi-Fi # -# CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE is not set -CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=2 -CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=2 -CONFIG_ESP32_WIFI_STATIC_TX_BUFFER=y -CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=0 -CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM=2 -CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=16 -# CONFIG_ESP32_WIFI_CSI_ENABLED is not set -# CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED is not set -# CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED is not set -CONFIG_ESP32_WIFI_NVS_ENABLED=y -# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 is not set -CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1=y -CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 -CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=8 -# CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE is not set -# CONFIG_ESP32_WIFI_IRAM_OPT is not set -# CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set -# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set +CONFIG_ESP_WIFI_ENABLED=y +CONFIG_ESP_WIFI_STATIC_RX_BUFFER_NUM=2 +CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM=2 +CONFIG_ESP_WIFI_STATIC_TX_BUFFER=y +CONFIG_ESP_WIFI_TX_BUFFER_TYPE=0 +CONFIG_ESP_WIFI_STATIC_TX_BUFFER_NUM=2 +CONFIG_ESP_WIFI_CACHE_TX_BUFFER_NUM=32 +CONFIG_ESP_WIFI_STATIC_RX_MGMT_BUFFER=y +# CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUFFER is not set +CONFIG_ESP_WIFI_DYNAMIC_RX_MGMT_BUF=0 +CONFIG_ESP_WIFI_RX_MGMT_BUF_NUM_DEF=5 +# CONFIG_ESP_WIFI_CSI_ENABLED is not set +# CONFIG_ESP_WIFI_AMPDU_TX_ENABLED is not set +# CONFIG_ESP_WIFI_AMPDU_RX_ENABLED is not set +# CONFIG_ESP_WIFI_AMSDU_TX_ENABLED is not set +CONFIG_ESP_WIFI_NVS_ENABLED=y +# CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_0 is not set +CONFIG_ESP_WIFI_TASK_PINNED_TO_CORE_1=y +CONFIG_ESP_WIFI_SOFTAP_BEACON_MAX_LEN=752 +CONFIG_ESP_WIFI_MGMT_SBUF_NUM=8 +# CONFIG_ESP_WIFI_IRAM_OPT is not set +# CONFIG_ESP_WIFI_EXTRA_IRAM_OPT is not set +# CONFIG_ESP_WIFI_RX_IRAM_OPT is not set +# CONFIG_ESP_WIFI_ENABLE_WPA3_SAE is not set +CONFIG_ESP_WIFI_ENABLE_WPA3_OWE_STA=y +# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set +CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE=y +# CONFIG_ESP_WIFI_GMAC_SUPPORT is not set +CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y +# CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT is not set +CONFIG_ESP_WIFI_ESPNOW_MAX_ENCRYPT_NUM=7 +# CONFIG_ESP_WIFI_NAN_ENABLE is not set +CONFIG_ESP_WIFI_MBEDTLS_CRYPTO=y +CONFIG_ESP_WIFI_MBEDTLS_TLS_CLIENT=y +# CONFIG_ESP_WIFI_WAPI_PSK is not set +# CONFIG_ESP_WIFI_11KV_SUPPORT is not set +# CONFIG_ESP_WIFI_MBO_SUPPORT is not set +# CONFIG_ESP_WIFI_DPP_SUPPORT is not set +# CONFIG_ESP_WIFI_11R_SUPPORT is not set +# CONFIG_ESP_WIFI_WPS_SOFTAP_REGISTRAR is not set + +# +# WPS Configuration Options +# +# CONFIG_ESP_WIFI_WPS_STRICT is not set +# CONFIG_ESP_WIFI_WPS_PASSPHRASE is not set +# end of WPS Configuration Options + +# CONFIG_ESP_WIFI_DEBUG_PRINT is not set +# CONFIG_ESP_WIFI_TESTING_OPTIONS is not set +CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT=y +# CONFIG_ESP_WIFI_ENT_FREE_DYNAMIC_BUFFER is not set # end of Wi-Fi -# -# PHY -# -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y -# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 -# end of PHY - # # Core dump # -# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set -# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set -CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y +# CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set +# CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set +CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y # end of Core dump # # FAT Filesystem support # +CONFIG_FATFS_VOLUME_COUNT=2 +CONFIG_FATFS_LFN_NONE=y +# CONFIG_FATFS_LFN_HEAP is not set +# CONFIG_FATFS_LFN_STACK is not set +# CONFIG_FATFS_SECTOR_512 is not set +CONFIG_FATFS_SECTOR_4096=y # CONFIG_FATFS_CODEPAGE_DYNAMIC is not set CONFIG_FATFS_CODEPAGE_437=y # CONFIG_FATFS_CODEPAGE_720 is not set @@ -566,75 +1124,80 @@ CONFIG_FATFS_CODEPAGE_437=y # CONFIG_FATFS_CODEPAGE_949 is not set # CONFIG_FATFS_CODEPAGE_950 is not set CONFIG_FATFS_CODEPAGE=437 -CONFIG_FATFS_LFN_NONE=y -# CONFIG_FATFS_LFN_HEAP is not set -# CONFIG_FATFS_LFN_STACK is not set CONFIG_FATFS_FS_LOCK=0 CONFIG_FATFS_TIMEOUT_MS=10000 CONFIG_FATFS_PER_FILE_CACHE=y -# CONFIG_FATFS_ALLOC_PREFER_EXTRAM is not set +CONFIG_FATFS_ALLOC_PREFER_EXTRAM=y +# CONFIG_FATFS_USE_FASTSEEK is not set +CONFIG_FATFS_VFS_FSTAT_BLKSIZE=0 +# CONFIG_FATFS_IMMEDIATE_FSYNC is not set # end of FAT Filesystem support # -# Modbus configuration -# -CONFIG_FMB_COMM_MODE_RTU_EN=y -CONFIG_FMB_COMM_MODE_ASCII_EN=y -CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND=150 -CONFIG_FMB_MASTER_DELAY_MS_CONVERT=200 -CONFIG_FMB_QUEUE_LENGTH=20 -CONFIG_FMB_SERIAL_TASK_STACK_SIZE=2048 -CONFIG_FMB_SERIAL_BUF_SIZE=256 -CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8 -CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000 -CONFIG_FMB_SERIAL_TASK_PRIO=10 -# CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT is not set -CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20 -CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 -CONFIG_FMB_CONTROLLER_STACK_SIZE=4096 -CONFIG_FMB_EVENT_QUEUE_TIMEOUT=20 -CONFIG_FMB_TIMER_PORT_ENABLED=y -CONFIG_FMB_TIMER_GROUP=0 -CONFIG_FMB_TIMER_INDEX=0 -# CONFIG_FMB_TIMER_ISR_IN_IRAM is not set -# end of Modbus configuration +# FreeRTOS +# # -# FreeRTOS +# Kernel # +# CONFIG_FREERTOS_SMP is not set # CONFIG_FREERTOS_UNICORE is not set -CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF -CONFIG_FREERTOS_CORETIMER_0=y -# CONFIG_FREERTOS_CORETIMER_1 is not set CONFIG_FREERTOS_HZ=1000 -CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL=y # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY is not set -CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y -CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 -CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y -# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set -# CONFIG_FREERTOS_ASSERT_DISABLE is not set CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 -CONFIG_FREERTOS_ISR_STACKSIZE=1536 -# CONFIG_FREERTOS_LEGACY_HOOKS is not set +# CONFIG_FREERTOS_USE_IDLE_HOOK is not set +# CONFIG_FREERTOS_USE_TICK_HOOK is not set CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 -CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y -# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set +# CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set +CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc" CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 +CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES=1 # CONFIG_FREERTOS_USE_TRACE_FACILITY is not set # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set +# end of Kernel + +# +# Port +# +CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK=y +CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y +# CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK is not set +# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y +CONFIG_FREERTOS_ISR_STACKSIZE=1536 +CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y +# CONFIG_FREERTOS_FPU_IN_ISR is not set +CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER=y +CONFIG_FREERTOS_CORETIMER_0=y +# CONFIG_FREERTOS_CORETIMER_1 is not set +CONFIG_FREERTOS_SYSTICK_USES_CCOUNT=y +CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set +# end of Port + +CONFIG_FREERTOS_PORT=y +CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF +CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y CONFIG_FREERTOS_DEBUG_OCDAWARE=y -# CONFIG_FREERTOS_FPU_IN_ISR is not set +CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y +CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH=y # end of FreeRTOS +# +# Hardware Abstraction Layer (HAL) and Low Level (LL) +# +CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y +# CONFIG_HAL_ASSERTION_DISABLE is not set +# CONFIG_HAL_ASSERTION_SILENT is not set +CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=1 +# end of Hardware Abstraction Layer (HAL) and Low Level (LL) + # # Heap memory debugging # @@ -644,31 +1207,29 @@ CONFIG_HEAP_POISONING_DISABLED=y CONFIG_HEAP_TRACING_OFF=y # CONFIG_HEAP_TRACING_STANDALONE is not set # CONFIG_HEAP_TRACING_TOHOST is not set +# CONFIG_HEAP_USE_HOOKS is not set +# CONFIG_HEAP_TASK_TRACKING is not set CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS=y +# CONFIG_HEAP_PLACE_FUNCTION_INTO_FLASH is not set # end of Heap memory debugging -# -# jsmn -# -# CONFIG_JSMN_PARENT_LINKS is not set -# CONFIG_JSMN_STRICT is not set -# end of jsmn - -# -# libsodium -# -# end of libsodium - # # Log output # # CONFIG_LOG_DEFAULT_LEVEL_NONE is not set -# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set +CONFIG_LOG_DEFAULT_LEVEL_ERROR=y # CONFIG_LOG_DEFAULT_LEVEL_WARN is not set -CONFIG_LOG_DEFAULT_LEVEL_INFO=y +# CONFIG_LOG_DEFAULT_LEVEL_INFO is not set # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set -CONFIG_LOG_DEFAULT_LEVEL=3 +CONFIG_LOG_DEFAULT_LEVEL=1 +CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y +# CONFIG_LOG_MAXIMUM_LEVEL_WARN is not set +# CONFIG_LOG_MAXIMUM_LEVEL_INFO is not set +# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set +# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set +CONFIG_LOG_MAXIMUM_LEVEL=1 +# CONFIG_LOG_MASTER_LEVEL is not set CONFIG_LOG_COLORS=y CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set @@ -677,11 +1238,19 @@ CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y # # LWIP # +CONFIG_LWIP_ENABLE=y CONFIG_LWIP_LOCAL_HOSTNAME="esppdp" +# CONFIG_LWIP_NETIF_API is not set +CONFIG_LWIP_TCPIP_TASK_PRIO=18 +# CONFIG_LWIP_TCPIP_CORE_LOCKING is not set +# CONFIG_LWIP_CHECK_THREAD_SAFETY is not set # CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES is not set # CONFIG_LWIP_L2_TO_L3_COPY is not set # CONFIG_LWIP_IRAM_OPTIMIZATION is not set +# CONFIG_LWIP_EXTRA_IRAM_OPTIMIZATION is not set # CONFIG_LWIP_TIMERS_ONDEMAND is not set +CONFIG_LWIP_ND6=y +# CONFIG_LWIP_FORCE_ROUTER_FORWARDING is not set CONFIG_LWIP_MAX_SOCKETS=2 # CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set # CONFIG_LWIP_SO_LINGER is not set @@ -689,34 +1258,48 @@ CONFIG_LWIP_SO_REUSE=y CONFIG_LWIP_SO_REUSE_RXTOALL=y # CONFIG_LWIP_SO_RCVBUF is not set # CONFIG_LWIP_NETBUF_RECVINFO is not set +CONFIG_LWIP_IP_DEFAULT_TTL=64 # CONFIG_LWIP_IP4_FRAG is not set # CONFIG_LWIP_IP6_FRAG is not set # CONFIG_LWIP_IP4_REASSEMBLY is not set # CONFIG_LWIP_IP6_REASSEMBLY is not set +CONFIG_LWIP_IP_REASS_MAX_PBUFS=10 # CONFIG_LWIP_IP_FORWARD is not set # CONFIG_LWIP_STATS is not set -# CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set # CONFIG_LWIP_ESP_GRATUITOUS_ARP is not set +CONFIG_LWIP_ESP_MLDV6_REPORT=y +CONFIG_LWIP_MLDV6_TMR_INTERVAL=40 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=6 CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y +# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set +CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set +CONFIG_LWIP_DHCP_OPTIONS_LEN=68 +CONFIG_LWIP_NUM_NETIF_CLIENT_DATA=0 +CONFIG_LWIP_DHCP_COARSE_TIMER_SECS=1 # # DHCP server # +CONFIG_LWIP_DHCPS=y CONFIG_LWIP_DHCPS_LEASE_UNIT=60 CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 +CONFIG_LWIP_DHCPS_STATIC_ENTRIES=y # end of DHCP server # CONFIG_LWIP_AUTOIP is not set +CONFIG_LWIP_IPV4=y +CONFIG_LWIP_IPV6=y # CONFIG_LWIP_IPV6_AUTOCONFIG is not set +CONFIG_LWIP_IPV6_NUM_ADDRESSES=3 +# CONFIG_LWIP_IPV6_FORWARD is not set +# CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set CONFIG_LWIP_NETIF_LOOPBACK=y CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 # # TCP # -CONFIG_LWIP_TCP_ISN_HOOK=y CONFIG_LWIP_MAX_ACTIVE_TCP=16 CONFIG_LWIP_MAX_LISTENING_TCP=16 CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y @@ -725,12 +1308,14 @@ CONFIG_LWIP_TCP_SYNMAXRTX=6 CONFIG_LWIP_TCP_MSS=1440 CONFIG_LWIP_TCP_TMR_INTERVAL=250 CONFIG_LWIP_TCP_MSL=60000 +CONFIG_LWIP_TCP_FIN_WAIT_TIMEOUT=20000 CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 CONFIG_LWIP_TCP_WND_DEFAULT=5744 CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 CONFIG_LWIP_TCP_QUEUE_OOSEQ=y +CONFIG_LWIP_TCP_OOSEQ_TIMEOUT=6 +CONFIG_LWIP_TCP_OOSEQ_MAX_PBUFS=4 # CONFIG_LWIP_TCP_SACK_OUT is not set -# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set CONFIG_LWIP_TCP_OVERSIZE_MSS=y # CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set # CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set @@ -744,6 +1329,14 @@ CONFIG_LWIP_MAX_UDP_PCBS=16 CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 # end of UDP +# +# Checksums +# +# CONFIG_LWIP_CHECKSUM_CHECK_IP is not set +# CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set +CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y +# end of Checksums + CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 # CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY is not set # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set @@ -752,10 +1345,12 @@ CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x1 # CONFIG_LWIP_PPP_SUPPORT is not set CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 +# CONFIG_LWIP_SLIP_SUPPORT is not set # # ICMP # +CONFIG_LWIP_ICMP=y # CONFIG_LWIP_MULTICAST_PING is not set # CONFIG_LWIP_BROADCAST_PING is not set # end of ICMP @@ -769,11 +1364,45 @@ CONFIG_LWIP_MAX_RAW_PCBS=16 # # SNTP # -CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 +CONFIG_LWIP_SNTP_MAX_SERVERS=1 +# CONFIG_LWIP_DHCP_GET_NTP_SRV is not set CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 # end of SNTP +# +# DNS +# +CONFIG_LWIP_DNS_MAX_SERVERS=3 +# CONFIG_LWIP_FALLBACK_DNS_SERVER_SUPPORT is not set +# end of DNS + +CONFIG_LWIP_BRIDGEIF_MAX_PORTS=7 CONFIG_LWIP_ESP_LWIP_ASSERT=y + +# +# Hooks +# +# CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set +CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y +# CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set +CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y +# CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set +# CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set +CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y +# CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set +# CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set +CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_NONE=y +# CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_DEFAULT is not set +# CONFIG_LWIP_HOOK_IP6_SELECT_SRC_ADDR_CUSTOM is not set +CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set +CONFIG_LWIP_HOOK_IP6_INPUT_NONE=y +# CONFIG_LWIP_HOOK_IP6_INPUT_DEFAULT is not set +# CONFIG_LWIP_HOOK_IP6_INPUT_CUSTOM is not set +# end of Hooks + +# CONFIG_LWIP_DEBUG is not set # end of LWIP # @@ -786,9 +1415,26 @@ CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 -# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set # CONFIG_MBEDTLS_DEBUG is not set +# +# mbedTLS v3.x related +# +# CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 is not set +# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set +# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set +# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set +CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y +CONFIG_MBEDTLS_PKCS7_C=y + +# +# DTLS-based configurations +# +# CONFIG_MBEDTLS_SSL_DTLS_CONNECTION_ID is not set +# CONFIG_MBEDTLS_SSL_DTLS_SRTP is not set +# end of DTLS-based configurations +# end of mbedTLS v3.x related + # # Certificate Bundle # @@ -797,16 +1443,19 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set # CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 # end of Certificate Bundle # CONFIG_MBEDTLS_ECP_RESTARTABLE is not set -# CONFIG_MBEDTLS_CMAC_C is not set +CONFIG_MBEDTLS_CMAC_C=y CONFIG_MBEDTLS_HARDWARE_AES=y CONFIG_MBEDTLS_HARDWARE_MPI=y CONFIG_MBEDTLS_HARDWARE_SHA=y +CONFIG_MBEDTLS_ROM_MD5=y # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set CONFIG_MBEDTLS_HAVE_TIME=y +# CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set # CONFIG_MBEDTLS_HAVE_TIME_DATE is not set CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y CONFIG_MBEDTLS_SHA512_C=y @@ -823,11 +1472,9 @@ CONFIG_MBEDTLS_TLS_ENABLED=y # CONFIG_MBEDTLS_PSK_MODES=y CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y -CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y -CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y @@ -836,10 +1483,8 @@ CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y # end of TLS Key Exchange Methods CONFIG_MBEDTLS_SSL_RENEGOTIATION=y -# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set -CONFIG_MBEDTLS_SSL_PROTO_TLS1=y -CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y +# CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y @@ -851,13 +1496,11 @@ CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y CONFIG_MBEDTLS_AES_C=y # CONFIG_MBEDTLS_CAMELLIA_C is not set # CONFIG_MBEDTLS_DES_C is not set -CONFIG_MBEDTLS_RC4_DISABLED=y -# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set -# CONFIG_MBEDTLS_RC4_ENABLED is not set # CONFIG_MBEDTLS_BLOWFISH_C is not set # CONFIG_MBEDTLS_XTEA_C is not set CONFIG_MBEDTLS_CCM_C=y CONFIG_MBEDTLS_GCM_C=y +# CONFIG_MBEDTLS_NIST_KW_C is not set # end of Symmetric Ciphers # CONFIG_MBEDTLS_RIPEMD160_C is not set @@ -872,6 +1515,7 @@ CONFIG_MBEDTLS_X509_CSR_PARSE_C=y # end of Certificates CONFIG_MBEDTLS_ECP_C=y +# CONFIG_MBEDTLS_DHM_C is not set CONFIG_MBEDTLS_ECDH_C=y CONFIG_MBEDTLS_ECDSA_C=y # CONFIG_MBEDTLS_ECJPAKE_C is not set @@ -888,34 +1532,25 @@ CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y CONFIG_MBEDTLS_ECP_NIST_OPTIM=y +CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM=y # CONFIG_MBEDTLS_POLY1305_C is not set # CONFIG_MBEDTLS_CHACHA20_C is not set # CONFIG_MBEDTLS_HKDF_C is not set # CONFIG_MBEDTLS_THREADING_C is not set -# CONFIG_MBEDTLS_SECURITY_RISKS is not set +# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set # end of mbedTLS -# -# mDNS -# -CONFIG_MDNS_MAX_SERVICES=10 -CONFIG_MDNS_TASK_PRIORITY=1 -CONFIG_MDNS_TASK_STACK_SIZE=4096 -# CONFIG_MDNS_TASK_AFFINITY_NO_AFFINITY is not set -CONFIG_MDNS_TASK_AFFINITY_CPU0=y -# CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set -CONFIG_MDNS_TASK_AFFINITY=0x0 -CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000 -CONFIG_MDNS_TIMER_PERIOD_MS=100 -# end of mDNS - # # ESP-MQTT Configurations # CONFIG_MQTT_PROTOCOL_311=y +# CONFIG_MQTT_PROTOCOL_5 is not set CONFIG_MQTT_TRANSPORT_SSL=y CONFIG_MQTT_TRANSPORT_WEBSOCKET=y CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y +# CONFIG_MQTT_MSG_ID_INCREMENTAL is not set +# CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set +# CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set # CONFIG_MQTT_USE_CUSTOM_CONFIG is not set # CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set # CONFIG_MQTT_CUSTOM_OUTBOX is not set @@ -931,20 +1566,53 @@ CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y # CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y # CONFIG_NEWLIB_NANO_FORMAT is not set +CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y +# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set # end of Newlib # # NVS # +# CONFIG_NVS_ASSERT_ERROR_CHECK is not set +# CONFIG_NVS_LEGACY_DUP_KEYS_COMPATIBILITY is not set # end of NVS # -# OpenSSL +# OpenThread +# +# CONFIG_OPENTHREAD_ENABLED is not set + +# +# Thread Operational Dataset +# +CONFIG_OPENTHREAD_NETWORK_NAME="OpenThread-ESP" +CONFIG_OPENTHREAD_MESH_LOCAL_PREFIX="fd00:db8:a0:0::/64" +CONFIG_OPENTHREAD_NETWORK_CHANNEL=15 +CONFIG_OPENTHREAD_NETWORK_PANID=0x1234 +CONFIG_OPENTHREAD_NETWORK_EXTPANID="dead00beef00cafe" +CONFIG_OPENTHREAD_NETWORK_MASTERKEY="00112233445566778899aabbccddeeff" +CONFIG_OPENTHREAD_NETWORK_PSKC="104810e2315100afd6bc9215a6bfac53" +# end of Thread Operational Dataset + +CONFIG_OPENTHREAD_XTAL_ACCURACY=130 +# CONFIG_OPENTHREAD_SPINEL_ONLY is not set +CONFIG_OPENTHREAD_RX_ON_WHEN_IDLE=y + +# +# Thread Address Query Config # -# CONFIG_OPENSSL_DEBUG is not set -# CONFIG_OPENSSL_ASSERT_DO_NOTHING is not set -CONFIG_OPENSSL_ASSERT_EXIT=y -# end of OpenSSL +# end of Thread Address Query Config +# end of OpenThread + +# +# Protocomm +# +CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0=y +CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1=y +CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2=y +# end of Protocomm # # PThreads @@ -959,6 +1627,35 @@ CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" # end of PThreads +# +# MMU Config +# +CONFIG_MMU_PAGE_SIZE_64KB=y +CONFIG_MMU_PAGE_MODE="64KB" +CONFIG_MMU_PAGE_SIZE=0x10000 +# end of MMU Config + +# +# Main Flash configuration +# + +# +# SPI Flash behavior when brownout +# +CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y +CONFIG_SPI_FLASH_BROWNOUT_RESET=y +# end of SPI Flash behavior when brownout + +# +# Optional and Experimental Features (READ DOCS FIRST) +# + +# +# Features here require specific hardware (READ DOCS FIRST!) +# +# end of Optional and Experimental Features (READ DOCS FIRST) +# end of Main Flash configuration + # # SPI Flash driver # @@ -968,20 +1665,33 @@ CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y # CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set # CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set -# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set # CONFIG_SPI_FLASH_SHARE_SPI1_BUS is not set # CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 +CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 +# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set +# CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set +# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set # # Auto-detect flash chips # +CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORTED=y +CONFIG_SPI_FLASH_VENDOR_GD_SUPPORTED=y +CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORTED=y +CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORTED=y +CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORTED=y CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y +CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y +# CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP is not set +# CONFIG_SPI_FLASH_SUPPORT_TH_CHIP is not set # end of Auto-detect flash chips + +CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y # end of SPI Flash driver # @@ -1021,22 +1731,30 @@ CONFIG_SPIFFS_USE_MTIME=y # end of SPIFFS Configuration # -# TinyUSB +# TCP Transport +# + +# +# Websocket # +CONFIG_WS_TRANSPORT=y +CONFIG_WS_BUFFER_SIZE=1024 +# CONFIG_WS_DYNAMIC_BUFFER is not set +# end of Websocket +# end of TCP Transport # -# Descriptor configuration +# Ultra Low Power (ULP) Co-processor # -CONFIG_USB_DESC_CUSTOM_VID=0x1234 -CONFIG_USB_DESC_CUSTOM_PID=0x5678 -# end of Descriptor configuration -# end of TinyUSB +# CONFIG_ULP_COPROC_ENABLED is not set +# end of Ultra Low Power (ULP) Co-processor # # Unity unit testing library # CONFIG_UNITY_ENABLE_FLOAT=y CONFIG_UNITY_ENABLE_DOUBLE=y +# CONFIG_UNITY_ENABLE_64BIT is not set # CONFIG_UNITY_ENABLE_COLOR is not set CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y # CONFIG_UNITY_ENABLE_FIXTURE is not set @@ -1050,13 +1768,14 @@ CONFIG_VFS_SUPPORT_IO=y CONFIG_VFS_SUPPORT_DIR=y CONFIG_VFS_SUPPORT_SELECT=y CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y +# CONFIG_VFS_SELECT_IN_RAM is not set CONFIG_VFS_SUPPORT_TERMIOS=y +CONFIG_VFS_MAX_COUNT=8 # # Host File System I/O (Semihosting) # CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 -CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 # end of Host File System I/O (Semihosting) # end of Virtual file system @@ -1073,26 +1792,22 @@ CONFIG_WL_SECTOR_SIZE=4096 # CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30 +# CONFIG_WIFI_PROV_BLE_BONDING is not set +# CONFIG_WIFI_PROV_BLE_FORCE_ENCRYPTION is not set +# CONFIG_WIFI_PROV_KEEP_BLE_ON_AFTER_PROV is not set +CONFIG_WIFI_PROV_STA_ALL_CHANNEL_SCAN=y +# CONFIG_WIFI_PROV_STA_FAST_SCAN is not set # end of Wi-Fi Provisioning Manager - -# -# Supplicant -# -CONFIG_WPA_MBEDTLS_CRYPTO=y -# CONFIG_WPA_DEBUG_PRINT is not set -# CONFIG_WPA_TESTING_OPTIONS is not set -# CONFIG_WPA_WPS_WARS is not set -# end of Supplicant # end of Component config -# -# Compatibility options -# -CONFIG_LEGACY_INCLUDE_COMMON_HEADERS=y -# end of Compatibility options +# CONFIG_IDF_EXPERIMENTAL_FEATURES is not set # Deprecated options for backward compatibility -CONFIG_TOOLPREFIX="xtensa-esp32-elf-" +# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set +# CONFIG_NO_BLOBS is not set +# CONFIG_ESP32_NO_BLOBS is not set +# CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +# CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set # CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set # CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set # CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set @@ -1106,30 +1821,27 @@ CONFIG_FLASHMODE_QIO=y # CONFIG_FLASHMODE_QOUT is not set # CONFIG_FLASHMODE_DIO is not set # CONFIG_FLASHMODE_DOUT is not set -# CONFIG_MONITOR_BAUD_9600B is not set -# CONFIG_MONITOR_BAUD_57600B is not set -CONFIG_MONITOR_BAUD_115200B=y -# CONFIG_MONITOR_BAUD_230400B is not set -# CONFIG_MONITOR_BAUD_921600B is not set -# CONFIG_MONITOR_BAUD_2MB is not set -# CONFIG_MONITOR_BAUD_OTHER is not set -CONFIG_MONITOR_BAUD_OTHER_VAL=115200 CONFIG_MONITOR_BAUD=115200 +# CONFIG_OPTIMIZATION_LEVEL_DEBUG is not set # CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set +# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set +CONFIG_OPTIMIZATION_LEVEL_RELEASE=y CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y -CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y -# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set +CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set +CONFIG_OPTIMIZATION_ASSERTION_LEVEL=1 # CONFIG_CXX_EXCEPTIONS is not set CONFIG_STACK_CHECK_NONE=y # CONFIG_STACK_CHECK_NORM is not set # CONFIG_STACK_CHECK_STRONG is not set # CONFIG_STACK_CHECK_ALL is not set # CONFIG_WARN_WRITE_STRINGS is not set -# CONFIG_DISABLE_GCC8_WARNINGS is not set # CONFIG_ESP32_APPTRACE_DEST_TRAX is not set CONFIG_ESP32_APPTRACE_DEST_NONE=y CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y +# CONFIG_BLUEDROID_ENABLED is not set +# CONFIG_NIMBLE_ENABLED is not set # CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY is not set CONFIG_BTDM_CONTROLLER_MODE_BR_EDR_ONLY=y # CONFIG_BTDM_CONTROLLER_MODE_BTDM is not set @@ -1141,69 +1853,112 @@ CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0 CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=1 CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI=y # CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4 is not set -# CONFIG_BTDM_CONTROLLER_MODEM_SLEEP is not set -# CONFIG_BLUEDROID_ENABLED is not set -# CONFIG_NIMBLE_ENABLED is not set +CONFIG_BTDM_CONTROLLER_MODEM_SLEEP=y CONFIG_ADC2_DISABLE_DAC=y -CONFIG_SPIRAM_SUPPORT=y -# CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST is not set -CONFIG_TRACEMEM_RESERVE_DRAM=0x0 +# CONFIG_MCPWM_ISR_IN_IRAM is not set +# CONFIG_SW_COEXIST_ENABLE is not set +# CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE is not set +# CONFIG_ESP_WIFI_SW_COEXIST_ENABLE is not set +# CONFIG_EVENT_LOOP_PROFILING is not set +# CONFIG_POST_EVENTS_FROM_ISR is not set +# CONFIG_OTA_ALLOW_HTTP is not set # CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 -# CONFIG_ULP_COPROC_ENABLED is not set -CONFIG_ULP_COPROC_RESERVE_MEM=0 -# CONFIG_BROWNOUT_DET is not set +CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y +# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set +# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set +# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set -# CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set -# CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 +# CONFIG_ESP32_XTAL_FREQ_26 is not set +CONFIG_ESP32_XTAL_FREQ_40=y +# CONFIG_ESP32_XTAL_FREQ_AUTO is not set +CONFIG_ESP32_XTAL_FREQ=40 +CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_SPIRAM_SUPPORT=y +CONFIG_ESP32_SPIRAM_SUPPORT=y +# CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST is not set +# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set +# CONFIG_ESP32_DEFAULT_CPU_FREQ_160 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y +CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 +CONFIG_TRACEMEM_RESERVE_DRAM=0x0 +CONFIG_ESP32_PANIC_PRINT_HALT=y +# CONFIG_ESP32_PANIC_PRINT_REBOOT is not set +# CONFIG_ESP32_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP32_PANIC_GDBSTUB is not set CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 CONFIG_MAIN_TASK_STACK_SIZE=3584 -CONFIG_IPC_TASK_STACK_SIZE=1024 CONFIG_CONSOLE_UART_DEFAULT=y # CONFIG_CONSOLE_UART_CUSTOM is not set # CONFIG_CONSOLE_UART_NONE is not set +# CONFIG_ESP_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART=y CONFIG_CONSOLE_UART_NUM=0 -CONFIG_CONSOLE_UART_TX_GPIO=1 -CONFIG_CONSOLE_UART_RX_GPIO=3 CONFIG_CONSOLE_UART_BAUDRATE=115200 CONFIG_INT_WDT=y CONFIG_INT_WDT_TIMEOUT_MS=300 CONFIG_INT_WDT_CHECK_CPU1=y # CONFIG_TASK_WDT is not set -# CONFIG_EVENT_LOOP_PROFILING is not set -# CONFIG_POST_EVENTS_FROM_ISR is not set -CONFIG_ESP32S2_PANIC_PRINT_HALT=y -# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set -# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set -# CONFIG_ESP32S2_PANIC_GDBSTUB is not set +# CONFIG_ESP_TASK_WDT is not set +# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set +CONFIG_ESP32_DEBUG_OCDAWARE=y +# CONFIG_BROWNOUT_DET is not set +# CONFIG_ESP32_BROWNOUT_DET is not set +# CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set +CONFIG_IPC_TASK_STACK_SIZE=1024 CONFIG_TIMER_TASK_STACK_SIZE=3584 -# CONFIG_SW_COEXIST_ENABLE is not set -CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND=150 -CONFIG_MB_MASTER_DELAY_MS_CONVERT=200 -CONFIG_MB_QUEUE_LENGTH=20 -CONFIG_MB_SERIAL_TASK_STACK_SIZE=2048 -CONFIG_MB_SERIAL_BUF_SIZE=256 -CONFIG_MB_SERIAL_TASK_PRIO=10 -# CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT is not set -CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20 -CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 -CONFIG_MB_CONTROLLER_STACK_SIZE=4096 -CONFIG_MB_EVENT_QUEUE_TIMEOUT=20 -CONFIG_MB_TIMER_PORT_ENABLED=y -CONFIG_MB_TIMER_GROUP=0 -CONFIG_MB_TIMER_INDEX=0 -CONFIG_SUPPORT_STATIC_ALLOCATION=y -# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_ESP32_WIFI_ENABLED=y +CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=2 +CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=2 +CONFIG_ESP32_WIFI_STATIC_TX_BUFFER=y +CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=0 +CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM=2 +CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_CSI_ENABLED is not set +# CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED is not set +# CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED is not set +# CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED is not set +# CONFIG_ESP32_WIFI_AMSDU_TX_ENABLED is not set +CONFIG_ESP32_WIFI_NVS_ENABLED=y +# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0 is not set +CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1=y +CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 +CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=8 +# CONFIG_ESP32_WIFI_IRAM_OPT is not set +# CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set +# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set +CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA=y +CONFIG_WPA_MBEDTLS_CRYPTO=y +CONFIG_WPA_MBEDTLS_TLS_CLIENT=y +# CONFIG_WPA_WAPI_PSK is not set +# CONFIG_WPA_11KV_SUPPORT is not set +# CONFIG_WPA_MBO_SUPPORT is not set +# CONFIG_WPA_DPP_SUPPORT is not set +# CONFIG_WPA_11R_SUPPORT is not set +# CONFIG_WPA_WPS_SOFTAP_REGISTRAR is not set +# CONFIG_WPA_WPS_STRICT is not set +# CONFIG_WPA_DEBUG_PRINT is not set +# CONFIG_WPA_TESTING_OPTIONS is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set +CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y CONFIG_TIMER_TASK_PRIORITY=1 CONFIG_TIMER_TASK_STACK_DEPTH=2048 CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +# CONFIG_HAL_ASSERTION_SILIENT is not set # CONFIG_L2_TO_L3_COPY is not set -# CONFIG_USE_ONLY_LWIP_SELECT is not set # CONFIG_ESP_GRATUITOUS_ARP is not set CONFIG_TCPIP_RECVMBOX_SIZE=6 CONFIG_TCP_MAXRTX=12 @@ -1214,7 +1969,6 @@ CONFIG_TCP_SND_BUF_DEFAULT=5744 CONFIG_TCP_WND_DEFAULT=5744 CONFIG_TCP_RECVMBOX_SIZE=6 CONFIG_TCP_QUEUE_OOSEQ=y -# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set CONFIG_TCP_OVERSIZE_MSS=y # CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set # CONFIG_TCP_OVERSIZE_DISABLE is not set @@ -1225,6 +1979,12 @@ CONFIG_TCPIP_TASK_STACK_SIZE=3072 CONFIG_TCPIP_TASK_AFFINITY_CPU1=y CONFIG_TCPIP_TASK_AFFINITY=0x1 # CONFIG_PPP_SUPPORT is not set +CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT=y +CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y +# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_HRT is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 CONFIG_ESP32_PTHREAD_STACK_MIN=768 @@ -1236,8 +1996,8 @@ CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set +# CONFIG_ESP32_ULP_COPROC_ENABLED is not set CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y CONFIG_SUPPORT_TERMIOS=y CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 -CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 # End of deprecated options