Include /usr/include/CL in makefiles

[AdrFebles]

Hi!

I installed XRT using this .deb:
xrt_202320.2.16.204_20.04-amd64-xrt.deb

After that I have this files in the include folder for CL in XRT:

/opt/xilinx/xrt/include/CL$ ls
cl2xrt.hpp  cl_ext.h  cl_ext_xilinx.h

When I try to build the project with mode = "hw" I got an error because the code doesn't find:

fatal error: CL/cl2.hpp: No such file or directory
   33 | #include <CL/cl2.hpp>

I solved it by mounting not only xrt as a volume, but also the CL folder when starting the container:

-v /tools/Xilinx/:/tools/Xilinx/ \
-v /usr/include/CL:/usr/include/CL \
-v /opt/xilinx/xrt:/opt/xilinx/xrt \

But I reached a point where I cannot edit the makefile to pass the correct CL path to the compiler:
I need line 76 of makefile_zynqmp.mk in top.prj to include the CL folder:

CXXFLAGS += -I$(XILINX_XRT)/include -I$(XILINX_VIVADO)/include -I/usr/include/CL -Wall -O0 -g -std=c++1y

Thanks in advance.
Best regards!

[chhzh123]

In this case, maybe you can directly run the make command. For example,

make run TARGET=hw PLATFORM=$XDEVICE

Depending on what device you want to target and which mode you want to run.

[AdrFebles]

Hi @chhzh123,

Whit this command I got an error, it uses makefile_us_alveo.mk while I defined the platform for zynqmp common image folder:

sudo cp xilinx-zynqmp-common-v2023.2.tar.gz /tools/Xilinx/Vitis/2023.2/edge_common_sw
sudo tar -xvf xilinx-zynqmp-common-v2023.2_10140544.tar.gz
export EDGE_COMMON_SW=/tools/Xilinx/Vitis/2023.2/edge_common_sw
export XDEVICE=/tools/Xilinx/Vitis/2023.2/base_platforms/xilinx_zcu102_base_202320_1/xilinx_zcu102_base_202320_1.xpfm

Error logs:

(allo) root@3930b2a40f1d:/work/examples/torch/top.prj# make run TARGET=hw PLATFORM=$XDEVICE
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/tools/Xilinx/Vitis/2023.2/bin/rdiArgs.sh: line 37: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
terminate called after throwing an instance of 'std::runtime_error'
  what():  locale::facet::_S_create_c_locale name not valid
/tools/Xilinx/Vitis/2023.2/bin/rdiArgs.sh: line 369:   934 Aborted                 (core dumped) "$RDI_PROG" "$@"
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/tools/Xilinx/Vitis/2023.2/bin/rdiArgs.sh: line 37: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
terminate called after throwing an instance of 'std::runtime_error'
  what():  locale::facet::_S_create_c_locale name not valid
/tools/Xilinx/Vitis/2023.2/bin/rdiArgs.sh: line 369:  1010 Aborted                 (core dumped) "$RDI_PROG" "$@"
/bin/sh: 12: [[: not found
/bin/sh: 12: [[: not found
/bin/sh: 15: [[: not found
/bin/sh: 18: [[: not found
mkdir -p ./_x.hw.xilinx_zcu102_base_202320_1
v++ -c --save-temps  -t hw --platform /tools/Xilinx/Vitis/2023.2/base_platforms/xilinx_zcu102_base_202320_1/xilinx_zcu102_base_202320_1.xpfm -k forward --temp_dir ./_x.hw.xilinx_zcu102_base_202320_1  -I'.' -o'_x.hw.xilinx_zcu102_base_202320_1/forward.xo' kernel.cpp
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/tools/Xilinx/Vitis/2023.2/bin/rdiArgs.sh: line 37: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
/bin/bash: warning: setlocale: LC_ALL: cannot change locale (en_US.UTF-8)
terminate called after throwing an instance of 'std::runtime_error'
  what():  locale::facet::_S_create_c_locale name not valid
/tools/Xilinx/Vitis/2023.2/bin/rdiArgs.sh: line 369:  1130 Aborted                 (core dumped) "$RDI_PROG" "$@"
make: *** [makefile_us_alveo.mk:95: _x.hw.xilinx_zcu102_base_202320_1/forward.xo] Error 134

locale:

(allo) root@3930b2a40f1d:/work/examples/torch/top.prj# locale
locale: Cannot set LC_CTYPE to default locale: No such file or directory
locale: Cannot set LC_MESSAGES to default locale: No such file or directory
locale: Cannot set LC_ALL to default locale: No such file or directory
LANG=en_US.UTF-8
LANGUAGE=
LC_CTYPE="en_US.UTF-8"
LC_NUMERIC="en_US.UTF-8"
LC_TIME="en_US.UTF-8"
LC_COLLATE="en_US.UTF-8"
LC_MONETARY="en_US.UTF-8"
LC_MESSAGES="en_US.UTF-8"
LC_PAPER="en_US.UTF-8"
LC_NAME="en_US.UTF-8"
LC_ADDRESS="en_US.UTF-8"
LC_TELEPHONE="en_US.UTF-8"
LC_MEASUREMENT="en_US.UTF-8"
LC_IDENTIFICATION="en_US.UTF-8"
LC_ALL=en_US.UTF-8

Any idea about how to solve it?
Best regards!

[chhzh123]

Hi, can you check whether your device (xilinx_zcu102) can be programmed using v++? Maybe try some official examples from AMD first?

[AdrFebles]

I realized the Allo container didn't have the Xilinx environmet completely configured. Therefore, I ran the build command outside the container:
make run TARGET=hw PLATFORM=$XDEVICE

This time I got an error related to the clock specification:

INFO: [v++ 60-895]   Target platform: /tools/Xilinx/Vitis/2023.2/base_platforms/xilinx_zcu102_base_202320_1/xilinx_zcu102_base_202320_1.xpfm
INFO: [v++ 60-1578]   This platform contains Xilinx Shell Archive '/tools/Xilinx/Vitis/2023.2/base_platforms/xilinx_zcu102_base_202320_1/hw/hw.xsa'
INFO: [v++ 60-629] Linking for hardware target
INFO: [v++ 60-423]   Target device: xilinx_zcu102_base_202320_1
ERROR: [v++ 60-2505] Option '--kernel_frequency' is used with a platform that does not have scalable kernel clocks. Please use '--clock.defaultFreqHz arg' instead.
ERROR: [v++ 60-628] Kernel link setup failed to complete
ERROR: [v++ 60-703] Failed to finish linking
INFO: [v++ 60-1653] Closing dispatch client.
make: *** [makefile_zynqmp.mk:140: build_dir.hw.xilinx_zcu102_base_202320_1/forward.link.xclbin] Error 1

So I replaced --kernel_frequency 300 with --clock.defaultFreqHz 300 in the makefile_zynqmp.mk

After that I received another error related to clock outputs in Vivado:

I attach the build folder.
Thanks for your help!

[chhzh123]

It seems there was no attachment included in your comment. Could you share a screenshot of the error?

Also, it might be helpful to search the Xilinx forum for these issues — they appear to be related to environment configuration. For the build files, we rely directly on Xilinx’s own infrastructure, so if something isn’t working as expected, it’s likely an issue on the Xilinx side.

[AdrFebles]

logs/link:

vivado.log

v++.log

link.steps.log

logs/forward:

forward.steps.log

forward_vitis_hls.log

@chhzh123, sorry, here are the log files. Could you take a look at them to verify that the problem is indeed with my Xilinx environment?

Thanks again

[AdrFebles]

Hello @chhzh123, the compilation process was successfully completed after changing the clock frequency to 150 MHz for the ZCU102 board. I was able to obtain the files of the SD card and flash an SD card with sd_card.img.
Could you share the user and password of the image to the login with this image?

Thanks!