From b1b8543fa27f15fc7bdfb9ed46870788c8ca8ba6 Mon Sep 17 00:00:00 2001 From: zu2 <3023910+zu2@users.noreply.github.com> Date: Tue, 16 Dec 2025 15:59:18 +0900 Subject: [PATCH] mach/mc6800: Add MC6800 code generator support --- mach/mc6800/Action | 21 + mach/mc6800/as/mach0.c | 16 + mach/mc6800/as/mach1.c | 12 + mach/mc6800/as/mach2.c | 20 + mach/mc6800/as/mach3.c | 124 ++ mach/mc6800/as/mach4.c | 85 + mach/mc6800/as/mach5.c | 47 + mach/mc6800/cg/build.py | 3 + mach/mc6800/cg/mach.c | 100 + mach/mc6800/cg/mach.h | 42 + mach/mc6800/cg/table | 3365 +++++++++++++++++++++++++++++++++ mach/mc6800/libem/aar.s | 78 + mach/mc6800/libem/adi4.s | 37 + mach/mc6800/libem/and.s | 45 + mach/mc6800/libem/and4.s | 38 + mach/mc6800/libem/blm.s | 58 + mach/mc6800/libem/build.py | 10 + mach/mc6800/libem/cii.s | 98 + mach/mc6800/libem/cmi.s | 43 + mach/mc6800/libem/cmi2.s | 42 + mach/mc6800/libem/cmi4.s | 60 + mach/mc6800/libem/cms.s | 117 ++ mach/mc6800/libem/cmu.s | 43 + mach/mc6800/libem/cmu2.s | 42 + mach/mc6800/libem/cmu4.s | 60 + mach/mc6800/libem/csa.s | 73 + mach/mc6800/libem/csb.s | 66 + mach/mc6800/libem/data.s | 43 + mach/mc6800/libem/dum_float.s | 65 + mach/mc6800/libem/dup.s | 49 + mach/mc6800/libem/dup4.s | 30 + mach/mc6800/libem/dvi.s | 162 ++ mach/mc6800/libem/dvi4.s | 188 ++ mach/mc6800/libem/exg.s | 59 + mach/mc6800/libem/gto.s | 38 + mach/mc6800/libem/inn.s | 87 + mach/mc6800/libem/lcs.s | 28 + mach/mc6800/libem/mli.s | 53 + mach/mc6800/libem/mli4.s | 83 + mach/mc6800/libem/pop.s | 30 + mach/mc6800/libem/pro.s | 37 + mach/mc6800/libem/pushx.s | 25 + mach/mc6800/libem/ret.s | 40 + mach/mc6800/libem/sbi.s | 24 + mach/mc6800/libem/sli.s | 28 + mach/mc6800/libem/sli4.s | 31 + mach/mc6800/libem/sri.s | 30 + mach/mc6800/libem/sri4.s | 31 + mach/mc6800/libem/sru.s | 30 + mach/mc6800/libem/sru4.s | 31 + mach/mc6800/libem/start.s | 22 + mach/mc6800/libem/testFFh.s | 25 + mach/mc6800/libem/tge.s | 20 + mach/mc6800/libem/tgt.s | 27 + mach/mc6800/libem/tle.s | 28 + mach/mc6800/libem/tlt.s | 19 + mach/mc6800/libem/trap.s | 107 ++ mach/mc6800/libend/LIST | 5 + mach/mc6800/libend/build.py | 14 + mach/mc6800/libend/edata.s | 9 + mach/mc6800/libend/em_end.s | 15 + mach/mc6800/libend/end.s | 8 + mach/mc6800/libend/etext.s | 10 + mach/mc6800/libmon/LIST | 1 + mach/mc6800/libmon/build.py | 11 + mach/mc6800/libmon/head_em.s | 43 + mach/mc6800/mach_params | 5 + 67 files changed, 6336 insertions(+) create mode 100644 mach/mc6800/Action create mode 100644 mach/mc6800/as/mach0.c create mode 100644 mach/mc6800/as/mach1.c create mode 100644 mach/mc6800/as/mach2.c create mode 100644 mach/mc6800/as/mach3.c create mode 100644 mach/mc6800/as/mach4.c create mode 100644 mach/mc6800/as/mach5.c create mode 100644 mach/mc6800/cg/build.py create mode 100644 mach/mc6800/cg/mach.c create mode 100644 mach/mc6800/cg/mach.h create mode 100644 mach/mc6800/cg/table create mode 100644 mach/mc6800/libem/aar.s create mode 100644 mach/mc6800/libem/adi4.s create mode 100644 mach/mc6800/libem/and.s create mode 100644 mach/mc6800/libem/and4.s create mode 100644 mach/mc6800/libem/blm.s create mode 100644 mach/mc6800/libem/build.py create mode 100644 mach/mc6800/libem/cii.s create mode 100644 mach/mc6800/libem/cmi.s create mode 100644 mach/mc6800/libem/cmi2.s create mode 100644 mach/mc6800/libem/cmi4.s create mode 100644 mach/mc6800/libem/cms.s create mode 100644 mach/mc6800/libem/cmu.s create mode 100644 mach/mc6800/libem/cmu2.s create mode 100644 mach/mc6800/libem/cmu4.s create mode 100644 mach/mc6800/libem/csa.s create mode 100644 mach/mc6800/libem/csb.s create mode 100644 mach/mc6800/libem/data.s create mode 100644 mach/mc6800/libem/dum_float.s create mode 100644 mach/mc6800/libem/dup.s create mode 100644 mach/mc6800/libem/dup4.s create mode 100644 mach/mc6800/libem/dvi.s create mode 100644 mach/mc6800/libem/dvi4.s create mode 100644 mach/mc6800/libem/exg.s create mode 100644 mach/mc6800/libem/gto.s create mode 100644 mach/mc6800/libem/inn.s create mode 100644 mach/mc6800/libem/lcs.s create mode 100644 mach/mc6800/libem/mli.s create mode 100644 mach/mc6800/libem/mli4.s create mode 100644 mach/mc6800/libem/pop.s create mode 100644 mach/mc6800/libem/pro.s create mode 100644 mach/mc6800/libem/pushx.s create mode 100644 mach/mc6800/libem/ret.s create mode 100644 mach/mc6800/libem/sbi.s create mode 100644 mach/mc6800/libem/sli.s create mode 100644 mach/mc6800/libem/sli4.s create mode 100644 mach/mc6800/libem/sri.s create mode 100644 mach/mc6800/libem/sri4.s create mode 100644 mach/mc6800/libem/sru.s create mode 100644 mach/mc6800/libem/sru4.s create mode 100644 mach/mc6800/libem/start.s create mode 100644 mach/mc6800/libem/testFFh.s create mode 100644 mach/mc6800/libem/tge.s create mode 100644 mach/mc6800/libem/tgt.s create mode 100644 mach/mc6800/libem/tle.s create mode 100644 mach/mc6800/libem/tlt.s create mode 100644 mach/mc6800/libem/trap.s create mode 100644 mach/mc6800/libend/LIST create mode 100644 mach/mc6800/libend/build.py create mode 100644 mach/mc6800/libend/edata.s create mode 100644 mach/mc6800/libend/em_end.s create mode 100644 mach/mc6800/libend/end.s create mode 100644 mach/mc6800/libend/etext.s create mode 100644 mach/mc6800/libmon/LIST create mode 100644 mach/mc6800/libmon/build.py create mode 100644 mach/mc6800/libmon/head_em.s create mode 100644 mach/mc6800/mach_params diff --git a/mach/mc6800/Action b/mach/mc6800/Action new file mode 100644 index 0000000000..1a67d8a957 --- /dev/null +++ b/mach/mc6800/Action @@ -0,0 +1,21 @@ +name "Motorola 6800 assembler" +dir as +end +name "Motorola 6800 backend" +dir cg +end +#name "Motorola 6800 download program(s)" +#dir dl +#end +name "Motorola 6800 EM library" +dir libem +end +name "Motorola 6800 etext,edata,end library" +dir libend +end +name "Motorola 6800 MON library" +dir libmon +end +name "Motorola 6800 system call library" +dir libsys +end diff --git a/mach/mc6800/as/mach0.c b/mach/mc6800/as/mach0.c new file mode 100644 index 0000000000..1a8e45fdfb --- /dev/null +++ b/mach/mc6800/as/mach0.c @@ -0,0 +1,16 @@ +/* + * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. + * See the copyright notice in the ACK home directory, in the file "Copyright". + */ +#define RCSID0 "$Id$" + +/* + * Motorola 6800 options + */ + +#define BYTES_REVERSED +#define WORDS_REVERSED +#define THREE_PASS +#define LISTING +#define RELOCATION +#define DEBUG 1 diff --git a/mach/mc6800/as/mach1.c b/mach/mc6800/as/mach1.c new file mode 100644 index 0000000000..6fe38953c4 --- /dev/null +++ b/mach/mc6800/as/mach1.c @@ -0,0 +1,12 @@ +/* + * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. + * See the copyright notice in the ACK home directory, in the file "Copyright". + */ +#define RCSID1 "$Id$" + +/* + * Motorola 6800 C declarations + */ + +void branch(int opc, expr_t exp); + diff --git a/mach/mc6800/as/mach2.c b/mach/mc6800/as/mach2.c new file mode 100644 index 0000000000..facedbbf03 --- /dev/null +++ b/mach/mc6800/as/mach2.c @@ -0,0 +1,20 @@ +/* + * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. + * See the copyright notice in the ACK home directory, in the file "Copyright". + */ +#define RCSID2 "$Id$" + +/* + * Motorola 6800 tokens + */ + +%token X +%token EXTENSION +%token NOARG +%token BRANCH +%token AOP +%token XOP + +%type memref + +%nonassoc EXTENSION diff --git a/mach/mc6800/as/mach3.c b/mach/mc6800/as/mach3.c new file mode 100644 index 0000000000..5d06e85a05 --- /dev/null +++ b/mach/mc6800/as/mach3.c @@ -0,0 +1,124 @@ +/* + * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. + * See the copyright notice in the ACK home directory, in the file "Copyright". + */ +#define RCSID3 "$Id$" + +/* + * Motorola 6800 keywords + */ +{0, EXTENSION, 0, ".l"}, +{0, EXTENSION, 8, ".h"}, +{0, X, 0, "x"}, +{0, NOARG, 0x01, "nop"}, +{0, NOARG, 0x06, "tap"}, +{0, NOARG, 0x07, "tpa"}, +{0, NOARG, 0x08, "inx"}, +{0, NOARG, 0x09, "dex"}, +{0, NOARG, 0x0A, "clv"}, +{0, NOARG, 0x0B, "sev"}, +{0, NOARG, 0x0C, "clc"}, +{0, NOARG, 0x0D, "sec"}, +{0, NOARG, 0x0E, "cli"}, +{0, NOARG, 0x0F, "sei"}, +{0, NOARG, 0x10, "sba"}, +{0, NOARG, 0x11, "cba"}, +{0, NOARG, 0x16, "tab"}, +{0, NOARG, 0x17, "tba"}, +{0, NOARG, 0x19, "daa"}, +{0, NOARG, 0x1B, "aba"}, +{0, BRANCH, 0x20, "bra"}, +{0, BRANCH, 0x22, "bhi"}, +{0, BRANCH, 0x23, "bls"}, +{0, BRANCH, 0x24, "bcc"}, +{0, BRANCH, 0x24, "bhs"}, /* bcc */ +{0, BRANCH, 0x25, "bcs"}, +{0, BRANCH, 0x25, "blo"}, /* bcs */ +{0, BRANCH, 0x26, "bne"}, +{0, BRANCH, 0x27, "beq"}, +{0, BRANCH, 0x28, "bvc"}, +{0, BRANCH, 0x29, "bvs"}, +{0, BRANCH, 0x2A, "bpl"}, +{0, BRANCH, 0x2B, "bmi"}, +{0, BRANCH, 0x2C, "bge"}, +{0, BRANCH, 0x2D, "blt"}, +{0, BRANCH, 0x2E, "bgt"}, +{0, BRANCH, 0x2F, "ble"}, +{0, NOARG, 0x30, "tsx"}, +{0, NOARG, 0x31, "ins"}, +{0, NOARG, 0x32, "pula"}, +{0, NOARG, 0x33, "pulb"}, +{0, NOARG, 0x34, "des"}, +{0, NOARG, 0x35, "txs"}, +{0, NOARG, 0x36, "psha"}, +{0, NOARG, 0x37, "pshb"}, +{0, NOARG, 0x39, "rts"}, +{0, NOARG, 0x3B, "rti"}, +{0, NOARG, 0x3E, "wai"}, +{0, NOARG, 0x3F, "swi"}, +{0, NOARG, 0x40, "nega"}, +{0, NOARG, 0x43, "coma"}, +{0, NOARG, 0x44, "lsra"}, +{0, NOARG, 0x46, "rora"}, +{0, NOARG, 0x47, "asra"}, +{0, NOARG, 0x48, "asla"}, +{0, NOARG, 0x48, "lsla"}, +{0, NOARG, 0x49, "rola"}, +{0, NOARG, 0x4A, "deca"}, +{0, NOARG, 0x4C, "inca"}, +{0, NOARG, 0x4D, "tsta"}, +{0, NOARG, 0x4F, "clra"}, +{0, NOARG, 0x50, "negb"}, +{0, NOARG, 0x53, "comb"}, +{0, NOARG, 0x54, "lsrb"}, +{0, NOARG, 0x56, "rorb"}, +{0, NOARG, 0x57, "asrb"}, +{0, NOARG, 0x58, "aslb"}, +{0, NOARG, 0x58, "lslb"}, +{0, NOARG, 0x59, "rolb"}, +{0, NOARG, 0x5A, "decb"}, +{0, NOARG, 0x5C, "incb"}, +{0, NOARG, 0x5D, "tstb"}, +{0, NOARG, 0x5F, "clrb"}, +{0, AOP, 0x60, "neg"}, +{0, AOP, 0x63, "com"}, +{0, AOP, 0x64, "lsr"}, +{0, AOP, 0x66, "ror"}, +{0, AOP, 0x67, "asr"}, +{0, AOP, 0x68, "asl"}, +{0, AOP, 0x68, "lsl"}, +{0, AOP, 0x69, "rol"}, +{0, AOP, 0x6A, "dec"}, +{0, AOP, 0x6C, "inc"}, +{0, AOP, 0x6D, "tst"}, +{0, XOP, 0x6E, "jmp"}, +{0, AOP, 0x6F, "clr"}, +{0, BRANCH, 0x8D, "bsr"}, +{0, XOP, 0xA0, "suba"}, +{0, XOP, 0xA1, "cmpa"}, +{0, XOP, 0xA2, "sbca"}, +{0, XOP, 0xA4, "anda"}, +{0, XOP, 0xA5, "bita"}, +{0, XOP, 0xA6, "ldaa"}, +{0, XOP, 0xA7, "staa"}, +{0, XOP, 0xA8, "eora"}, +{0, XOP, 0xA9, "adca"}, +{0, XOP, 0xAA, "oraa"}, +{0, XOP, 0xAB, "adda"}, +{0, XOP, 0xAC, "cpx"}, +{0, XOP, 0xAD, "jsr"}, +{0, XOP, 0xAE, "lds"}, +{0, XOP, 0xAF, "sts"}, +{0, XOP, 0xE0, "subb"}, +{0, XOP, 0xE1, "cmpb"}, +{0, XOP, 0xE2, "sbcb"}, +{0, XOP, 0xE4, "andb"}, +{0, XOP, 0xE5, "bitb"}, +{0, XOP, 0xE6, "ldab"}, +{0, XOP, 0xE7, "stab"}, +{0, XOP, 0xE8, "eorb"}, +{0, XOP, 0xE9, "adcb"}, +{0, XOP, 0xEA, "orab"}, +{0, XOP, 0xEB, "addb"}, +{0, XOP, 0xEE, "ldx"}, +{0, XOP, 0xEF, "stx"}, diff --git a/mach/mc6800/as/mach4.c b/mach/mc6800/as/mach4.c new file mode 100644 index 0000000000..e39c6f1ccf --- /dev/null +++ b/mach/mc6800/as/mach4.c @@ -0,0 +1,85 @@ +#define RCSID4 "$Id$" + +/* + * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. + * See the copyright notice in the ACK home directory, in the file "Copyright". + * + */ + +/* + * Motorola 6800 parsing rules + */ + +expr + : expr EXTENSION + { $$.val = ($1.val >> $2) & 0xFF; +#ifdef RELOCATION + $$.typ = combine($1.typ, S_ABS, '&'); + /* This will generate an 'invalid operator' */ + /* error if $1.typ is not absolute after pass 1. */ +#else + $$.typ = $1.typ; /* Even if $1.typ is relocatable, it should be */ + /* absolute by the final pass. */ +#endif /* RELOCATION */ + } + ; +operation + : + NOARG + { emit1($1);} + | + BRANCH expr + { branch($1,$2);} + | + XOP '#' expr + { emit1($1 - 0x20); + switch ($1 & 0x0F) { + case 0x03: + case 0x0C: + case 0x0E: +#ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($3.typ, RELO2|RELBR); +#endif + emit2($3.val); + break; + default: +#ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($3.typ, RELO1); +#endif + emit1($3.val); + } + } + | + XOP '<' expr + { emit1($1 - 0x10); +#ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($3.typ, RELO1); +#endif + emit1($3.val); + } + | + memref expr + { emit1($1 + 0x10); +#ifdef RELOCATION + if (rflag != 0 && PASS_RELO) + newrelo($2.typ, RELO2|RELBR); +#endif + emit2($2.val); + } + | + memref expr ',' X + { emit1($1); +#ifdef RELOCATION + newrelo($2.typ, RELO1); +#endif + emit1($2.val); + } + ; +memref : + AOP + | + XOP + ; diff --git a/mach/mc6800/as/mach5.c b/mach/mc6800/as/mach5.c new file mode 100644 index 0000000000..053ed28428 --- /dev/null +++ b/mach/mc6800/as/mach5.c @@ -0,0 +1,47 @@ +/* + * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. + * See the copyright notice in the ACK home directory, in the file "Copyright". + */ +#define RCSID5 "$Id$" + +/* + * Motorola 6800 special routines + */ + +void branch(int opc,expr_t exp) +{ + int sm, dist; + int saving; + + dist = exp.val - (DOTVAL + 2); + if (pass == PASS_2 && dist > 0 && !(exp.typ & S_DOT)) + dist -= DOTGAIN; + sm = fitb(dist); + if ((exp.typ & ~S_DOT) != DOTTYP) + sm = 0; + if (opc == 0x8D || opc == 0x20) + saving = 1; + else + saving = 3; + if (small(sm,saving)) { + emit1(opc); + emit1(dist); + } else { + if (opc == 0x8D) /* bsr */ + emit1(0xBD); /* jsr */ + else { + if (opc != 0x20) { /* bra */ + + /* reverse condition : */ + + emit1(opc ^ 1); + emit1(3); + } + emit1(0x7E); /* jmp */ + } +#ifdef RELOCATION + newrelo(exp.typ, RELO2 | RELBR); +#endif + emit2(exp.val); + } +} diff --git a/mach/mc6800/cg/build.py b/mach/mc6800/cg/build.py new file mode 100644 index 0000000000..5a4f60f954 --- /dev/null +++ b/mach/mc6800/cg/build.py @@ -0,0 +1,3 @@ +from build.c import clibrary + +clibrary(name="cg", hdrs={"mach.h": "./mach.h", "mach.c": "./mach.c"}) diff --git a/mach/mc6800/cg/mach.c b/mach/mc6800/cg/mach.c new file mode 100644 index 0000000000..29b40f2236 --- /dev/null +++ b/mach/mc6800/cg/mach.c @@ -0,0 +1,100 @@ +/* $Id$ */ +/* + * (c) copyright 1987 by the Vrije Universiteit, Amsterdam, The Netherlands. + * See the copyright notice in the ACK home directory, in the file "Copyright". + */ +void +con_part(int sz, word w) { + + while (part_size % sz) + part_size++; + if (part_size == TEM_WSIZE) + part_flush(); + if (sz == 1) { + w &= 0xFF; + if (part_size == 0) { + /* Shift 8 for m68k2, 16 otherwise */ + w <<= 8; + } + part_word |= w; + } else { +if (sz!=2) + fprintf(stderr,"con_part(%d,%04x)\n",sz,w); + assert(sz == 2); + part_word = w; + } + part_size += sz; +} + +void con_mult(word sz) +{ + if (sz != 4) + fatal("bad icon/ucon size"); + fprintf(codefile,".data4 %ld\n", atol(str)); +} + + +void con_float(void) +{ +static int been_here; + if (argval != 4 && argval != 8) + fatal("bad fcon size"); + fprintf(codefile,".data4\t"); + if (argval == 8) + fprintf(codefile,"F_DUM,"); + fprintf(codefile,"F_DUM\n"); + if ( !been_here++) + { + fprintf(stderr,"Warning : dummy float-constant(s)\n"); + } +} + +void prolog(full nlocals) +{ + int i; + + fprintf(codefile,"\tjsr Pro\n"); + fprintf(codefile,"! nlocals %d\n",nlocals); + if (nlocals == 0) + return; + else if (nlocals < 8) + for (i=0; i=MIN && x<=(MAX-2)) +#define INP(x) (x>=0 && x<=(254-em_bsize)) + + +/* + * 6800 code generator + * + * EM_WSIZE: machine word (16bit) + * EM_PSIZE: pointer size (16bit) + * EM_BSIZE: Number of bytes in the hole between AB and LB. + * AB: Argment base, LB:Local Base + */ + +EM_WSIZE = 2 +EM_PSIZE = 2 +EM_BSIZE = 4 + +REGISTERS: +AA = ("a",1), REG. +BB = ("b",1), R8. +XX = ("x",2), X16. +AB = ("",2,AA,BB), R16. + +/* AB is a registerpair, A contains the highbyte of a word and + * B contains the lowbyte + */ + + +TOKENS: +IMMEDIATE = {INT off;} 1 "#%[off]" /* a fake token the + * cgg needs one + */ +LOCAL_ADDR = {INT off; } 1 "%[off],x" +EXTENDED_ADDR = {INT off; } 2 "%[off]" + +TOKENEXPRESSIONS: +AAA = IMMEDIATE /* a fake tokenexpression + * the cgg needs one + */ + + +/* + * EM pattern '|' stack pattern '|' code '|' + * stack replacement '|' EM replacement '|' + */ + +CODE: + +/* GROUP 1 - LOAD */ + +/* loc: load 16bit constant */ + +loc $1==0 | | + allocate(R16) + "! loc 0" + "\tclrb" + "\tclra" + | %[a] | | +loc $1!=0 && ($1>>8)==0 | | + allocate(R16) + "! loc ($1>>8)==0" + "\tldab #[$1].l" + "\tclra" + | %[a] | | +loc $1!=0 && ($1%256)==0 | | + allocate(R16) + "! loc ($1 mod 256)==0" + "\tclrb" + "\tldaa #[$1].h" + | %[a] | | +loc $1!=0 && ($1%256)==($1>>8) | | + allocate(R16) + "! loc high==low" + "\tldab #[$1].l" + "\ttba" + | %[a] | | +loc | | + allocate(R16) + "! loc $1" + "\tldab #[$1].l" + "\tldaa #[$1].h" + | %[a] | | + +/* ldc: load 32bit constant */ + +ldc highw(1)==0 && loww(1)==0 | | + allocate(R16) + "! ldc $1==0" + "\tclrb" + "\tclra" + "\tpshb" + "\tpsha" + | %[a] | | + +ldc highw(1)==loww(1) && (loww(1)%256)==(loww(1)>>8) | | + allocate(R16) + "! ldc $1" + "\tldab #[%(loww(1)%)].l" + "\ttba" + "\tpshb" + "\tpsha" + | %[a] | | +ldc | | + allocate(R16) + "! ldc $1" + "\tldab #[%(loww(1)%)].l" + "\tldaa #[%(loww(1)%)].h" + "\tpshb" + "\tpsha" + "\tldab #[%(highw(1)%)].l" + "\tldaa #[%(highw(1)%)].h" + | %[a] | | +/* lol: load local var or arg, $1==offset*/ +lol sti IN($1) && $2==1 | R16 | + "! lol sti IN($1) && $2==1" + "\tldx n > 0) static levels back.*/ + +lxl $1==0 | | + allocate(R16) + "! lxl $1" + "\tldab n > 0) static levels back.*/ + +lxa $1==0 | | + allocate(R16) + "! lxa $1" + "\tldab pula/pulb */ + +sti | R16 | + "! sti $1" + "\tstab 0 && $1<=256 | | + allocate(R16) + "! zer $1" + "\tclra" + "\tldab $1" + "\tlsrb" + "\tincb" + "1:" + "\tpsha" + "\tpsha" + "\tdecb" + "\tbne 1b" + | | | + + +/* GROUP 8 - CONVERT (stack: source, source size, dest. size (top)) */ + +loc loc cii $1==1 && $2==2 | R16 | + "! loc loc cii $1==1 && $2==2" + "\tclra" + "\tasrb" + "\trolb" + "\tsbca #0" + | %[1] | | +loc loc cii $1==2 && $2==4 | R16 | + "! loc loc cii $1==2 && $2==4" + "\tpshb" + "\tpsha" + "\tclrb" + "\tasla" + "\tsbcb #0" + "\ttba" + | %[1] | | +cii | R16 | + "! cii" + "\tjsr Cii" + | %[1] | | +cui | | "! cui to cii" | | cii | +ciu | | "! ciu to cii" | | cii | +cuu | | "! cuu to cii" | | cii | +loc loc cui $1==$2 | | "! loc loc cui $1==$2" | | | +loc loc ciu $1==$2 | | "! loc loc ciu $1==2" | | | +loc loc cuu $1==2 && $2==4 | | "! loc loc cuu $1==2 $2==4" | | loc 0 | + + +/* GROUP 9 - LOGICAL */ + +loc and $1==65535 && $2==2 | | "! loc and $1==0xffff && $2==2" | | | +loc and $1==255 && $2==2 | R16 | + "! loc and $1==255 && $2==2" + "\tclra" + | %[1] | | +loc and $2==2 | R16 | + "! loc and $2==2" + "\tandb #[$1].l" + "\tanda #[$1].h" + | %[1] | | +lol and IN($1) && $2==2 | R16 | + "! lol and IN($1) && $2==2" + "\tldx =0 && $1<=254 | | + allocate(R16) + "! and $1>=0 && $1<=254" + "\ttsx" + "\tstx =0 && $1<=254 | | + allocate(R16) + "! ior $1>=0 && $1<=254" + "\ttsx" + "\tstx =0 && $1<=254 | | + allocate(R16) + "! xor $1>=0 && $1<=254" + "\ttsx" + "\tstx =0 && $1<=254 | | + allocate(R16) + "! com $1<=254" + "\ttsx" + "\tldab #[$1].l" + "1:" + "\tcom 0,x" + "\tinx" + "\tdecb" + "\tbne 1b" + | | | +com ND | | + allocate(R16) + "! com ND" + "\ttsx" + "\tstx 0 && $1<16 | R16 | + "! loc inn $1 $2" + "\tldx #$1" + "1:" + "\tlsra" + "\trorb" + "\tdex" + "\tbne 1b" + "\tandb #1" + "\tclra" + | %[1] | | +loc inn zeq $1==0 && $2==2 | R16 | + "! loc inn zeq $1 $2 $3" + "\tandb #1" + "\tbeq $3 ! ???" + | | | +loc inn zeq $1>0 && $1<16 && $2==2 | R16 | + "\tldx #$1" + "1:" + "\tlsra" + "\trorb" + "\tdex" + "\tbne 1b" + "\tandb #1" + "\tbeq $3 ! ???" + | | | +loc inn zne $1==0 && $2==2 | R16 | + "! loc inn zne $1 $2 $3" + "\tandb #1" + "\tbne $3 ! ???" + | | | +loc inn zne $1>0 && $1<16 && $2==2 | R16 | + "! loc inn zne $1 $2" + "\tldx #$1" + "1:" + "\tlsra" + "\trorb" + "\tdex" + "\tbne 1b" + "\tandb #1" + "\tbne $3 ! ???" + | | | +/* +inn $1==2 | R16 | + "! inn $1" + "\tstab =0 && $1<16 | | + allocate(R16) + "! loc set $1 $2" + "\tldx #$1" + "\tclrb" + "\tclra" + "\tsec" + "1:" + "\trolb" + "\trola" + "\tdex" + "bne 1b" + | %[a] | | +set $1==2 | R16 | + "! set $1" + "\tstab 2 && rom(1,1)==0 | | + | | loc rom(1,3) mli 2 adi 2 | +lae aar $2==2 && rom(1,3)>2 && rom(1,1)!=0 | | + | | loc rom(1,3) mli 2 adi 2 adp (0-rom(1,1))*rom(1,3) | +aar $1==2 | R16 | + "! aar $1" + "\tjsr Aar" + | %[1] | | +aar ND | R16 | + "! aar ND" + "\ttsta" + "\tbeq 1f" + "\tcmpb #2" + "\tbeq 1f" + "\tjsr Trap" + "1:" + "\tjsr Aar" + | %[1] | | + + +/* GROUP 12 - COMPARE */ + +cmi $1==2 | R16 | + "! cmi $1" + "\tjsr Cmi2" + | %[1] | | +cmi $1==4 | | + allocate(R16) + "! cmi $1" + "\tjsr Cmi4" + | %[a] | | +cmi ND | R16 | + "! cmi R16" + "\ttsta" + "\tbeq 1f" + "\tcmpb #2" + "\tbeq 1f" + "\tjsr Trap" + "1:" + "\tjsr Cmi" + | %[1] | | +/* compare unsigned */ +cmu $1==2 | R16 | + "! cmu $1" + "\tjsr Cmu2" + | %[1] | | +cmu $1==4 | | + allocate(R16) + "! cmu $1" + "\tjsr Cmu4" + | %[a] | | +cmu $1>0 | | + allocate(R16) + "! cmu $1" + "\tldab #[$1].l" + "\tldaa #[$1].h" + "\tjsr Cmu" + | %[a] | | +cmu ND | | + allocate(R16) + "! cmu ND" + "\ttsta" + "\tbeq 1f" + "\tcmpb #2" + "\tbeq 1f" + "\tjsr Trap" + "1:" + "\tjsr Cmu" + | | | +cmp | | + | | cmu 2 | +cms $1==2 || $1==4 | | + allocate(R16) + "! cms $1" + "\tldab #[$1].l" + "\tldaa #[$1].h" + "\tjsr Cms" + | %[a] | | +cms ND | R16 | + "! cms ND" + "\tjsr Cms" + | %[1] | | +tlt | R16 | + "! tlt" + "\tjsr Tlt" + | %[1] | | +tle | R16 | + "! tle" + "\tjsr Tle" + | %[1] | | +teq | R16 | + "! teq" + "\taba" + "\tadca #0" + "\tclrb" + "\tsuba #1" + "\trolb" + "\tclra" + | %[1] | | +tne | R16 | + "! tne" + "\taba" + "\tadca #0" + "\tclrb" + "\tnega" + "\trolb" + "\tclra" + | %[1] | | +tge | R16 | + "! tge" + "\tjsr Tge" + | %[1] | | +tgt | R16 | + "! tgt" + "\tjsr Tgt" + | %[1] | | + + +/* GROUP 13 - BRANCH */ + +bra | | + remove(ALL) + "! bra" + "\tjmp $1" + | | | +loc blt | R16 | + "! loc blt $1" + "\tsubb #[$1].l" + "\tsbca #[$1].h" + "\tblt $2" + | | | +lol blt IN($1) | R16 | + "! lol blt IN($1)" + "\tldx b -1 + * a==b 0 + * a TOS? + * cmp zle AccAB >= TOS? + * cmp zge AccAB =< TOS? + * cmp zgt AccAB < TOS? + */ +/* +cmp zlt | R16 | + "! cmp zlt" + "\ttsx" + "\tsubb 1,x" + "\tsbca 0,x" + "\tins" + "\tins" + "\tbhi $1" + "\tbcs 1f" + "\ttstb" + "\tbne $1" + "1:" + | | | +cmp zle | R16 | + "! cmp zle" + "\ttsx" + "\tsubb 1,x" + "\tsbca 0,x" + "\tins" + "\tins" + "\tbcc $1" + | | | +cmp zge | R16 | + "! cmp zge" + "\ttsx" + "\tsubb 1,x" + "\tsbca 0,x" + "\tins" + "\tins" + "\tbcs $1" + "\tbhi 1f" + "\ttstb" + "\tbeq $1" + "1:" + | | | +cmp zgt | R16 | + "! cmp zgt" + "\ttsx" + "\tsubb 1,x" + "\tsbca 0,x" + "\tins" + "\tins" + "\tbcs $1" + | | | +*/ + +/* GROUP 14 - PROCEDURE CALL */ + +loe cai | | + allocate(R16) + "! loe cai" + "\tldx $1" + "\tjsr 0,x" + | | | +cai | R16 | + "! cai" + "\tstab 0 | | + allocate(R16) + "! blm $1>0" + "\tldx #$1" + "\tstx object size ? + sbca 2,x + pula + pulb + bgt 9f ! trap EARRAY +! +2: ldx 4,x ! get object size + beq Trap + cpx #1 + beq 6f + cpx #2 + beq 5f + cpx #4 + beq 4f +! ! AccAB has index - lower bound + stx ARTH + jsr Mlu2 ! AccAB = AccAB * ARTH (object size) + bra 6f +! +4: aslb ! object size == 4 + rola +! +5: aslb ! object size == 2 + rola +! +6: ! object size == 1 + tsx + addb 5,x ! add base of array + adca 4,x + ldx 0,x + ins + ins + ins + ins + ins + ins + jmp 0,x +9: + ldab #EARRAY + clra + jsr Trap diff --git a/mach/mc6800/libem/adi4.s b/mach/mc6800/libem/adi4.s new file mode 100644 index 0000000000..579283f5dc --- /dev/null +++ b/mach/mc6800/libem/adi4.s @@ -0,0 +1,37 @@ +.define Adi4 +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine adds two fourbyte integers, which are on the stack. +! The result is pushed back onto the stack + +! +0 rerurn address +! +2,+5 4byte integer +! +6,+9 4byte integer (and result) + +Adi4: + tsx + ldab 9,x + ldaa 8,x + addb 5,x + adca 4,x + stab 9,x + staa 8,x + ldab 7,x + ldaa 6,x + adcb 3,x + adca 2,x + stab 7,x + staa 6,x + ldx 0,x + ins + ins + ins + ins + ins + ins + jmp 0,x diff --git a/mach/mc6800/libem/and.s b/mach/mc6800/libem/and.s new file mode 100644 index 0000000000..a168950bb0 --- /dev/null +++ b/mach/mc6800/libem/and.s @@ -0,0 +1,45 @@ +.define And +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine performs logical and on two fourbyte integers, +! which are on the stack. +! The result is pushed back onto the stack + +! AccAB number of bytes (n) +! +0 rerurn address +! +2 , n+1 nbyte integer +! +n+2,2n+1 nbyte integer (and result) + +And: + tsx + ldx 0,x + stx TMP + ins ! skip return address + ins + tsx + stab TMP+1 ! save number of bytes + beq 1f + inca +1: staa TMP + stx ADDR + addb ADDR+1 ! calculate result address + adca ADDR + stab ADDR+1 + staa ADDR + ldx ADDR + ldab TMP+1 +2: + pula + anda 0,x + staa 0,x + inx + decb + bne 2b + dec TMP + bne 2b + jmp 0,x diff --git a/mach/mc6800/libem/and4.s b/mach/mc6800/libem/and4.s new file mode 100644 index 0000000000..98eb7b1958 --- /dev/null +++ b/mach/mc6800/libem/and4.s @@ -0,0 +1,38 @@ +.define And4 +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine performs logical and on two fourbyte integers, +! which are on the stack. +! The result is pushed back onto the stack + +! +0 rerurn address +! +2,+5 4byte integer +! +6,+9 4byte integer (and result) + +And4: + tsx + ldab 9,x + ldaa 8,x + andb 5,x + anda 4,x + stab 9,x + staa 8,x + ldab 7,x + ldaa 6,x + andb 3,x + anda 2,x + stab 7,x + staa 6,x + ldx 0,x + ins + ins + ins + ins + ins + ins + jmp 0,x diff --git a/mach/mc6800/libem/blm.s b/mach/mc6800/libem/blm.s new file mode 100644 index 0000000000..7917a18179 --- /dev/null +++ b/mach/mc6800/libem/blm.s @@ -0,0 +1,58 @@ +.define Blm +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine copies bytes from one place in memory to another. +! The destinationaddress is in registerpair AB and is stored +! in zeropage locations ADDR+2 and ADDR+3. +! The source address is popped from the stack and stored in +! zeropage locations ADDR and ADDR+1. +! The number of bytes is in zeropage location NBYTES +! The subroutine Blmnp is used when the source and destination +! addresses are already in zeropage. + +! NBYTES: +! number of bytes to transfer (n>0) +! Stack: +! +0 return addrrss +! +2 destination address +! +4 source address + +Blm: + tsx + ldx 0,x + stx T. + +! AccAB: T +! stack: +! +0: return address +! +2: S + + +Cmi: + tsx + subb 3,x ! T - S + sbca 2,x + blt 1f ! S > T + bgt 3f ! S < T + tstb + bne 3f ! S != T (i.e S < T) + ! S == T, AccAB already zero. +2: + ldx 0,x + ins + ins + ins + ins + jmp 0,x +1: + ldab #1 ! S > T + clra ! AB becomes 1 + bra 2b +3: + ldab #0xff ! S < T + tba ! AB becomes -1 + bra 2b diff --git a/mach/mc6800/libem/cmi2.s b/mach/mc6800/libem/cmi2.s new file mode 100644 index 0000000000..595807b082 --- /dev/null +++ b/mach/mc6800/libem/cmi2.s @@ -0,0 +1,42 @@ +.define Cmi2 +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine compares on two unsigned integers. +! -1 if S < T, +! 0 if S = T, +! 1 if S > T. + +! AccAB: S +! Stack: +! +0: return address +! +2: T + +Cmi2: + tsx + subb 3,x ! S - T + sbca 2,x + blt 3f ! S < T + bgt 2f ! S > T + tstb + bne 2f ! S != T (i.e S > T) + ! S == T, AccAB already zero +1: + ldx 0,x + ins + ins + ins + ins + jmp 0,x +2: + ldab #1 ! S > T + clra ! AccAB = 1 + bra 1b +3: + ldab #0xff ! S < T + tba ! AccAB = -1 + bra 1b diff --git a/mach/mc6800/libem/cmi4.s b/mach/mc6800/libem/cmi4.s new file mode 100644 index 0000000000..b56a99c0a9 --- /dev/null +++ b/mach/mc6800/libem/cmi4.s @@ -0,0 +1,60 @@ +.define Cmi4 +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine compares on fourbyte unsigned integers. +! -1 if S < T, +! 0 if S = T, +! 1 if S > T. + +! Stack +! +0 to +1 : return address +! +2 to +5 : T +! +6 to +9 : S + +Cmi4: + tsx + ldab 6,x + cmpb 2,x + blt 2f + bgt 3f + ldab 7,x + cmpb 3,x + bcs 2f + bhi 3f + ldab 8,x + cmpb 4,x + bcs 2f + bhi 3f + ldaa 9,x + cmpa 5,x + bcs 2f + bhi 3f +! equal +1: ! AccA,B already 0 + ldx 0,x + ins + ins + ins + ins + ins + ins + ins + ins + ins + ins + jmp 0,x +! S < T +2: + ldab #0xff + tba + bra 1b +! S > T +3: + ldab #1 + clra + bra 1b diff --git a/mach/mc6800/libem/cms.s b/mach/mc6800/libem/cms.s new file mode 100644 index 0000000000..b65a44100c --- /dev/null +++ b/mach/mc6800/libem/cms.s @@ -0,0 +1,117 @@ +.define Cms +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine compares two groups of bytes, bit for bit. +! The groups can consist of 2 or 4 bytes. This number is in +! register AccB. +! The address of the first group is stored in zeropage locations +! ADDR and ADDR+1, the address of the second group in ADDR+2 and ADDR+3 +! The routine returns a 0 on equality, a 1 otherwise. + +! AccAB: +! size of group (byte) +! Stack: +! +0 return address +! +2, 2+n-1 +! +2+n,2+n*2-1 + + +Cms: + tsx + ldx 0,x ! get return address + ins + ins + stx T. + +! AccAB: T +! stack: +! +0: return address +! +2: S + + +Cmu: + tsx + subb 3,x ! T - S + sbca 2,x + bcs 1f ! S > T + bhi 3f ! S < T + tstb + bne 3f ! S != T (i.e S < T) + ! S == T, AccAB already zero. +2: + ldx 0,x + ins + ins + ins + ins + jmp 0,x +1: + ldab #1 ! S > T + clra ! AB becomes 1 + bra 2b +3: + ldab #0xff ! S < T + tba ! AB becomes -1 + bra 2b diff --git a/mach/mc6800/libem/cmu2.s b/mach/mc6800/libem/cmu2.s new file mode 100644 index 0000000000..441a37dea7 --- /dev/null +++ b/mach/mc6800/libem/cmu2.s @@ -0,0 +1,42 @@ +.define Cmu2 +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine compares on two signed integers. +! -1 if S < T, +! 0 if S = T, +! 1 if S > T. + +! AccAB: T +! Stack: +! +0: return address +! +2: S + +Cmu2: + tsx + subb 3,x ! T - S + sbca 2,x + bcs 2f ! S > T + bhi 3f ! S < T + tstb + bne 3f ! S != T (i.e S < T) + ! S == T, AccAB already zero. +1: + ldx 0,x + ins + ins + ins + ins + jmp 0,x +2: + ldab #1 ! S > T + clra ! AccAB = 1 + bra 1b +3: + ldab #0xff ! S < T + tba ! AccAB = -1 + bra 1b diff --git a/mach/mc6800/libem/cmu4.s b/mach/mc6800/libem/cmu4.s new file mode 100644 index 0000000000..f7b0088c84 --- /dev/null +++ b/mach/mc6800/libem/cmu4.s @@ -0,0 +1,60 @@ +.define Cmu4 +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine compares on fourbyte unsigned integers. +! -1 if S < T, +! 0 if S = T, +! 1 if S > T. + +! Stack +! +0 to +1 : return address +! +2 to +5 : T +! +6 to +9 : S + +Cmu4: + tsx + ldab 6,x + cmpb 2,x + bcs 2f + bhi 3f + ldab 7,x + cmpb 3,x + bcs 2f + bhi 3f + ldab 8,x + cmpb 4,x + bcs 2f + bhi 3f + ldaa 9,x + cmpa 5,x + bcs 2f + bhi 3f +! equal +1: ! AccA,B already 0 + ldx 0,x + ins + ins + ins + ins + ins + ins + ins + ins + ins + ins + jmp 0,x +! S < T +2: + ldab #0xff + tba + bra 1b +! S > T +3: + ldab #1 + clra + bra 1b diff --git a/mach/mc6800/libem/csa.s b/mach/mc6800/libem/csa.s new file mode 100644 index 0000000000..a35e48177d --- /dev/null +++ b/mach/mc6800/libem/csa.s @@ -0,0 +1,73 @@ +.define Csa,CsaX +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine performs the case jump by searching the table. +! The zeropage locations ADDR, ADDR+1 contain the address of the +! case descriptor, which also is the address of the default pointer. + +! +! Csa: +! TOS: switch value +! AccAB: jump table address +! +! CsaX: +! AccAB: switch value +! IX: jump table address +! + +! case_table: <- (AccAB) +! default_addr: .data2 adrs +! +2 lower bound: .data2 num1 +! +4 upper bound: .data2 num2 +! +6 jump_addr: .data2 adrs /* case num1: */ +! +8 jump_addr: .data2 adrs /* case num1+1: */ +! + +! example: +! case 2: case 3: case 4: +! lower bound 2 +! upper bound 2 (4-2) +! + +Csa: + stab upper bound + blt 1f + tstb + bne 9f +! jump table +1: + ldab ARTH+1 + ldaa ARTH + aslb + rola + addb ADDR+1 + adca ADDR + addb #6 ! skip to jump table + adca #0 + stab ADDR+1 + staa ADDR + ldx ADDR +! default +9: + ldx 0,x + jmp 0,x diff --git a/mach/mc6800/libem/csb.s b/mach/mc6800/libem/csb.s new file mode 100644 index 0000000000..aec444590f --- /dev/null +++ b/mach/mc6800/libem/csb.s @@ -0,0 +1,66 @@ +.define Csb,CsbX +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine performs the case jump by searching the table. +! The zeropage locations ADDR, ADDR+1 contain the address of the +! case descriptor, which also is the address of the default pointer. + +! +! case_table: Csb:AccAB, CsbX:IX +! default_addr: .data2 adrs +! num_of_case: .data2 num +! case_1: .data2 num +! jump_addr: .data2 adrs +! case_2: .data2 num +! jump_addr: .data2 adrs +! + +! switch value: TOS:Csb, AccAB:CsbX +! + +CsbX: pshb + psha + stx =size +! + pula + pulb + addb = 0 + 3: clrb ! AB <= 0 + clra + rts + 1: beq 1f ! A == 0 + 2: ldab #1 ! AB > 0 + clra + rts + 1: tstb + bne 2b ! AB > 0 + beq 3b ! AB = 0 + + diff --git a/mach/mc6800/libem/tle.s b/mach/mc6800/libem/tle.s new file mode 100644 index 0000000000..80ff34abcf --- /dev/null +++ b/mach/mc6800/libem/tle.s @@ -0,0 +1,28 @@ +.define Tle +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine tests if the value in registerpair AB is +! less than or equal to zero. +! The value returned is in AB. + + +Tle: + tsta + bpl 1f ! A >= 0 + 3: ldab #1 ! AB <= 0 + clra + rts + 1: beq 1f ! A = 0 + 2: clrb ! AB > 0 + clra + rts + 1: tstb + bne 2b ! B > 0 + beq 3b ! B = 0 + + diff --git a/mach/mc6800/libem/tlt.s b/mach/mc6800/libem/tlt.s new file mode 100644 index 0000000000..67cd5059c8 --- /dev/null +++ b/mach/mc6800/libem/tlt.s @@ -0,0 +1,19 @@ +.define Tlt +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine tests if the value in registerpair AX is +! less than zero. +! The value returned is in AX. + + +Tlt: + clrb + asla + rolb + clra + rts diff --git a/mach/mc6800/libem/trap.s b/mach/mc6800/libem/trap.s new file mode 100644 index 0000000000..708d2d1163 --- /dev/null +++ b/mach/mc6800/libem/trap.s @@ -0,0 +1,107 @@ +.define Trap +.sect .zero +.sect .text +.sect .rom +.sect .data +.sect .bss +.sect .text + +! This subroutine performs the trap instruction. + +! AccB: Trap number + +Trap: + cmpb #64 + bcc 1f + 2: jmp Dotrap + 1: bmi 2b + pshb + stab