IntNet.bib

% =====================================================================
%                     Interconnect Summary
% =====================================================================
@article{IntNet-JVLSI1996-Cong,
    title={Performance optimization of {VLSI} interconnect layout},
    author={Cong, Jason and He, Lei and Koh, Cheng-Kok and Madden, Patrick H},
    journal=jvlsi,
    volume={21},
    number={1-2},
    pages={1--94},
    year={1996},
    publisher={Elsevier}
}



% =====================================================================
%                   Steiner Tree Construction
% =====================================================================
% ====== general Steiner
%{{{
@article{Steiner-ZOR1974-Nastansky,
    title={Cost-minimal trees in directed acyclic graphs},
    author={Nastansky, L and Selkow, SM and Stewart, NF},
    journal={Zeitschrift f{\"u}r Operations Research},
    volume={18},
    number={1},
    pages={59--67},
    year={1974},
    publisher={Springer}
}
@article{Steiner-ALGO2001-Ravi,
    title     = {Approximation algorithms for degree-constrained minimum-cost network-design problems},
    author    = {Ravi, R. and Marathe, Madhav V. and Ravi, S.~S. and Rosenkrantz, Daniel J. and Hunt III, Harry B.},
    journal   = algo,
    volume    = {31},
    number    = {1},
    pages     = {58--78},
    year      = {2001},
    publisher = {Springer},
    abstract  = {approximation to steiner tree},
}
@incollection{Steiner-BC2000-Warme,
    title={Exact algorithms for plane {Steiner} tree problems: A computational study},
    author={Warme, David M and Winter, Pawel and Zachariasen, Martin},
    booktitle={Advances in {Steiner} trees},
    pages={81--116},
    year={2000},
    publisher={Springer}
}
%}}}

% ====== MST (minimum spanning tree) / Rectilinear MST / RMST
@article{Steiner-JIPL2002-Zhou,
    title={Efficient minimum spanning tree construction without Delaunay triangulation},
    author={Zhou, Hai and Shenoy, Narendra and Nicholls, William},
    journal=jipl,
    volume={81},
    number={5},
    pages={271--276},
    year={2002},
    publisher={Elsevier}
}

% ====== Rectilinear Steiner minimal tree (RSMT)
%{{{
@article{Steiner-SIAP1966-Hanan,
    title     = {On Steiner's problem with rectilinear distance},
    author    = {Hanan, Maurice},
    journal   = siap,
    volume    = {14},
    number    = {2},
    pages     = {255--265},
    year      = {1966},
    publisher = {SIAM},
    abstract  = {introduce Hanan grid},
}
@article{Steiner-SIAP1976-Hwang,
    title={On {Steiner} minimal trees with rectilinear distance},
    author={Hwang, Frank K},
    journal=siap,
    volume={30},
    number={1},
    pages={104--114},
    year={1976},
    publisher={SIAM}
}
@article{Steiner-SIAP1977-Garey,
    title={The rectilinear {Steiner} tree problem is {NP-complete}},
    author={Garey, Michael R and Johnson, David S.},
    journal=siap,
    volume={32},
    number={4},
    pages={826--834},
    year={1977},
    publisher={SIAM}
}
@article{Steiner-TCAD1990-Ho,
    title={New algorithms for the rectilinear {Steiner} tree problem},
    author={Ho, J-M and Vijayan, Gopalakrishnan and Wong, Chak-Kuen},
    journal=tcad,
    volume={9},
    number={2},
    pages={185--193},
    year={1990},
    publisher={IEEE}
}
@article{Steiner-TCAD1992-Kahng,
    title={A new class of iterative {Steiner} tree heuristics with good performance},
    author={Kahng, Andrew B and Robins, Gabriel},
    journal=tcad,
    volume={11},
    number={7},
    pages={893--902},
    year={1992},
    publisher={IEEE}
}
@article{Steiner-TCAD1994-Griffith,
    title={Closing the gap: Near-optimal {Steiner} trees in polynomial time},
    author={Griffith, Jeff and Robins, Gabriel and Salowe, Jeffrey S and Zhang, Tongtong},
    journal=tcad,
    volume={13},
    number={11},
    pages={1351--1365},
    year={1994},
    publisher={IEEE}
}
@article{Steiner-TCAD1994-Borah,
    title={An edge-based heuristic for {Steiner} routing},
    author={Borah, Manjit and Owens, Robert Michael and Irwin, Mary Jane},
    journal=tcad,
    volume={13},
    number={12},
    pages={1563--1568},
    year={1994},
    publisher={IEEE}
}
@inproceedings{Steiner-ASPDAC2003-Kahng,
    title={Highly scalable algorithms for rectilinear and octilinear {Steiner} trees},
    author={Kahng, Andrew B and M{\u{a}}ndoiu, Ion I and Zelikovsky, Alexander Z},
    booktitle=aspdac,
    pages={827--833},
    year={2003}
}
@article{Steiner-TCAD2004-Zhou,
    title={Efficient {Steiner} tree construction based on spanning graphs},
    author={Zhou, Hai},
    journal=tcad,
    volume={23},
    number={5},
    pages={704--710},
    year={2004},
    publisher={IEEE}
}
@article{Steiner-TCAD2008-FLUTE,
    title     = {{FLUTE}: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for {VLSI} Design},
    author    = {Chu, Chris and Wong, Yiu-Chung},
    journal   = tcad,
    year      = {2008},
    volume    = {27},
    number    = {1},
    pages     = {70--83},
    publisher = {IEEE},
}
@inproceedings{Steiner-ISPD2018-Lin,
    title={Construction of All Rectilinear {Steiner} Minimum Trees on the Hanan Grid},
    author={Lin, Sheng-En David and Kim, Dae Hyun},
    booktitle=ispd,
    pages={18--25},
    year={2018}
}
%}}}

% ====== RSA (rectilinear steiner arborescence) / SPT
%{{{
@article{Steiner-ALGO1992-Rao,
    title={The rectilinear {Steiner} arborescence problem},
    author={Rao, Sailesh K and Sadayappan, P and Hwang, Frank K and Shor, Peter W},
    journal={Algorithmica},
    volume={7},
    number={1-6},
    pages={277--288},
    year={1992},
    publisher={Springer}
}
@inproceedings{Steiner-DAC1993-Cong,
    title={Performance-driven interconnect design based on distributed {RC} delay model},
    author={Cong, Jason and Leung, Kwok-Shing and Zhou, Dian},
    booktitle=dac,
    pages={606--611},
    year={1993}
}
@techreport{Steiner-TR1994-Cordova,
    title={A heuristic algorithm for the rectilinear {Steiner} arborescence problem},
    author={C{\'o}rdova, Javier and Lee, Yann-Hang},
    year={1994}
}
@article{Steiner-TCAD1998-Cong,
    title={Efficient algorithms for the minimum shortest path {Steiner} arborescence problem with applications to {VLSI} physical design},
    author={Cong, Jason and Kahng, Andrew B and Leung, Kwok-Shing},
    journal=tcad,
    volume={17},
    number={1},
    pages={24--39},
    year={1998},
    publisher={IEEE}
}
@article{Steiner-SICOMP2005-Shi,
    title={The rectilinear {Steiner} arborescence problem is {NP-complete}},
    author={Shi, Weiping and Su, Chen},
    journal=sicomp,
    volume={35},
    number={3},
    pages={729--740},
    year={2005},
    publisher={SIAM}
}
@inproceedings{Steiner-ASPDAC2007-Pan,
    title={A novel performance-driven topology design algorithm},
    author={Pan, Min and Chu, Chris and Patra, Priyadarshan},
    booktitle=aspdac,
    pages={244--249},
    year={2007}
}
@inproceedings{Steiner-IPCO2013-Held,
    title={Shallow-light {Steiner} arborescences with vertex delays},
    author={Held, Stephan and Rotter, Daniel},
    booktitle=ipco,
    pages={229--241},
    year={2013}
}
@inproceedings{Steiner-DAC2018-Held,
    title={Exact Algorithms for Delay-Bounded {Steiner} Arborescences},
    author={Held, Stephan and Benjamin Rockel},
    booktitle=dac,
    pages = {44:1--44:6},
    year={2018}
}
%}}}

% ====== SLT (shallow light tree)
%{{{
@techreport{Steiner-TR1992-Awerbuch,
    title={Effcient broadcast and light-weight spanners},
    author={Awerbuch, Baruch and Baratz, Alan and Peleg, David},
    year={1992}
}
@article{Steiner-TCAD1992-Cong,
    title={Provably good performance-driven global routing},
    author={Cong, Jason and Kahng, Andrew B and Robins, Gabriel and Sarrafzadeh, Majid and Wong, Chak-Kuen},
    journal=tcad,
    volume={11},
    number={6},
    pages={739--752},
    year={1992},
    publisher={IEEE}
}
@inproceedings{Steiner-DAC1993-Boese,
    title={High-performance routing trees with identified critical sinks},
    author={Boese, Kenneth D and Kahng, Andrew B and Robins, Gabriel},
    booktitle=dac,
    pages={182--187},
    year={1993}
}
@article{Steiner-ALGO1995-Khuller,
    title={Balancing minimum spanning trees and shortest-path trees},
    author={Khuller, Samir and Raghavachari, Balaji and Young, Neal},
    journal={Algorithmica},
    volume={14},
    number={4},
    pages={305--321},
    year={1995},
    publisher={Springer}
}
@article{Steiner-TCAD1995-Alpert,
    title={{Prim-Dijkstra} tradeoffs for improved performance-driven routing tree design},
    author={Alpert, Charles J and Hu, TC and Huang, JH and Kahng, Andrew B and Karger, D},
    journal=tcad,
    volume={14},
    number={7},
    pages={890--896},
    year={1995},
    publisher={IEEE}
}
@inproceedings{Steiner-FOCS2011-Elkin,
    title={{Steiner} Shallow-Light Trees are Exponentially Lighter than Spanning Ones},
    author={Elkin, Michael and Solomon, Shay},
    booktitle=focs,
    pages={373--382},
    year={2011}
}
@article{Steiner-SICOMP2015-Elkin,
    title={{Steiner} shallow-light trees are exponentially lighter than spanning ones},
    author={Elkin, Michael and Solomon, Shay},
    journal=sicomp,
    volume={44},
    number={4},
    pages={996--1025},
    year={2015},
    publisher={SIAM},
}
@inproceedings{Steiner-SOCG2014-Solomon,
	title={Euclidean Steiner shallow-light trees},
	author={Solomon, Shay},
	booktitle=socg,
	pages={454},
	year={2014}
}
@article{Steiner-JOCG2015-Solomon,
	title={Euclidean Steiner shallow-light trees},
	author={Solomon, Shay},
	journal=jocg,
	volume={6},
	number={2},
	pages={113--139},
	year={2015}
}
@inproceedings{Steiner-ICCAD2016-Scheifele,
    title={{RC}-aware global routing},
    author={Scheifele, Rudolf},
    booktitle=iccad,
    pages={21:1--21:8},
    year={2016}
}
@article{Steiner-ALGO2017-Scheifele,
    title={{Steiner} Trees with Bounded {RC}-Delay},
    author={Scheifele, Rudolf},
    journal={Algorithmica},
    year={2017},
    volume={78},
    number={1},
    pages={86--109}
}
@inproceedings{Steiner-ICCAD2017-SALT,
    title={{SALT}: provably good routing topology by a novel {Steiner} shallow-light tree algorithm},
    author={Chen, Gengjie and Tu, Peishan and Young, Evangeline FY},
    booktitle=iccad,
    pages={569--576},
    year={2017}
}
@article{Steiner-TCAD2019-SALT,
    title={{SALT}: provably good routing topology by a novel steiner shallow-light tree algorithm},
    author={Chen, Gengjie and Young, Evangeline FY},
    journal=tcad,
    year={2019},
    publisher={IEEE}
}
@inproceedings{Steiner-ISPD2018-Alpert,
    title={{Prim-Dijkstra} Revisited: Achieving Superior Timing-driven Routing Trees},
    author={Alpert, Charles J and Chow, Wing-Kai and Han, Kwangsoo and Kahng, Andrew B and Li, Zhuo and Liu, Derong and Venkatesh, Sriram},
    booktitle=ispd,
    pages={10--17},
    year={2018}
}
@inproceedings{Steiner-ASPDAC2021-Li,
    title={{TreeNet}: Deep Point Cloud Embedding for Routing Tree Construction},
    author={Wei Li and Yuxiao Qu and Gengjie Chen and Yuzhe Ma and Bei Yu},
    booktitle=aspdac,
    year={2021}
}
%}}}

% ====== buffer tree
@article{Steiner-JIPL2010-Bartoschek,
    title={The repeater tree construction problem},
    author={Bartoschek, Christoph and Held, Stephan and Ma{\ss}berg, Jens and Rautenbach, Dieter and Vygen, Jens},
    journal=jipl,
    volume={110},
    number={24},
    pages={1079--1083},
    year={2010},
    publisher={Elsevier}
}


% ====================================================================
%                   Clock Tree Synthesis (CTS)
% ====================================================================
% ====== buffer / sizing CTS
@inproceedings{CTS-ISPD2008-Samanta,
  title     = {Discrete buffer and wire sizing for link-based non-tree clock networks},
  author    = {Samanta, Rupak and Hu, Jiang and Li, Peng},
  booktitle = ispd,
  pages     = {175--181},
  year      = {2008},
  abstract  = {SVM to approximate SPICE},
}
@article{CTS-TVLSI2010-Samanta,
  title   = {Discrete buffer and wire sizing for link-based non-tree clock networks},
  author  = {Samanta, Rupak and Hu, Jiang and Li, Peng},
  journal = tvlsi,
  volume  = {18},
  number  = {7},
  pages   = {1025--1035},
  year    = {2010},
}
@inproceedings{CTS-ISPD2014-Roy,
  title     = {Clock tree resynthesis for multi-corner multi-mode timing closure},
  author    = {Roy, Subhendu and Mattheakis, Pavlos M. and Masse-Navette, Laurent and Pan, David Z.},
  booktitle = ispd,
  pages     = {69--76},
  year      = {2014},
  abstract  = {incremental CTS},
}
% ====== latch placement
@inproceedings{CTS-ICCAD2013-Ward,
  title     = {Clock power minimization using structured latch templates and decision tree induction},
  author    = {Ward, Samuel I. and Viswanathan, Natarajan and Zhou, Nancy Y. and Sze, Cliff C.~N. and Li, Zhuo and Alpert, Charles J. and Pan, David Z.},
  booktitle = iccad,
  pages     = {599--606},
  year      = {2013},
}
% ====== clock gating
@article{CTS-TVLSI2004-Li,
    title     = {{DCG}: deterministic clock-gating for low-power microprocessor design},
    author    = {Li, Hai and Bhunia, Swarup and Chen, Yiran and Roy, Kaushik and Vijaykumar, TN},
    journal   = tvlsi,
    volume    = {12},
    number    = {3},
    pages     = {245--254},
    year      = {2004},
    publisher = {IEEE}
}
@inproceedings{CTS-ISLPED2008-Jairam,
    title     = {Clock gating for power optimization in {ASIC} design cycle theory \& practice.},
    author    = {Jairam, Sukumar and Rao, Madhusudan and Srinivas, Jithendra and Vishwanath, Parimala and Udayakumar, H and Rao, Jagdish C},
    booktitle = islped,
    pages     = {307--308},
    year      = {2008},
}



% =====================================================================
%                  Multi-bit Flip-Flop (MBFF)
% =====================================================================
%{{{
@inproceedings{MBFF-MWSCAS2011-Lin,
    title     = {Recent research in clock power saving with multi-bit flip-flops},
    author    = {Lin, Mark Po-Hung and Hsu, Chih-Cheng and Chang, Yao-Tsung},
    booktitle = mwscas,
    pages     = {1--4},
    year      = {2011},
}
@inproceedings{MBFF-ICECS2012-Chen,
    title     = {Utilization of multi-bit flip-flops for clock power reduction},
    author    = {Chen, Zhi-Wei and Yan, Jin-Tai},
    booktitle = icecs,
    pages     = {677--680},
    year      = {2012},
}
@inproceedings{MBFF-ISPD2013-Tsai,
    title     = {{FF-Bond}: multi-bit flip-flop bonding at placement},
    author    = {Tsai, Chang-Cheng and Shi, Yiyu and Luo, Guojie and Jiang, Iris Hui-Ru},
    booktitle = ispd,
    pages     = {147--153},
    year      = {2013},
}
@inproceedings{MBFF-ICCAD2013-Hsu,
    title     = {In-placement clock-tree aware multi-bit flip-flop generation for power optimization},
    author    = {Hsu, Chih-Cheng and Chen, Yu-Chuan and Lin, Mark Po-Hung},
    booktitle = iccad,
    pages     = {592--598},
    year      = {2013},
}
%}}}

% ====== Latch / Register Placement
%{{{
@article{LATCH-MM2011-Papa,
    title     = {Physical synthesis with clock-network optimization for large systems on chips},
    author    = {Papa, David and Alpert, Charles and Sze, Cliff and Li, Zhuo and Viswanathan, Natarajan and Nam, Gi-Joon and Markov, Igor L.},
    journal   = mm,
    volume    = {31},
    number    = {4},
    pages     = {51--62},
    year      = {2011},
    publisher = {IEEE},
}
@inproceedings{LATCH-ICCAD2013-Cho,
    title     = {{LatchPlanner}: latch placement algorithm for datapath-oriented high-performance {VLSI} designs},
    author    = {Cho, Minsik and Xiang, Hua and Ren, Haoxing and Ziegler, Matthew M and Puri, Ruchir},
    booktitle = iccad,
    pages     = {342--348},
    year      = {2013},
}
@inproceedings{LATCH-ICCAD2013-Ward,
    title     = {Clock power minimization using structured latch templates and decision tree induction},
    author    = {Ward, Samuel I. and Viswanathan, Natarajan and Zhou, Nancy Y. and Sze, Cliff C.N. and Li, Zhuo and Alpert, Charles J. and Pan, David Z.},
    booktitle = iccad,
    pages     = {599--606},
    year      = {2013},
}
@inproceedings{LATCH-DAC2014-Held,
    title     = {Post-Routing Latch Optimization for Timing Closure},
    author    = {Held, Stephan and Schorr, Ulrike},
    booktitle = dac,
    pages     = {7:1--7:6},
    year      = {2014},
}
%}}}