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Dedicated GPIO drivers, initial implementation #4699
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/hil full |
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@bugadani, HIL per-chip request failed: No valid chips specified. Allowed chips are: esp32c2, esp32c3, esp32c6, esp32h2, esp32, esp32s2, esp32s3 |
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Triggered full HIL run for #4699. Run: https://github.com/esp-rs/esp-hal/actions/runs/20661136841 Status update: HIL (full) run is still in progress or status unknown._ |
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/hil esp32s2 |
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Triggered HIL run for #4699 (chips: esp32s2). Run: https://github.com/esp-rs/esp-hal/actions/runs/20662533509 Status update: HIL (per-chip) run is still in progress or status unknown. |
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/hil esp32s2 |
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Triggered HIL run for #4699 (chips: esp32s2). Run: https://github.com/esp-rs/esp-hal/actions/runs/20715136687 Status update: ❌ HIL (per-chip) run failed (conclusion: failure). |
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Pull request overview
This PR implements the initial dedicated GPIO driver support for ESP32 chips. Dedicated GPIOs provide fast GPIO access through special CPU features that connect peripheral signals directly between the CPU and GPIO pins, bypassing the peripheral bus for better performance.
Key Changes
- Added metadata structures and device configurations for 8 dedicated GPIO channels per chip
- Implemented core dedicated GPIO drivers (
DedicatedGpioInput,DedicatedGpioOutput,DedicatedGpioFlex) - Added test coverage for the basic functionality
- Updated signal names across device TOML files to remove
_IN/_OUTsuffixes for consistency
Reviewed changes
Copilot reviewed 20 out of 21 changed files in this pull request and generated 4 comments.
Show a summary per file
| File | Description |
|---|---|
| esp-metadata/src/cfg/gpio.rs | Added DedicatedGpioChannels struct to define channel metadata |
| esp-metadata/src/cfg.rs | Added DedicatedGpioProperties configuration structure |
| esp-metadata/devices/*.toml | Added dedicated GPIO channel configurations for all supported chips |
| esp-metadata-generated/src/generated*.rs | Generated metadata macros and peripheral definitions |
| esp-metadata-generated/src/_build_script_utils.rs | Added build script cfg flags for dedicated GPIO support |
| esp-hal/src/gpio/mod.rs | Exposed new dedicated module under unstable feature |
| esp-hal/src/gpio/dedicated.rs | Implemented dedicated GPIO drivers with platform-specific assembly |
| hil-test/src/bin/gpio.rs | Added basic test for dedicated GPIO functionality |
| esp-hal/README.md | Updated feature matrix to show dedicated GPIO support |
| esp-hal/CHANGELOG.md | Added changelog entry |
| esp-hal/Cargo.toml | Updated PAC revision and removed some doc delimiters |
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| #! ### PSRAM Feature Flags | ||
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| ## Use externally connected PSRAM (`quad` by default, can be configured to `octal` via ESP_HAL_CONFIG_PSRAM_MODE) | ||
| psram = [] | ||
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Copilot
AI
Jan 5, 2026
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The documentation delimiter comments #DOC_IF has("psram") and #DOC_ENDIF have been removed from around the PSRAM feature section. If these comments serve a purpose for documentation generation, they should not be removed unless this is an intentional change to the documentation infrastructure.
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How did this happen lol
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Pull request overview
Copilot reviewed 20 out of 21 changed files in this pull request and generated 4 comments.
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Pull request overview
Copilot reviewed 20 out of 21 changed files in this pull request and generated 3 comments.
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This PR implements the basics of dedicated GPIOs. The driver design piggybacks on GPIO drivers - the pin setup needs to go through the GPIO drivers, then the configured drivers can be added to dedicated GPIO channels.
Each chip currently has 8 dedicated GPIO channels, although the P4 has 32 peripheral signals for some reason. Obtaining the channels is similar to
SoftwareInterruptControl: a central struct needs to be created before the channels become available. This has been chosen because on S2 and S3 we need some additional setup before using dedicated GPIOs.Channels don't currently implement
reborrow, so they aren't completely emulating peripheral singletons. Instead, they can be passed by value, or by reference, to the dedicated GPIO drivers. This is also true for GPIO drivers, and there is an element of consistency to this decision. But implementingreborrowfor GPIO drivers implies that perhaps all other drivers should also implementreborrow, and that can't be done cheaply - reborrowing will incur some runtime cost to prevent shutting down the driver when a reborrowed "reference" to it is dropped.This PR does not implement a well-encapsulated solution to control multiple dedicated channels at once, but it exposes low-level read/write functions that can be used to achieve the same thing - without any safety rails.
cc #2649