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@bugadani bugadani commented Jan 2, 2026

This PR implements the basics of dedicated GPIOs. The driver design piggybacks on GPIO drivers - the pin setup needs to go through the GPIO drivers, then the configured drivers can be added to dedicated GPIO channels.

Each chip currently has 8 dedicated GPIO channels, although the P4 has 32 peripheral signals for some reason. Obtaining the channels is similar to SoftwareInterruptControl: a central struct needs to be created before the channels become available. This has been chosen because on S2 and S3 we need some additional setup before using dedicated GPIOs.

Channels don't currently implement reborrow, so they aren't completely emulating peripheral singletons. Instead, they can be passed by value, or by reference, to the dedicated GPIO drivers. This is also true for GPIO drivers, and there is an element of consistency to this decision. But implementing reborrow for GPIO drivers implies that perhaps all other drivers should also implement reborrow, and that can't be done cheaply - reborrowing will incur some runtime cost to prevent shutting down the driver when a reborrowed "reference" to it is dropped.

This PR does not implement a well-encapsulated solution to control multiple dedicated channels at once, but it exposes low-level read/write functions that can be used to achieve the same thing - without any safety rails.

cc #2649

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bugadani commented Jan 2, 2026

/hil full

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github-actions bot commented Jan 2, 2026

Usage:

  • /hil quick — run a quick HIL matrix (only ESP32-S3 (Xtensa) and ESP32-C6 (RISC-V) tests)
  • /hil full — run the full HIL matrix for all supported chips
  • /hil <chip> [<chip> ...] — run the full HIL tests only for the listed chips
  • /test-size — run binary size analysis for this PR
  • You can optionally append --tests <name>[,<name>...] to any /hil command to only run selected tests.
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github-actions bot commented Jan 2, 2026

@bugadani, HIL per-chip request failed: No valid chips specified.

Allowed chips are: esp32c2, esp32c3, esp32c6, esp32h2, esp32, esp32s2, esp32s3

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github-actions bot commented Jan 2, 2026

Triggered full HIL run for #4699.

Run: https://github.com/esp-rs/esp-hal/actions/runs/20661136841

Status update: HIL (full) run is still in progress or status unknown._

@bugadani bugadani force-pushed the dedicated branch 3 times, most recently from 4aa2740 to 9de47af Compare January 2, 2026 16:50
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bugadani commented Jan 2, 2026

/hil esp32s2

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Triggered HIL run for #4699 (chips: esp32s2).

Run: https://github.com/esp-rs/esp-hal/actions/runs/20662533509

Status update: HIL (per-chip) run is still in progress or status unknown.

@bugadani bugadani force-pushed the dedicated branch 2 times, most recently from 3c0652b to 236b654 Compare January 5, 2026 09:03
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bugadani commented Jan 5, 2026

/hil esp32s2

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Triggered HIL run for #4699 (chips: esp32s2).

Run: https://github.com/esp-rs/esp-hal/actions/runs/20715136687

Status update: ❌ HIL (per-chip) run failed (conclusion: failure).

@bugadani bugadani changed the title Dedicated GPIO drivers Dedicated GPIO drivers, initial implementation Jan 5, 2026
@bugadani bugadani marked this pull request as ready for review January 5, 2026 12:54
Copilot AI review requested due to automatic review settings January 5, 2026 12:54
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Pull request overview

This PR implements the initial dedicated GPIO driver support for ESP32 chips. Dedicated GPIOs provide fast GPIO access through special CPU features that connect peripheral signals directly between the CPU and GPIO pins, bypassing the peripheral bus for better performance.

Key Changes

  • Added metadata structures and device configurations for 8 dedicated GPIO channels per chip
  • Implemented core dedicated GPIO drivers (DedicatedGpioInput, DedicatedGpioOutput, DedicatedGpioFlex)
  • Added test coverage for the basic functionality
  • Updated signal names across device TOML files to remove _IN/_OUT suffixes for consistency

Reviewed changes

Copilot reviewed 20 out of 21 changed files in this pull request and generated 4 comments.

Show a summary per file
File Description
esp-metadata/src/cfg/gpio.rs Added DedicatedGpioChannels struct to define channel metadata
esp-metadata/src/cfg.rs Added DedicatedGpioProperties configuration structure
esp-metadata/devices/*.toml Added dedicated GPIO channel configurations for all supported chips
esp-metadata-generated/src/generated*.rs Generated metadata macros and peripheral definitions
esp-metadata-generated/src/_build_script_utils.rs Added build script cfg flags for dedicated GPIO support
esp-hal/src/gpio/mod.rs Exposed new dedicated module under unstable feature
esp-hal/src/gpio/dedicated.rs Implemented dedicated GPIO drivers with platform-specific assembly
hil-test/src/bin/gpio.rs Added basic test for dedicated GPIO functionality
esp-hal/README.md Updated feature matrix to show dedicated GPIO support
esp-hal/CHANGELOG.md Added changelog entry
esp-hal/Cargo.toml Updated PAC revision and removed some doc delimiters

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Comment on lines 277 to 281
#! ### PSRAM Feature Flags

## Use externally connected PSRAM (`quad` by default, can be configured to `octal` via ESP_HAL_CONFIG_PSRAM_MODE)
psram = []

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The documentation delimiter comments #DOC_IF has("psram") and #DOC_ENDIF have been removed from around the PSRAM feature section. If these comments serve a purpose for documentation generation, they should not be removed unless this is an intentional change to the documentation infrastructure.

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How did this happen lol

Copilot AI review requested due to automatic review settings January 5, 2026 13:01
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Pull request overview

Copilot reviewed 20 out of 21 changed files in this pull request and generated 4 comments.


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Copilot AI review requested due to automatic review settings January 5, 2026 13:34
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Pull request overview

Copilot reviewed 20 out of 21 changed files in this pull request and generated 3 comments.


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