From aaa537f293fbd8cdb88f12cf7f7dbd7a289bddd6 Mon Sep 17 00:00:00 2001 From: fogInSingularity Date: Sun, 21 Dec 2025 14:51:17 +0300 Subject: [PATCH 1/5] add py generator for decoder based on binary decode tree --- .gitignore | 3 + src/isa/CMakeLists.txt | 1 - src/isa/include/isa/ext_f.inc | 2 +- src/sim/CMakeLists.txt | 4 +- src/sim/decode/CMakeLists.txt | 25 +++ .../sim => decode/include/decode}/decode.hpp | 4 +- src/sim/decode/pygen/CMakeLists.txt | 74 +++++++ src/sim/decode/pygen/compile_dot.sh | 3 + src/sim/decode/pygen/emit_cpp.py | 42 ++++ src/sim/decode/pygen/gen_decoder.py | 24 +++ src/sim/decode/pygen/insn_mnem.py | 9 + src/sim/decode/pygen/mnem_parse.py | 55 ++++++ src/sim/decode/pygen/opcode_dtree.py | 185 ++++++++++++++++++ .../source/lin_decode.cpp} | 10 +- src/sim/source/rv_sim.cpp | 4 +- tests/compute_heavy_test/clean.sh | 2 +- third_party/CMakeLists.txt | 2 +- 17 files changed, 436 insertions(+), 13 deletions(-) create mode 100644 src/sim/decode/CMakeLists.txt rename src/sim/{include/sim => decode/include/decode}/decode.hpp (77%) create mode 100644 src/sim/decode/pygen/CMakeLists.txt create mode 100755 src/sim/decode/pygen/compile_dot.sh create mode 100644 src/sim/decode/pygen/emit_cpp.py create mode 100644 src/sim/decode/pygen/gen_decoder.py create mode 100644 src/sim/decode/pygen/insn_mnem.py create mode 100644 src/sim/decode/pygen/mnem_parse.py create mode 100644 src/sim/decode/pygen/opcode_dtree.py rename src/sim/{source/decode.cpp => decode/source/lin_decode.cpp} (81%) diff --git a/.gitignore b/.gitignore index 26e9899..1012bcb 100644 --- a/.gitignore +++ b/.gitignore @@ -2,6 +2,9 @@ build *.log compile_commands.json .cache +perf.data +perf.data.old +__pycache__ # tests: *.o diff --git a/src/isa/CMakeLists.txt b/src/isa/CMakeLists.txt index 316b6b8..d1e10df 100644 --- a/src/isa/CMakeLists.txt +++ b/src/isa/CMakeLists.txt @@ -21,6 +21,5 @@ target_link_libraries(isa sim-flags sim helpers - softfloat ) diff --git a/src/isa/include/isa/ext_f.inc b/src/isa/include/isa/ext_f.inc index 8463677..542d55a 100644 --- a/src/isa/include/isa/ext_f.inc +++ b/src/isa/include/isa/ext_f.inc @@ -1,4 +1,4 @@ -// name mask match +// name mask match MNEMONIC(FLW, 0x0000707f, 0x00002007) MNEMONIC(FSW, 0x0000707f, 0x00002027) diff --git a/src/sim/CMakeLists.txt b/src/sim/CMakeLists.txt index 31c3818..c03947a 100644 --- a/src/sim/CMakeLists.txt +++ b/src/sim/CMakeLists.txt @@ -1,9 +1,10 @@ add_library(sim STATIC) +add_subdirectory(decode) + target_sources(sim PRIVATE source/elf_loader.cpp - source/decode.cpp source/memory.cpp source/rv_sim.cpp source/dispatch.cpp @@ -19,6 +20,7 @@ target_link_libraries(sim sim-flags helpers isa + decode spdlog elfio::elfio diff --git a/src/sim/decode/CMakeLists.txt b/src/sim/decode/CMakeLists.txt new file mode 100644 index 0000000..f0dfe8e --- /dev/null +++ b/src/sim/decode/CMakeLists.txt @@ -0,0 +1,25 @@ +add_library(decode STATIC) + +add_subdirectory(pygen) + +set_source_files_properties("${DECODE_CPP_OUT}" PROPERTIES GENERATED TRUE) + +target_sources(decode PRIVATE "${DECODE_CPP_OUT}") + +add_dependencies(decode ${DECODE_CODEGEN_TARGET}) + +target_include_directories(decode + PUBLIC + include +) + +target_link_libraries(decode + PRIVATE + sim-flags + helpers + isa + + spdlog + softfloat +) + diff --git a/src/sim/include/sim/decode.hpp b/src/sim/decode/include/decode/decode.hpp similarity index 77% rename from src/sim/include/sim/decode.hpp rename to src/sim/decode/include/decode/decode.hpp index 03adcbd..69594cd 100644 --- a/src/sim/include/sim/decode.hpp +++ b/src/sim/decode/include/decode/decode.hpp @@ -4,10 +4,10 @@ #include "isa/mnemonics.hpp" #include "isa/isa_defs.hpp" -namespace sim { +namespace sim::decode { isa::InsnMnemonic Decode(isa::UndecodedInsn insn); -} +} // namespace sim::decode #endif // DECODE_HPP_ diff --git a/src/sim/decode/pygen/CMakeLists.txt b/src/sim/decode/pygen/CMakeLists.txt new file mode 100644 index 0000000..31f2a66 --- /dev/null +++ b/src/sim/decode/pygen/CMakeLists.txt @@ -0,0 +1,74 @@ +find_package(Python3 REQUIRED COMPONENTS Interpreter) + +set(DECODE_PYGEN_DIR "${CMAKE_CURRENT_LIST_DIR}") +set(DECODE_DIR "${DECODE_PYGEN_DIR}/..") # decode/ +get_filename_component(DECODE_DIR "${DECODE_DIR}" ABSOLUTE) # normilize path + +set(GEN_SCRIPT "${DECODE_PYGEN_DIR}/gen_decoder.py") +set(GEN_DEPS + "${DECODE_PYGEN_DIR}/gen_decoder.py" + "${DECODE_PYGEN_DIR}/insn_mnem.py" + "${DECODE_PYGEN_DIR}/opcode_dtree.py" + "${DECODE_PYGEN_DIR}/mnem_parse.py" + "${DECODE_PYGEN_DIR}/emit_cpp.py" +) + +set(LIN_CPP "${DECODE_DIR}/source/lin_decode.cpp") + +set(ISA_EXT_INC "${CMAKE_SOURCE_DIR}/src/isa/include/isa/isa_ext.inc") + +set(GEN_DIR "${CMAKE_CURRENT_BINARY_DIR}/generated") +set(DECODE_CPP_OUT "${GEN_DIR}/decode.cpp") +set(DOT_OUT "${GEN_DIR}/dtree.dot") +set(COMPILE_DOT_SH "compile_dot.sh") + +# options +set(DECODE_BACKEND "generated" CACHE STRING "Decode backend: linear|generated") +set_property(CACHE DECODE_BACKEND PROPERTY STRINGS linear generated) + +option(DECODE_EMIT_DOT "Emit decode decision tree .dot during generation" OFF) +set(DECODE_GEN_EXTRA_ARGS "" CACHE STRING "Extra args for gen_decoder.py (CMake list separated by ';')") + +# Build command depending on backend +if (DECODE_BACKEND STREQUAL "generated") + if (DECODE_EMIT_DOT) + set(DOT_ARGS --dot "${DOT_OUT}") + else() + set(DOT_ARGS) + endif() + + add_custom_command( + OUTPUT "${DECODE_CPP_OUT}" + COMMAND "${CMAKE_COMMAND}" -E make_directory "${GEN_DIR}" + COMMAND "${Python3_EXECUTABLE}" "${GEN_SCRIPT}" + --isa "${ISA_EXT_INC}" + --output "${DECODE_CPP_OUT}" + ${DOT_ARGS} + ${DECODE_GEN_EXTRA_ARGS} + COMMAND "${CMAKE_COMMAND}" -E copy_if_different "${DECODE_PYGEN_DIR}/${COMPILE_DOT_SH}" "${GEN_DIR}/${COMPILE_DOT_SH}" + DEPENDS + "${ISA_EXT_INC}" + "${DECODE_PYGEN_DIR}/${COMPILE_DOT_SH}" + ${GEN_DEPS} + WORKING_DIRECTORY "${DECODE_PYGEN_DIR}" + COMMENT "Generating decoder.cpp (backend=generated)" + VERBATIM + ) +elseif (DECODE_BACKEND STREQUAL "linear") + add_custom_command( + OUTPUT "${DECODE_CPP_OUT}" + COMMAND "${CMAKE_COMMAND}" -E make_directory "${GEN_DIR}" + COMMAND "${CMAKE_COMMAND}" -E copy_if_different "${LIN_CPP}" "${DECODE_CPP_OUT}" + DEPENDS "${LIN_CPP}" + COMMENT "Preparing decoder.cpp (backend=linear)" + VERBATIM + ) +else() + message(FATAL_ERROR "Unknown DECODE_BACKEND='${DECODE_BACKEND}'. Use linear|generated.") +endif() + +add_custom_target(decode_codegen DEPENDS "${DECODE_CPP_OUT}") + +# Export outputs to decode +set(DECODE_CPP_OUT "${DECODE_CPP_OUT}" PARENT_SCOPE) +set(DECODE_CODEGEN_TARGET decode_codegen PARENT_SCOPE) diff --git a/src/sim/decode/pygen/compile_dot.sh b/src/sim/decode/pygen/compile_dot.sh new file mode 100755 index 0000000..cb535e1 --- /dev/null +++ b/src/sim/decode/pygen/compile_dot.sh @@ -0,0 +1,3 @@ +#/bin/bash + +dot -Tsvg $1 -o $1.svg diff --git a/src/sim/decode/pygen/emit_cpp.py b/src/sim/decode/pygen/emit_cpp.py new file mode 100644 index 0000000..08f0bf0 --- /dev/null +++ b/src/sim/decode/pygen/emit_cpp.py @@ -0,0 +1,42 @@ +from opcode_dtree import DTree, DTreeLeaf, DTreeNode, DTreeTestBit +from pathlib import Path + +def _node_gen(node: DTreeNode, depth: int = 0) -> str: + indent = " " * depth + + if isinstance(node, DTreeLeaf): + return f"{indent}return isa::InsnMnemonic::{node.insn_name};\n" + + cond_if = f"{indent}if (isa::IsBitSet(insn, {node.bit_idx})) {{\n" + cond_else = f"{indent}}} else {{\n" + cond_end = f"{indent}}}\n" + + return cond_if + _node_gen(node.one, depth=depth + 1) + cond_else + _node_gen(node.zero, depth=depth + 1) + cond_end + +def gen(op_dtree: DTree, namespace: str = "sim::decode") -> str: + prologue = f""" + // THIS CODE IS GENERATED + // by decode/gen_decoder.py + #include "decode/decode.hpp" + + #include "isa/isa_hlp.hpp" + #include "isa/mnemonics.hpp" + + namespace {namespace} {{ + + isa::InsnMnemonic Decode(isa::UndecodedInsn insn) {{ + """ + + epilogue = f""" + }} + + }} // namespace {namespace} + """ + + decode_body = _node_gen(op_dtree.get_root(), depth=1) + + return prologue + decode_body + epilogue + +def write_gen(gen_path: Path, opcode_dtree: DTree, namespace: str = "sim::decode"): + gen_code = gen(opcode_dtree, namespace=namespace) + gen_path.write_text(gen_code) diff --git a/src/sim/decode/pygen/gen_decoder.py b/src/sim/decode/pygen/gen_decoder.py new file mode 100644 index 0000000..d1725ec --- /dev/null +++ b/src/sim/decode/pygen/gen_decoder.py @@ -0,0 +1,24 @@ +import argparse +from pathlib import Path + +import mnem_parse +import opcode_dtree +import emit_cpp + +if __name__ == "__main__": + parser = argparse.ArgumentParser() + parser.add_argument("--isa", required=True, help="isa_ext.inc file path") + parser.add_argument("--output", required=True, help="output file path") + parser.add_argument("--dot", help="file path to .dot representation of decode tree") + args = parser.parse_args() + + isa_path = Path(args.isa).resolve() + + mnems = mnem_parse.parse(isa_path) + dtree = opcode_dtree.build_dtree(mnems) + if args.dot: + dot_path = Path(args.dot) + dtree.write_dot(dot_path) + + cpp_path = Path(args.output) + emit_cpp.write_gen(cpp_path, dtree) diff --git a/src/sim/decode/pygen/insn_mnem.py b/src/sim/decode/pygen/insn_mnem.py new file mode 100644 index 0000000..e62f46b --- /dev/null +++ b/src/sim/decode/pygen/insn_mnem.py @@ -0,0 +1,9 @@ +from dataclasses import dataclass + +@dataclass() +class Insn: + name: str + mask: int + match: int + + diff --git a/src/sim/decode/pygen/mnem_parse.py b/src/sim/decode/pygen/mnem_parse.py new file mode 100644 index 0000000..24f68aa --- /dev/null +++ b/src/sim/decode/pygen/mnem_parse.py @@ -0,0 +1,55 @@ +from typing import List +from pathlib import Path +import re + +from insn_mnem import Insn + +# example of match #include "isa/ext_i.inc" +MNEM_PATH_RGX = re.compile(r'^(?!//)[ \t]*#include\s+"isa/(?P[^\"]+)"', re.MULTILINE) + +def _mnem_files(isa_path: Path) -> List[Path]: + isa_src = isa_path.read_text() + isa_dir = isa_path.parent + + files = [] + for file_match in MNEM_PATH_RGX.finditer(isa_src): + files.append(isa_dir / Path(file_match.group("file_name"))) + + return files + +# example of mathc +# MNEMONIC(LUI, 0x0000007f, 0x00000037) +MNEM_RGX = re.compile(r""" + MNEMONIC\( + \s*(?P\w+)\s*, + \s*(?P0x[0-9a-fA-F]+)\s*, + \s*(?P0x[0-9a-fA-F]+)\s* + \) + """, + re.VERBOSE +) + +def _parse_mnem_file(mnem_file: Path) -> List[Insn]: + mnem_src = mnem_file.read_text() + mnems = [] + + for mnem_match in MNEM_RGX.finditer(mnem_src): + name = mnem_match.group("name") + mask = int(mnem_match.group("mask"), 16) + match = int(mnem_match.group("match"), 16) + + insn = Insn(name, mask, match) + mnems.append(insn) + + return mnems + +def parse(isa_path: Path) -> List[Insn]: + files = _mnem_files(isa_path) + + isa_mnems = [] + + for mnem_file in files: + mnems = _parse_mnem_file(mnem_file) + isa_mnems += mnems + + return isa_mnems diff --git a/src/sim/decode/pygen/opcode_dtree.py b/src/sim/decode/pygen/opcode_dtree.py new file mode 100644 index 0000000..9df0f39 --- /dev/null +++ b/src/sim/decode/pygen/opcode_dtree.py @@ -0,0 +1,185 @@ +from pathlib import Path +from dataclasses import dataclass +from typing import List, Tuple, Optional, Union, Set, Dict + +from insn_mnem import Insn + +@dataclass +class DTreeLeaf: + # insn: Insn + insn_name: str + +@dataclass +class DTreeTestBit: + bit_idx: int + zero: "DTreeNode" + one: "DTreeNode" + +type DTreeNode = Union[DTreeLeaf, DTreeTestBit] + +@dataclass +class DTree: + root: DTreeNode + + def get_root(self) -> DTreeNode: + return self.root + + def to_dot(self, *, name: str = "decode") -> str: + nodes_id: Dict[int, int] = {} + next_id = 0 + + def _get_id(node: DTreeNode) -> int: + nonlocal next_id + key = id(node) + if key not in nodes_id: + nodes_id[key] = next_id + next_id += 1 + return nodes_id[key] + + lines = [] + lines += f"digraph {name} {{\n" + lines += " rankdir=TB;\n" + + def _emit_node(node: DTreeNode): + nonlocal lines + + node_id = _get_id(node) + + if isinstance(node, DTreeLeaf): + lines += f' node{node_id} [shape=box, label={node.insn_name}];\n' + return + + lines += f' node{node_id} [shape=box, label={node.bit_idx}];\n' + + # test bit node + _emit_node(node.zero) + _emit_node(node.one) + + zero_id = _get_id(node.zero) + one_id = _get_id(node.one) + + lines += f' node{node_id} -> node{zero_id} [label="0"];\n' + lines += f' node{node_id} -> node{one_id} [label="1"];\n' + + _emit_node(self.root) + + lines += f'}}\n' + return "".join(lines) + + def write_dot(self, dot_path: Path, *, name: str = "decode"): + dot = self.to_dot(name=name) + dot_path.write_text(dot) + +def _bit_by_idx(x: int, idx: int) -> int: + return (x >> idx) & 1 + +type Branch = List[Insn] +type Decision = Tuple[Branch, Branch, bool] + +def _split_on_bit(cands: List[Insn], bit_idx: int) -> Decision: + branch0: Branch = [] + branch1: Branch = [] + has_req0: bool = False + has_req1: bool = False + + for insn in cands: + mask_bit = _bit_by_idx(insn.mask, bit_idx) + if mask_bit == 0: # pattern dont care + branch0.append(insn) + branch1.append(insn) + continue + + match_bit = _bit_by_idx(insn.match, bit_idx) + if match_bit == 0: + branch0.append(insn) + has_req0 = True + else: + branch1.append(insn) + has_req1 = True + + return (branch0, branch1, has_req0 and has_req1) + +def _significant_bits(cands: List[Insn]) -> List[int]: + union_mask = 0 + for insn in cands: + union_mask |= insn.mask & 0xFFFFFFFF + return [b for b in range(32) if (union_mask >> b) & 1] + +type Heuristic = Tuple[int, int, int] + +def _bit_heuristic( + branch0: Branch, + branch1: Branch, + bit: int +) -> Heuristic: + b_depth = max(len(branch0), len(branch1)) + summ = len(branch0) + len(branch1) + # heuristic = (b_depth, summ, bit) + heuristic = (summ, b_depth, bit) + return heuristic + +def _choose_bit( + cands: List[Insn], + bits: List[int] +) -> Optional[int]: + # b_depth, summ, bit + best_bit: Optional[Heuristic] = None + + for bit in bits: + branch0, branch1, differ = _split_on_bit(cands, bit) + if not differ: # should split at least one 0 and 1 case + continue + + heuristic = _bit_heuristic(branch0, branch1, bit) + if best_bit is None or heuristic < best_bit: + best_bit = heuristic + + return best_bit[-1] if best_bit is not None else None + +def _build_dtree_impl( + cands: List[Insn], + *, + bits: Optional[List[int]] = None, + used_bits: Optional[Set[int]] = None, +) -> DTreeNode: + if used_bits is None: + used_bits = set() + + # check for depth + + if not cands: + return DTreeLeaf("ILLEGAL") + + if len(cands) == 1: + return DTreeLeaf(cands[0].name) + + if bits is None: + bits = _significant_bits(cands) + + remained_bits = [b for b in bits if b not in used_bits] + + best_bit = _choose_bit(cands, remained_bits) + if best_bit is None: + raise RuntimeError(f"Cannot decode, ambiguity in isa: cands: {cands}") + + branch0, branch1, differ = _split_on_bit(cands, best_bit) + assert differ, "best_bit should always be differ one" + + updated_used_bits = used_bits | {best_bit} + + zero = _build_dtree_impl( + branch0, + bits=bits, + used_bits=updated_used_bits, + ) + one = _build_dtree_impl( + branch1, + bits=bits, + used_bits=updated_used_bits, + ) + + return DTreeTestBit(best_bit, zero, one) + +def build_dtree(cands: List[Insn]) -> DTree: + root = _build_dtree_impl(cands) + return DTree(root=root) diff --git a/src/sim/source/decode.cpp b/src/sim/decode/source/lin_decode.cpp similarity index 81% rename from src/sim/source/decode.cpp rename to src/sim/decode/source/lin_decode.cpp index 29aaab0..6f3cfbb 100644 --- a/src/sim/source/decode.cpp +++ b/src/sim/decode/source/lin_decode.cpp @@ -1,4 +1,7 @@ -#include "sim/decode.hpp" +// this is one of the decoder implementations +// have bad performance, but usefull for debug + +#include "decode/decode.hpp" #include #include @@ -6,7 +9,7 @@ #include "isa/mnemonics.hpp" #include "isa/isa_defs.hpp" -namespace sim { +namespace sim::decode { using InsnMask = isa::UndecodedInsn; using InsnMatch = isa::UndecodedInsn; @@ -25,7 +28,6 @@ constexpr DecodeTable InsnDecodeTable {{ #undef MNEMONIC }}; -// FIXME fix decode isa::InsnMnemonic Decode(isa::UndecodedInsn insn) { for (auto& entry: InsnDecodeTable) { if ((insn & entry.mask) == entry.match) { @@ -36,4 +38,4 @@ isa::InsnMnemonic Decode(isa::UndecodedInsn insn) { return isa::InsnMnemonic::kInvalid; } -} // namespace sim +} // namespace sim::decode diff --git a/src/sim/source/rv_sim.cpp b/src/sim/source/rv_sim.cpp index 0763e2e..cf713b2 100644 --- a/src/sim/source/rv_sim.cpp +++ b/src/sim/source/rv_sim.cpp @@ -7,7 +7,7 @@ #include "helpers/traceable_exception.hpp" #include "helpers/common.hpp" #include "isa/mnemonics.hpp" -#include "sim/decode.hpp" +#include "decode/decode.hpp" #include "sim/dispatch.hpp" #include "isa/isa_defs.hpp" @@ -20,7 +20,7 @@ int RVSim::Execute() { isa::UndecodedInsn undecoded_insn = memory_.Fetch(ip_); SPDLOG_TRACE("undecoded insn: {:#04x}", undecoded_insn); - isa::InsnMnemonic mnem = Decode(undecoded_insn); + isa::InsnMnemonic mnem = decode::Decode(undecoded_insn); SPDLOG_TRACE("Mnemonic: {}", isa::MnemonicToStr(mnem)); if (mnem == isa::InsnMnemonic::kInvalid) { throw hlp::TraceableException{"Unkown instuction encountered"}; diff --git a/tests/compute_heavy_test/clean.sh b/tests/compute_heavy_test/clean.sh index 7bef22d..b7c1a1f 100755 --- a/tests/compute_heavy_test/clean.sh +++ b/tests/compute_heavy_test/clean.sh @@ -1,3 +1,3 @@ #!/bin/bash -rm *.o *.x +rm -f *.o *.x diff --git a/third_party/CMakeLists.txt b/third_party/CMakeLists.txt index 152f6c4..553e4b5 100644 --- a/third_party/CMakeLists.txt +++ b/third_party/CMakeLists.txt @@ -44,7 +44,7 @@ add_dependencies(softfloat_lib softfloat_ext) add_library(softfloat_headers INTERFACE) target_include_directories(softfloat_headers INTERFACE - . + "${CMAKE_SOURCE_DIR}/third_party" "${SOURCE_DIR}/source/include" ) From ce5259704ca77736aef412f79c55662684a93c22 Mon Sep 17 00:00:00 2001 From: fogInSingularity Date: Sun, 21 Dec 2025 14:57:04 +0300 Subject: [PATCH 2/5] fix ci --- .github/workflows/workflow.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.github/workflows/workflow.yaml b/.github/workflows/workflow.yaml index a0617d1..741934d 100644 --- a/.github/workflows/workflow.yaml +++ b/.github/workflows/workflow.yaml @@ -65,12 +65,12 @@ jobs: path: build - name: clone risc-v tests - if: matrix.compiler.name == 'clang' + if: matrix.compiler_name == 'clang' run: | git clone --depth 1 https://gitlab.com/iDang3r/riscv-interpreter-task.git - name: run risc-v tests - if: matrix.compiler.name == 'clang' + if: matrix.compiler_name == 'clang' working-directory: riscv-interpreter-task run: | make test INTERPRETER="${{ github.workspace }}/build/riscv-sim.x" From cc5aa34dae2ba7b98730b950563cf8ed178d3f1a Mon Sep 17 00:00:00 2001 From: fogInSingularity Date: Sun, 21 Dec 2025 15:00:27 +0300 Subject: [PATCH 3/5] fix ci --- .github/workflows/workflow.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/.github/workflows/workflow.yaml b/.github/workflows/workflow.yaml index 741934d..f5043a1 100644 --- a/.github/workflows/workflow.yaml +++ b/.github/workflows/workflow.yaml @@ -64,6 +64,10 @@ jobs: name: riscv-sim-${{ matrix.compiler_name }}-${{ matrix.build_type }} path: build + - name: make sim executable + run: | + chmod +x build/riscv-sim.x + - name: clone risc-v tests if: matrix.compiler_name == 'clang' run: | From 8297f04377bf8cb63b318a0f566a693aaef05a13 Mon Sep 17 00:00:00 2001 From: fogInSingularity Date: Sun, 21 Dec 2025 15:30:23 +0300 Subject: [PATCH 4/5] up debug logging level --- flags/CMakeLists.txt | 2 +- src/main.cpp | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/flags/CMakeLists.txt b/flags/CMakeLists.txt index 3c6ec12..dae8e12 100644 --- a/flags/CMakeLists.txt +++ b/flags/CMakeLists.txt @@ -70,5 +70,5 @@ target_link_options(sim-flags target_compile_definitions(sim-flags INTERFACE $<$:SPDLOG_ACTIVE_LEVEL=SPDLOG_LEVEL_INFO> - $<$:SPDLOG_ACTIVE_LEVEL=SPDLOG_LEVEL_TRACE> + $<$:SPDLOG_ACTIVE_LEVEL=SPDLOG_LEVEL_DEBUG> ) diff --git a/src/main.cpp b/src/main.cpp index 1f49bc3..a385df5 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -21,8 +21,8 @@ int main(int argc, const char* argv[]) { #if defined (NDEBUG) spdlog::set_level(spdlog::level::info); #else // NDEBUG - spdlog::flush_on(spdlog::level::trace); - spdlog::set_level(spdlog::level::trace); + // spdlog::flush_on(spdlog::level::trace); + spdlog::set_level(spdlog::level::debug); #endif // NDEBUG // log argv From c77359ee0487cdf9802f2b9dcae1add38a83516d Mon Sep 17 00:00:00 2001 From: fogInSingularity Date: Sun, 21 Dec 2025 15:44:26 +0300 Subject: [PATCH 5/5] change trace_call log level to trace --- src/helpers/include/helpers/trace_calls.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/helpers/include/helpers/trace_calls.hpp b/src/helpers/include/helpers/trace_calls.hpp index 38c5df0..a6411ea 100644 --- a/src/helpers/include/helpers/trace_calls.hpp +++ b/src/helpers/include/helpers/trace_calls.hpp @@ -10,7 +10,7 @@ namespace hlp { inline void trace_call([[maybe_unused]] std::source_location loc = std::source_location::current()) { #if !defined(NDEBUG) // spdlog::debug("Function call: {}, {}:{}", loc.function_name(), loc.file_name(), loc.line()); - spdlog::debug("Function call: {}", loc.function_name()); + spdlog::trace("Function call: {}", loc.function_name()); #endif // NDEBUG }