diff --git a/.gitignore b/.gitignore index 789f338..422ed93 100644 --- a/.gitignore +++ b/.gitignore @@ -6,3 +6,6 @@ /*.vid /*.mkv /DMG_ROM.bin +obj_dir +obj-gameboy +obj-debug diff --git a/Makefile b/Makefile index 50d815c..9a19e2e 100644 --- a/Makefile +++ b/Makefile @@ -181,7 +181,7 @@ mkvid/mkimgs: mkvid/mkimgs.c boot/quickboot.bin: make -C boot -.PHONY: test test-all test-cpu test-boot +.PHONY: test test-all test-cpu test-boot verilator verilator-test TEST_DEPENDENCIES = dmg_cpu_b_gameboy.vvp boot/quickboot.bin mkvid/mkimgs @@ -197,3 +197,56 @@ test-cpu: $(TEST_DEPENDENCIES) test-boot: $(TEST_DEPENDENCIES) tests/run_tests.sh boot +verilator: + verilator --Mdir obj-gameboy \ + -Wno-fatal --timing --cc --trace-fst \ + --top-module dmg_cpu_b_gameboy \ + --binary -j 0 \ + $(AV_DUMP) dmg_cpu_b_gameboy.sv $(DMG_CPU_B) $(SM83) $(MBC) + +# same as above, but without trace +verilator-test: + verilator --Mdir obj-test \ + --debug \ + -Wno-fatal --timing --cc \ + --top-module dmg_cpu_b_gameboy \ + --binary -j 0 \ + $(AV_DUMP) dmg_cpu_b_gameboy.sv $(DMG_CPU_B) $(SM83) $(MBC) + +verilator-debug: + verilator --Mdir obj-debug \ + -CFLAGS -DVL_DEBUG=1 \ + --debug --trace-fst \ + -Wno-fatal --timing --cc \ + --top-module dmg_cpu_b_gameboy \ + --binary -j 0 \ + $(AV_DUMP) dmg_cpu_b_gameboy.sv $(DMG_CPU_B) $(SM83) $(MBC) + +sim-verilator: verilator + ./obj-gameboy/Vdmg_cpu_b_gameboy +DUMPFILE=dmg_cpu_b_gameboy_ver.fst \ + $(call VVP_CH_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + $(call VVP_SND_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + $(call VVP_VID_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + +BOOTROM="$(BOOTROM)" \ + +ROM="$(ROM)" \ + +SECS=$(SECS) + +sim-verilator-test: verilator-test + ./obj-test/Vdmg_cpu_b_gameboy \ + $(call VVP_CH_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + $(call VVP_SND_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + $(call VVP_VID_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + +BOOTROM="$(BOOTROM)" \ + +ROM="$(ROM)" \ + +SECS=$(SECS) + +sim-verilator-debug: verilator-debug + ./obj-debug/Vdmg_cpu_b_gameboy \ + $(call VVP_CH_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + $(call VVP_SND_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + $(call VVP_VID_DUMP_FLAGS,dmg_cpu_b_gameboy) \ + +verilator+debug \ + +BOOTROM="$(BOOTROM)" \ + +ROM="$(ROM)" \ + +SECS=$(SECS) + diff --git a/dmg_cpu_b/cells/dffr_a.sv b/dmg_cpu_b/cells/dffr_a.sv index aecbb37..cb9ac42 100644 --- a/dmg_cpu_b/cells/dffr_a.sv +++ b/dmg_cpu_b/cells/dffr_a.sv @@ -23,6 +23,6 @@ module dffr_a #( ff <= 0; end - assign #T_DFFR_A q = ff; + assign q = ff; endmodule diff --git a/dmg_cpu_b/cells/dffr_b.sv b/dmg_cpu_b/cells/dffr_b.sv index 2706def..9ff2a33 100644 --- a/dmg_cpu_b/cells/dffr_b.sv +++ b/dmg_cpu_b/cells/dffr_b.sv @@ -20,6 +20,6 @@ module dffr_b #( ff <= 0; end - assign #T_DFFR_B q = ff; + assign q = ff; endmodule diff --git a/dmg_cpu_b/cells/dffr_bp.sv b/dmg_cpu_b/cells/dffr_bp.sv index 5806fc7..6ab1a09 100644 --- a/dmg_cpu_b/cells/dffr_bp.sv +++ b/dmg_cpu_b/cells/dffr_bp.sv @@ -20,6 +20,6 @@ module dffr_bp #( ff <= 0; end - assign #T_DFFR_BP q = ff; + assign q = ff; endmodule diff --git a/dmg_cpu_b/cells/dffsr.sv b/dmg_cpu_b/cells/dffsr.sv index 7a7fa86..0bcf92c 100644 --- a/dmg_cpu_b/cells/dffsr.sv +++ b/dmg_cpu_b/cells/dffsr.sv @@ -40,6 +40,6 @@ module dffsr #( nreset_posedge <= 0; end - assign #T_DFFSR q = ff; + assign q = ff; endmodule diff --git a/dmg_cpu_b/cells/dlatch_a.sv b/dmg_cpu_b/cells/dlatch_a.sv index ed36ecc..9cdad6d 100644 --- a/dmg_cpu_b/cells/dlatch_a.sv +++ b/dmg_cpu_b/cells/dlatch_a.sv @@ -16,6 +16,6 @@ module dlatch_a #( l = d; end - assign #T_DL_A q = l; + assign q = l; endmodule diff --git a/dmg_cpu_b/cells/dlatch_b.sv b/dmg_cpu_b/cells/dlatch_b.sv index 0dd217d..580b39d 100644 --- a/dmg_cpu_b/cells/dlatch_b.sv +++ b/dmg_cpu_b/cells/dlatch_b.sv @@ -14,6 +14,6 @@ module dlatch_b( l = d; end - assign #T_DL_B q = l; + assign q = l; endmodule diff --git a/dmg_cpu_b/cells/drlatch.sv b/dmg_cpu_b/cells/drlatch.sv index 243e5ca..1e9790f 100644 --- a/dmg_cpu_b/cells/drlatch.sv +++ b/dmg_cpu_b/cells/drlatch.sv @@ -18,6 +18,6 @@ module drlatch #( l = d; end - assign #T_DRL q = l; + assign q = l; endmodule diff --git a/dmg_cpu_b/cells/nand_srlatch.sv b/dmg_cpu_b/cells/nand_srlatch.sv index f6d6906..d6a0735 100644 --- a/dmg_cpu_b/cells/nand_srlatch.sv +++ b/dmg_cpu_b/cells/nand_srlatch.sv @@ -25,7 +25,7 @@ module nand_srlatch( end end - assign #T_SRL q = lp; - assign #T_SRL nq = lm; + assign q = lp; + assign nq = lm; endmodule diff --git a/dmg_cpu_b/cells/nor_srlatch.sv b/dmg_cpu_b/cells/nor_srlatch.sv index fa22b37..3ef1bb7 100644 --- a/dmg_cpu_b/cells/nor_srlatch.sv +++ b/dmg_cpu_b/cells/nor_srlatch.sv @@ -25,7 +25,7 @@ module nor_srlatch( end end - assign #T_SRL q = lp; - assign #T_SRL nq = lm; + assign q = lp; + assign nq = lm; endmodule diff --git a/dmg_cpu_b/cells/tffd.sv b/dmg_cpu_b/cells/tffd.sv index a9344c4..9c52a98 100644 --- a/dmg_cpu_b/cells/tffd.sv +++ b/dmg_cpu_b/cells/tffd.sv @@ -27,6 +27,6 @@ module tffd #( load_negedge <= 0; end - assign #T_TFFD q = load ? d : ff; + assign q = load ? d : ff; endmodule diff --git a/dmg_cpu_b/dmg_cpu_b.sv b/dmg_cpu_b/dmg_cpu_b.sv index 6e09b11..1bf0446 100644 --- a/dmg_cpu_b/dmg_cpu_b.sv +++ b/dmg_cpu_b/dmg_cpu_b.sv @@ -114,7 +114,7 @@ module dmg_cpu_b( for (genvar i = 0; i < 8; i++) assign d_pin_drv[i] = bidir_out(d_d[i], d_a[i]); endgenerate - assign (pull1, highz0) d_pin = {8{!lula}}; + assign (pull1, weak0) d_pin = {8{!lula}}; assign d_pin = d_pin_drv; logic [7:0] md_pin_drv; /* Value driven internally onto the pins if not 'z */ @@ -122,7 +122,7 @@ module dmg_cpu_b( for (genvar i = 0; i < 8; i++) assign md_pin_drv[i] = bidir_out(md_out[i], md_a[i]); endgenerate - assign (pull1, highz0) md_pin = {8{!md_b}}; + assign (pull1, weak0) md_pin = {8{!md_b}}; assign md_pin = md_pin_drv; generate @@ -135,8 +135,8 @@ module dmg_cpu_b( assign sout = nsout; assign sin = bidir_out(sin_d, sin_a); assign sck = bidir_out(sck_d, sck_a); - assign (pull1, highz0) sin = !sin_b; - assign (pull1, highz0) sck = !sck_dir; + assign (pull1, weak0) sin = !sin_b; + assign (pull1, weak0) sck = !sck_dir; assign p10 = bidir_out(p10_d, p10_a); assign p11 = bidir_out(p11_d, p11_a); @@ -144,10 +144,10 @@ module dmg_cpu_b( assign p13 = bidir_out(p13_d, p13_a); assign p14 = bidir_out(p14_b, p14_a); assign p15 = bidir_out(p15_b, p15_a); - assign (pull1, highz0) p10 = !p10_b; - assign (pull1, highz0) p11 = !p11_b; - assign (pull1, highz0) p12 = !p12_b; - assign (pull1, highz0) p13 = !p13_b; + assign (pull1, weak0) p10 = !p10_b; + assign (pull1, weak0) p11 = !p11_b; + assign (pull1, weak0) p12 = !p12_b; + assign (pull1, weak0) p13 = !p13_b; assign cpg = !npin_cpg; assign cp = !ncp; @@ -433,6 +433,8 @@ module dmg_cpu_b( string bootrom_file; int f, _; + $display("DMG CPU B: Starting up..."); + bootrom_file = ""; _ = $value$plusargs("BOOTROM=%s", bootrom_file); diff --git a/dmg_cpu_b/pages/p10_apu_decode.sv b/dmg_cpu_b/pages/p10_apu_decode.sv index efa55c6..929b0c6 100644 --- a/dmg_cpu_b/pages/p10_apu_decode.sv +++ b/dmg_cpu_b/pages/p10_apu_decode.sv @@ -16,33 +16,33 @@ module apu_decode( ); logic amus, byko, akug, atoz, acat; - assign #T_NOR amus = !(a[7] || a[4] || a[3] || a[2] || a[1] || a[0]); - assign #T_AND anap = amus && ffxx; - assign #T_INV byko = !a[5]; - assign #T_INV akug = !a[6]; - assign #T_NAND atoz = !(byko && akug && cpu_wr && anap); - assign #T_AND acat = anap && cpu_rd && akug && byko; + assign amus = !(a[7] || a[4] || a[3] || a[2] || a[1] || a[0]); + assign anap = amus && ffxx; + assign byko = !a[5]; + assign akug = !a[6]; + assign atoz = !(byko && akug && cpu_wr && anap); + assign acat = anap && cpu_rd && akug && byko; assign ff00wr = atoz; assign ff00rd = acat; logic boxy, awet, bezy, avun, asad, acom, baro, atup, ateg, buno, banu, cona, doxy, bafu, bogy, tace, nff1x; logic ff2x, nff2x; - assign #T_INV boxy = !a[5]; - assign #T_OR awet = a[4] || boxy || a[6] || a[7]; - assign #T_OR bezy = awet || nffxx; - assign #T_INV avun = !a[7]; - assign #T_INV asad = !a[6]; - assign #T_NAND acom = !(avun && asad && a[5] && a[4]); - assign #T_NOR baro = !(acom || nffxx); - assign #T_INV atup = !a[4]; - assign #T_OR ateg = atup || a[5] || a[6] || a[7]; - assign #T_NOR buno = !(nffxx || ateg); - assign #T_INV banu = !buno; - assign #T_INV cona = !nff2x; - assign #T_AND doxy = cona && xxx6; - assign #T_INV bafu = !cpu_wr; - assign #T_INV bogy = !bafu; - assign #T_AND tace = nch1_amp_en && nch2_amp_en && nff1a_d7 && nch4_amp_en; + assign boxy = !a[5]; + assign awet = a[4] || boxy || a[6] || a[7]; + assign bezy = awet || nffxx; + assign avun = !a[7]; + assign asad = !a[6]; + assign acom = !(avun && asad && a[5] && a[4]); + assign baro = !(acom || nffxx); + assign atup = !a[4]; + assign ateg = atup || a[5] || a[6] || a[7]; + assign buno = !(nffxx || ateg); + assign banu = !buno; + assign cona = !nff2x; + assign doxy = cona && xxx6; + assign bafu = !cpu_wr; + assign bogy = !bafu; + assign tace = nch1_amp_en && nch2_amp_en && nff1a_d7 && nch4_amp_en; assign nff2x = bezy; assign ff3x = baro; assign nff1x = banu; @@ -55,55 +55,55 @@ module apu_decode( logic dupo, datu, daza, dura, duvu, dofa, damy, dufe, duno, dewa, dejy, dona, dafy, emos; logic ekag, esot, egen, exat, emax, etuf, gany, dyva, cafy, covy, cora, dutu, ekez, edaf; logic cuge, caxe, covo, doza, danu, dara, feny, duja, dugo, emor, dusa, deco, gefo, xxx6; - assign #T_INV dyte = !a[0]; - assign #T_INV doso = !dyte; - assign #T_INV afob = !a[1]; - assign #T_INV dupa = !afob; - assign #T_INV abub = !a[2]; - assign #T_INV deno = !abub; - assign #T_INV acol = !a[3]; - assign #T_INV duce = !acol; - assign #T_NAND dupo = !(acol && abub && afob && dyte); - assign #T_NAND datu = !(dyte && afob && deno && acol); - assign #T_NAND daza = !(acol && deno && dupa && dyte); - assign #T_NAND dura = !(doso && afob && deno && acol); - assign #T_NAND duvu = !(acol && deno && dupa && doso); - assign #T_AND dofa = acol && abub && dupa && dyte; - assign #T_NAND damy = !(acol && abub && dupa && dyte); - assign #T_NAND dufe = !(doso && dupa && abub && acol); - assign #T_NAND duno = !(acol && abub && afob && doso); - assign #T_NAND dewa = !(doso && afob && abub && acol); - assign #T_NAND dejy = !(duce && abub && afob && doso); - assign #T_NAND dona = !(dyte && afob && abub && acol); - assign #T_NAND dafy = !(duce && abub && afob && dyte); - assign #T_NAND emos = !(doso && afob && deno && duce); - assign #T_AND ekag = acol && deno && dupa && dyte; - assign #T_NAND esot = !(acol && deno && afob && dyte); - assign #T_NAND egen = !(dyte && dupa && deno && duce); - assign #T_NAND exat = !(duce && abub && dupa && dyte); - assign #T_NAND emax = !(doso && dupa && abub && duce); - assign #T_NAND etuf = !(acol && abub && dupa && doso); - assign #T_NAND gany = !(duce && deno && afob && dyte); - assign #T_NOR dyva = !(dupo || nff1x); - assign #T_NOR cafy = !(datu || nff2x); - assign #T_NOR covy = !(daza || nff1x); - assign #T_NOR cora = !(dura || nff2x); - assign #T_NOR dutu = !(duvu || nff1x); - assign #T_AND ekez = dofa && ff2x; - assign #T_NOR edaf = !(damy || nff1x); - assign #T_NOR cuge = !(dufe || nff2x); - assign #T_NOR caxe = !(duno || nff1x); - assign #T_NOR covo = !(dewa || nff2x); - assign #T_NOR doza = !(dejy || nff1x); - assign #T_NOR danu = !(dona || nff2x); - assign #T_NOR dara = !(dafy || nff1x); - assign #T_NOR feny = !(emos || nff1x); - assign #T_NOR duja = !(esot || nff1x); - assign #T_NOR dugo = !(egen || nff1x); - assign #T_NOR emor = !(exat || nff1x); - assign #T_NOR dusa = !(emax || nff1x); - assign #T_NOR deco = !(etuf || nff1x); - assign #T_NOR gefo = !(gany || nff1x); + assign dyte = !a[0]; + assign doso = !dyte; + assign afob = !a[1]; + assign dupa = !afob; + assign abub = !a[2]; + assign deno = !abub; + assign acol = !a[3]; + assign duce = !acol; + assign dupo = !(acol && abub && afob && dyte); + assign datu = !(dyte && afob && deno && acol); + assign daza = !(acol && deno && dupa && dyte); + assign dura = !(doso && afob && deno && acol); + assign duvu = !(acol && deno && dupa && doso); + assign dofa = acol && abub && dupa && dyte; + assign damy = !(acol && abub && dupa && dyte); + assign dufe = !(doso && dupa && abub && acol); + assign duno = !(acol && abub && afob && doso); + assign dewa = !(doso && afob && abub && acol); + assign dejy = !(duce && abub && afob && doso); + assign dona = !(dyte && afob && abub && acol); + assign dafy = !(duce && abub && afob && dyte); + assign emos = !(doso && afob && deno && duce); + assign ekag = acol && deno && dupa && dyte; + assign esot = !(acol && deno && afob && dyte); + assign egen = !(dyte && dupa && deno && duce); + assign exat = !(duce && abub && dupa && dyte); + assign emax = !(doso && dupa && abub && duce); + assign etuf = !(acol && abub && dupa && doso); + assign gany = !(duce && deno && afob && dyte); + assign dyva = !(dupo || nff1x); + assign cafy = !(datu || nff2x); + assign covy = !(daza || nff1x); + assign cora = !(dura || nff2x); + assign dutu = !(duvu || nff1x); + assign ekez = dofa && ff2x; + assign edaf = !(damy || nff1x); + assign cuge = !(dufe || nff2x); + assign caxe = !(duno || nff1x); + assign covo = !(dewa || nff2x); + assign doza = !(dejy || nff1x); + assign danu = !(dona || nff2x); + assign dara = !(dafy || nff1x); + assign feny = !(emos || nff1x); + assign duja = !(esot || nff1x); + assign dugo = !(egen || nff1x); + assign emor = !(exat || nff1x); + assign dusa = !(emax || nff1x); + assign deco = !(etuf || nff1x); + assign gefo = !(gany || nff1x); assign xxx6 = ekag; assign ff10 = dyva; assign ff24 = cafy; diff --git a/dmg_cpu_b/pages/p11_ch1_regs.sv b/dmg_cpu_b/pages/p11_ch1_regs.sv index d470f5c..c26a191 100644 --- a/dmg_cpu_b/pages/p11_ch1_regs.sv +++ b/dmg_cpu_b/pages/p11_ch1_regs.sv @@ -29,23 +29,23 @@ module ch1_regs( drlatch latch_jusa(hafu, hato, d[0], jusa); drlatch latch_juzy(hafu, hato, d[1], juzy); drlatch latch_joma(hafu, hato, d[2], joma); - assign #T_INV gago = !ff12; - assign #T_OR hocu = gago || ncpu_rd; - assign #T_AND gaxu = ff12 && apu_wr; - assign #T_INV kagy = !gaxu; - assign #T_INV hato = !apu_reset; - assign #T_INV haxe = !ff12; - assign #T_OR hamy = haxe || ncpu_rd; - assign #T_AND hafu = apu_wr && ff12; - assign #T_INV kygy = !hafu; - assign #T_TRI jyse = !hocu ? !(!jopu) : 'z; - assign #T_TRI heve = !hocu ? !(!jena) : 'z; - assign #T_TRI hewa = !hocu ? !(!jaxo) : 'z; - assign #T_TRI howu = !hocu ? !(!jaty) : 'z; - assign #T_TRI hono = !hocu ? !(!jafy) : 'z; - assign #T_TRI jyne = !hamy ? !(!jusa) : 'z; - assign #T_TRI jaca = !hamy ? !(!juzy) : 'z; - assign #T_TRI joku = !hamy ? !(!joma) : 'z; + assign gago = !ff12; + assign hocu = gago || ncpu_rd; + assign gaxu = ff12 && apu_wr; + assign kagy = !gaxu; + assign hato = !apu_reset; + assign haxe = !ff12; + assign hamy = haxe || ncpu_rd; + assign hafu = apu_wr && ff12; + assign kygy = !hafu; + assign jyse = !hocu ? !(!jopu) : 'z; + assign heve = !hocu ? !(!jena) : 'z; + assign hewa = !hocu ? !(!jaxo) : 'z; + assign howu = !hocu ? !(!jaty) : 'z; + assign hono = !hocu ? !(!jafy) : 'z; + assign jyne = !hamy ? !(!jusa) : 'z; + assign jaca = !hamy ? !(!juzy) : 'z; + assign joku = !hamy ? !(!joma) : 'z; assign ff12_d7 = jopu; assign ff12_d6 = jena; assign ff12_d5 = jaxo; @@ -69,11 +69,11 @@ module ch1_regs( logic buda, bale, bage, camy, boko, bytu; drlatch latch_boko(!bage, camy, d[6], boko); - assign #T_INV buda = !ncpu_rd; - assign #T_NAND bale = !(buda && ff14); - assign #T_NAND bage = !(anuj && ff14); - assign #T_INV camy = !apu_reset; - assign #T_TRI bytu = !bale ? !(!boko) : 'z; + assign buda = !ncpu_rd; + assign bale = !(buda && ff14); + assign bage = !(anuj && ff14); + assign camy = !apu_reset; + assign bytu = !bale ? !(!boko) : 'z; assign ff14_d6 = boko; assign nff14_d6 = !boko; assign d[6] = bytu; @@ -92,32 +92,32 @@ module ch1_regs( tffd tffd_emus(deru, dako, acc_d[8], emus); tffd tffd_evak(emus, dako, acc_d[9], evak); tffd tffd_copu(evak, dako, acc_d[10], copu); - assign #T_INV cege = !ncpu_rd; - assign #T_NAND daxa = !(cege && net03); - assign #T_INV caca = !ff13; - assign #T_NOR dypu = !(daxa || caca); - assign #T_INV evaj = !dypu; - assign #T_NOR epyk = !(ch1_restart || cope); - assign #T_INV fume = !epyk; - assign #T_NOR fulo = !(dyfa_1mhz || ngexu); - assign #T_INV geku = !fulo; - assign #T_INV dega = !epyk; - assign #T_INV kype = !(!kyna); - assign #T_INV cure = !ff14; - assign #T_OR dupy = cure || daxa; - assign #T_INV dako = !epyk; - assign #T_INV deru = !(!ekov); - assign #T_TRI foru = !evaj ? !(!gaxe) : 'z; - assign #T_TRI gefu = !evaj ? !(!hyfe) : 'z; - assign #T_TRI kyvu = !evaj ? !(!jyty) : 'z; - assign #T_TRI kumo = !evaj ? !(!kyna) : 'z; - assign #T_TRI kary = !evaj ? !(!jema) : 'z; - assign #T_TRI gode = !evaj ? !(!hyke) : 'z; - assign #T_TRI goje = !evaj ? !(!feva) : 'z; - assign #T_TRI foze = !evaj ? !(!ekov) : 'z; - assign #T_TRI dopa = !dupy ? !(!emus) : 'z; - assign #T_TRI demu = !dupy ? !(!evak) : 'z; - assign #T_TRI dexo = !dupy ? !(!copu) : 'z; + assign cege = !ncpu_rd; + assign daxa = !(cege && net03); + assign caca = !ff13; + assign dypu = !(daxa || caca); + assign evaj = !dypu; + assign epyk = !(ch1_restart || cope); + assign fume = !epyk; + assign fulo = !(dyfa_1mhz || ngexu); + assign geku = !fulo; + assign dega = !epyk; + assign kype = !(!kyna); + assign cure = !ff14; + assign dupy = cure || daxa; + assign dako = !epyk; + assign deru = !(!ekov); + assign foru = !evaj ? !(!gaxe) : 'z; + assign gefu = !evaj ? !(!hyfe) : 'z; + assign kyvu = !evaj ? !(!jyty) : 'z; + assign kumo = !evaj ? !(!kyna) : 'z; + assign kary = !evaj ? !(!jema) : 'z; + assign gode = !evaj ? !(!hyke) : 'z; + assign goje = !evaj ? !(!feva) : 'z; + assign foze = !evaj ? !(!ekov) : 'z; + assign dopa = !dupy ? !(!emus) : 'z; + assign demu = !dupy ? !(!evak) : 'z; + assign dexo = !dupy ? !(!copu) : 'z; assign d[0] = foru; assign d[1] = gefu; assign d[2] = kyvu; @@ -139,17 +139,17 @@ module ch1_regs( drlatch latch_arax(cenu, napu_reset, d[1], arax); drlatch latch_adek(cenu, napu_reset, d[4], adek); drlatch latch_bana(cenu, napu_reset, d[5], bana); - assign #T_AND cenu = apu_wr && ff10; - assign #T_INV buze = !ff10; - assign #T_NOR atyn = !(ncpu_rd || buze); - assign #T_INV asop = !atyn; - assign #T_TRI amyd = !asop ? !(!bany) : 'z; - assign #T_TRI azyp = !asop ? !(!anaz) : 'z; - assign #T_TRI awos = !asop ? !(!botu) : 'z; - assign #T_TRI afox = !asop ? !(!avaf) : 'z; - assign #T_TRI atax = !asop ? !(!arax) : 'z; - assign #T_TRI avek = !asop ? !(!adek) : 'z; - assign #T_TRI akux = !asop ? !(!bana) : 'z; + assign cenu = apu_wr && ff10; + assign buze = !ff10; + assign atyn = !(ncpu_rd || buze); + assign asop = !atyn; + assign amyd = !asop ? !(!bany) : 'z; + assign azyp = !asop ? !(!anaz) : 'z; + assign awos = !asop ? !(!botu) : 'z; + assign afox = !asop ? !(!avaf) : 'z; + assign atax = !asop ? !(!arax) : 'z; + assign avek = !asop ? !(!adek) : 'z; + assign akux = !asop ? !(!bana) : 'z; assign nff10_d0 = !bany; assign nff10_d2 = !anaz; assign nff10_d6 = !botu; @@ -168,12 +168,12 @@ module ch1_regs( logic buwa, bexu, covu, dafo, cena, dyca, bowo, cuda; drlatch latch_cena(covu, napu_reset6, d[6], cena); drlatch latch_dyca(covu, napu_reset6, d[7], dyca); - assign #T_INV buwa = !ncpu_rd; - assign #T_NAND bexu = !(buwa && ff11); - assign #T_AND covu = apu_wr && ff11; - assign #T_INV dafo = !covu; - assign #T_TRI bowo = !bexu ? !(!cena) : 'z; - assign #T_TRI cuda = !bexu ? !(!dyca) : 'z; + assign buwa = !ncpu_rd; + assign bexu = !(buwa && ff11); + assign covu = apu_wr && ff11; + assign dafo = !covu; + assign bowo = !bexu ? !(!cena) : 'z; + assign cuda = !bexu ? !(!dyca) : 'z; assign ff11_d6 = cena; assign nff11_d6 = !cena; assign ff11_d7 = dyca; diff --git a/dmg_cpu_b/pages/p12_ch1_sweep.sv b/dmg_cpu_b/pages/p12_ch1_sweep.sv index 224bcea..93c57aa 100644 --- a/dmg_cpu_b/pages/p12_ch1_sweep.sv +++ b/dmg_cpu_b/pages/p12_ch1_sweep.sv @@ -72,129 +72,129 @@ module ch1_sweep( dffr_a dffr_hele(adad, kyly, gopo, hele); dffr_a dffr_hopa(adad, kyly, gela, hopa); dffr_a dffr_hora(adad, kyly, gylo, hora); - assign #T_AND deby = apu_wr && ff14; - assign #T_NAND depu = !(apu_wr && ff13); - assign #T_INV dyla = !depu; - assign #T_INV aryl = !nff10_d3; - assign #T_NOR byle = !(aryl || coru_c); - assign #T_OR atys = byle || aryl; - assign #T_INV kedo = !ch1_ld_shift; - assign #T_INV juju = !ch1_ld_shift; - assign #T_INV kape = !ch1_ld_shift; - assign #T_INV cybe = !ejyb; - assign #T_INV becy = !cybe; - assign #T_INV faja = !ch1_shift_clk; - assign #T_INV ejyb = !faja; - assign #T_INV byfu = !d[2]; - assign #T_INV bofu = !d[1]; - assign #T_INV bysu = !d[0]; - assign #T_INV dulo = !d[7]; - assign #T_INV dylu = !d[6]; - assign #T_INV julo = !d[5]; - assign #T_INV kopu = !d[4]; - assign #T_INV etuv = !d[3]; - assign #T_INV fule = !d[2]; - assign #T_INV gulu = !d[1]; - assign #T_INV deke = !d[0]; - assign #T_NAND afeg = !(d[2] && deby); - assign #T_AND ajux = deby && byfu; - assign #T_NAND budo = !(d[1] && deby); - assign #T_AND amac = deby && bofu; - assign #T_NAND bugu = !(d[0] && deby); - assign #T_AND baso = deby && bysu; - assign #T_NAND etol = !(d[7] && dyla); - assign #T_AND emar = dyla && dulo; - assign #T_NAND eler = !(d[6] && dyla); - assign #T_AND etok = dyla && dylu; - assign #T_NAND kypa = !(d[5] && dyla); - assign #T_AND kyfu = dyla && julo; - assign #T_NAND kovu = !(d[4] && dyla); - assign #T_AND kavo = dyla && kopu; - assign #T_NAND gope = !(d[3] && dyla); - assign #T_AND fega = dyla && etuv; - assign #T_NAND golo = !(d[2] && dyla); - assign #T_AND foke = dyla && fule; - assign #T_NAND geta = !(d[1] && dyla); - assign #T_AND fopu = dyla && gulu; - assign #T_NAND gylu = !(d[0] && dyla); - assign #T_AND ejyf = dyla && deke; - assign #T_NOR apaj = !(ajux || apu_reset); - assign #T_NOR bovu = !(amac || apu_reset); - assign #T_NOR boxu = !(baso || apu_reset); - assign #T_NOR esel = !(emar || apu_reset); - assign #T_NOR eluf = !(etok || apu_reset); - assign #T_NOR kaju = !(kyfu || apu_reset); - assign #T_NOR kapo = !(kavo || apu_reset); - assign #T_NOR gamo = !(fega || apu_reset); - assign #T_NOR gyfu = !(foke || apu_reset); - assign #T_NOR gato = !(fopu || apu_reset); - assign #T_NOR efor = !(ejyf || apu_reset); - assign #T_ADD { coru_c, coru } = doly + deva + dule_c; - assign #T_ADD { dule_c, dule } = dofy + eter + dyxe_c; - assign #T_ADD { dyxe_c, dyxe } = dexe + defa + etek_c; - assign #T_ADD { etek_c, etek } = dele + edok + fego_c; - assign #T_ADD { fego_c, fego } = exap + epyr + geva_c; - assign #T_ADD { geva_c, geva } = faxo + gele + hexo_c; - assign #T_ADD { hexo_c, hexo } = gyme + jete + jory_c; - assign #T_ADD { jory_c, jory } = jyme + jape + jule_c; - assign #T_ADD { jule_c, jule } = kare + hele + halu_c; - assign #T_ADD { halu_c, halu } = jode + hopa + guxa_c; - assign #T_ADD { guxa_c, guxa } = galo + hora + aryl; - assign #T_INV bojo = !axan; - assign #T_INV apat = !evab; - assign #T_INV byru = !dygy; - assign #T_INV cyky = !hopo; - assign #T_INV debo = !hyxu; - assign #T_INV fohy = !holu; - assign #T_INV kovo = !fely; - assign #T_INV keke = !edul; - assign #T_INV huny = !havo; - assign #T_INV hoxe = !jyka; - assign #T_INV juta = !hyka; - assign #T_AND afyr = kedo && bojo; - assign #T_NAND beju = !(axan && kedo); - assign #T_AND buvo = kedo && apat; - assign #T_NAND beso = !(evab && kedo); - assign #T_AND afug = kedo && byru; - assign #T_NAND bege = !(dygy && kedo); - assign #T_AND bapu = kedo && cyky; - assign #T_NAND dace = !(hopo && kedo); - assign #T_AND ereg = juju && debo; - assign #T_NAND ekem = !(hyxu && juju); - assign #T_AND evof = juju && fohy; - assign #T_NAND govo = !(holu && juju); - assign #T_AND kevy = juju && kovo; - assign #T_NAND kola = !(fely && juju); - assign #T_AND kaxy = juju && keke; - assign #T_NAND kyry = !(edul && juju); - assign #T_AND jehy = kape && huny; - assign #T_NAND hawy = !(havo && kape); - assign #T_AND jocy = kape && hoxe; - assign #T_NAND hola = !(jyka && kape); - assign #T_AND koko = kape && juta; - assign #T_NAND hozu = !(hyka && kape); - assign #T_NOR avuf = !(apu_reset || afyr); - assign #T_NOR afux = !(apu_reset || buvo); - assign #T_NOR agor = !(apu_reset || afug); - assign #T_NOR bewo = !(apu_reset || bapu); - assign #T_NOR enok = !(apu_reset || ereg); - assign #T_NOR ezuk = !(apu_reset || evof); - assign #T_NOR kybo = !(apu_reset || kevy); - assign #T_NOR keto = !(apu_reset || kaxy); - assign #T_NOR hyvu = !(apu_reset || jehy); - assign #T_NOR hobu = !(apu_reset || jocy); - assign #T_NOR jado = !(apu_reset || koko); - assign #T_XOR culu = aryl != beku; - assign #T_XOR dozy = aryl != agez; - assign #T_XOR cale = aryl != elux; - assign #T_XOR dyme = aryl != exac; - assign #T_XOR fure = aryl != fedo; - assign #T_XOR goly = aryl != fude; - assign #T_XOR kefe = aryl != jota; - assign #T_XOR hefy = aryl != jolu; - assign #T_XOR gopo = aryl != goga; - assign #T_XOR gela = aryl != jefa; - assign #T_XOR gylo = aryl != fabu; + assign deby = apu_wr && ff14; + assign depu = !(apu_wr && ff13); + assign dyla = !depu; + assign aryl = !nff10_d3; + assign byle = !(aryl || coru_c); + assign atys = byle || aryl; + assign kedo = !ch1_ld_shift; + assign juju = !ch1_ld_shift; + assign kape = !ch1_ld_shift; + assign cybe = !ejyb; + assign becy = !cybe; + assign faja = !ch1_shift_clk; + assign ejyb = !faja; + assign byfu = !d[2]; + assign bofu = !d[1]; + assign bysu = !d[0]; + assign dulo = !d[7]; + assign dylu = !d[6]; + assign julo = !d[5]; + assign kopu = !d[4]; + assign etuv = !d[3]; + assign fule = !d[2]; + assign gulu = !d[1]; + assign deke = !d[0]; + assign afeg = !(d[2] && deby); + assign ajux = deby && byfu; + assign budo = !(d[1] && deby); + assign amac = deby && bofu; + assign bugu = !(d[0] && deby); + assign baso = deby && bysu; + assign etol = !(d[7] && dyla); + assign emar = dyla && dulo; + assign eler = !(d[6] && dyla); + assign etok = dyla && dylu; + assign kypa = !(d[5] && dyla); + assign kyfu = dyla && julo; + assign kovu = !(d[4] && dyla); + assign kavo = dyla && kopu; + assign gope = !(d[3] && dyla); + assign fega = dyla && etuv; + assign golo = !(d[2] && dyla); + assign foke = dyla && fule; + assign geta = !(d[1] && dyla); + assign fopu = dyla && gulu; + assign gylu = !(d[0] && dyla); + assign ejyf = dyla && deke; + assign apaj = !(ajux || apu_reset); + assign bovu = !(amac || apu_reset); + assign boxu = !(baso || apu_reset); + assign esel = !(emar || apu_reset); + assign eluf = !(etok || apu_reset); + assign kaju = !(kyfu || apu_reset); + assign kapo = !(kavo || apu_reset); + assign gamo = !(fega || apu_reset); + assign gyfu = !(foke || apu_reset); + assign gato = !(fopu || apu_reset); + assign efor = !(ejyf || apu_reset); + assign { coru_c, coru } = doly + deva + dule_c; + assign { dule_c, dule } = dofy + eter + dyxe_c; + assign { dyxe_c, dyxe } = dexe + defa + etek_c; + assign { etek_c, etek } = dele + edok + fego_c; + assign { fego_c, fego } = exap + epyr + geva_c; + assign { geva_c, geva } = faxo + gele + hexo_c; + assign { hexo_c, hexo } = gyme + jete + jory_c; + assign { jory_c, jory } = jyme + jape + jule_c; + assign { jule_c, jule } = kare + hele + halu_c; + assign { halu_c, halu } = jode + hopa + guxa_c; + assign { guxa_c, guxa } = galo + hora + aryl; + assign bojo = !axan; + assign apat = !evab; + assign byru = !dygy; + assign cyky = !hopo; + assign debo = !hyxu; + assign fohy = !holu; + assign kovo = !fely; + assign keke = !edul; + assign huny = !havo; + assign hoxe = !jyka; + assign juta = !hyka; + assign afyr = kedo && bojo; + assign beju = !(axan && kedo); + assign buvo = kedo && apat; + assign beso = !(evab && kedo); + assign afug = kedo && byru; + assign bege = !(dygy && kedo); + assign bapu = kedo && cyky; + assign dace = !(hopo && kedo); + assign ereg = juju && debo; + assign ekem = !(hyxu && juju); + assign evof = juju && fohy; + assign govo = !(holu && juju); + assign kevy = juju && kovo; + assign kola = !(fely && juju); + assign kaxy = juju && keke; + assign kyry = !(edul && juju); + assign jehy = kape && huny; + assign hawy = !(havo && kape); + assign jocy = kape && hoxe; + assign hola = !(jyka && kape); + assign koko = kape && juta; + assign hozu = !(hyka && kape); + assign avuf = !(apu_reset || afyr); + assign afux = !(apu_reset || buvo); + assign agor = !(apu_reset || afug); + assign bewo = !(apu_reset || bapu); + assign enok = !(apu_reset || ereg); + assign ezuk = !(apu_reset || evof); + assign kybo = !(apu_reset || kevy); + assign keto = !(apu_reset || kaxy); + assign hyvu = !(apu_reset || jehy); + assign hobu = !(apu_reset || jocy); + assign jado = !(apu_reset || koko); + assign culu = aryl != beku; + assign dozy = aryl != agez; + assign cale = aryl != elux; + assign dyme = aryl != exac; + assign fure = aryl != fedo; + assign goly = aryl != fude; + assign kefe = aryl != jota; + assign hefy = aryl != jolu; + assign gopo = aryl != goga; + assign gela = aryl != jefa; + assign gylo = aryl != fabu; assign acc_d[10] = axan; assign acc_d[9] = evab; assign acc_d[8] = dygy; diff --git a/dmg_cpu_b/pages/p13_channel1.sv b/dmg_cpu_b/pages/p13_channel1.sv index 6f8e836..6754789 100644 --- a/dmg_cpu_b/pages/p13_channel1.sv +++ b/dmg_cpu_b/pages/p13_channel1.sv @@ -28,40 +28,40 @@ module channel1( tffd tffd_cura(cuso, bepe, d[4], cura); tffd tffd_eram(cura, bepe, d[5], eram); nand_srlatch latch_gexu(gepu, femy, gexu, ngexu); - assign #T_NAND boro = !(apu_wr && ff11); - assign #T_INV boka = !boro; - assign #T_NOR cory = !(ch1_restart || apu_reset || boka); - assign #T_NOR capy = !(nff14_d6 || bufy_256hz || cero); - assign #T_AND cyfa = cero && ff14_d6; - assign #T_NOR hoca = !(ff12_d3 || ff12_d4 || ff12_d5 || ff12_d6 || ff12_d7); - assign #T_INV bone = !atys; - assign #T_OR bery = bone || apu_reset || cyfa || hoca; - assign #T_NOR femy = !(apu_reset || hoca); - assign #T_INV gepu = !fyte; - assign #T_INV bugy = !boro; - assign #T_INV canu = !capy; - assign #T_INV bepe = !boro; - assign #T_INV cuso = !(!cuno); + assign boro = !(apu_wr && ff11); + assign boka = !boro; + assign cory = !(ch1_restart || apu_reset || boka); + assign capy = !(nff14_d6 || bufy_256hz || cero); + assign cyfa = cero && ff14_d6; + assign hoca = !(ff12_d3 || ff12_d4 || ff12_d5 || ff12_d6 || ff12_d7); + assign bone = !atys; + assign bery = bone || apu_reset || cyfa || hoca; + assign femy = !(apu_reset || hoca); + assign gepu = !fyte; + assign bugy = !boro; + assign canu = !capy; + assign bepe = !boro; + assign cuso = !(!cuno); assign nch1_amp_en = hoca; logic cala, comy, cyte, dyru, doka; dffr_bp dffr_comy(cala, dyru, !comy, comy); - assign #T_INV cala = !copu; - assign #T_INV cyte = !comy; - assign #T_INV cope = !cyte; - assign #T_NOR dyru = !(apu_reset || ch1_restart || doka); - assign #T_AND doka = comy && dyfa_1mhz; + assign cala = !copu; + assign cyte = !comy; + assign cope = !cyte; + assign dyru = !(apu_reset || ch1_restart || doka); + assign doka = comy && dyfa_1mhz; logic dafa, cymu, bave, caxy, cypu, cupo, bury, coze, bexa; dffr_bp dffr_bexa(ajer_2mhz, bury, coze, bexa); tffd tffd_caxy(cypu, cymu, nff10_d6, caxy); tffd tffd_cypu(cupo, cymu, nff10_d5, cypu); tffd tffd_cupo(cate, cymu, nff10_d4, cupo); - assign #T_NOR dafa = !(bexa || ch1_restart); - assign #T_INV cymu = !dafa; - assign #T_AND bave = nff10_d6 && nff10_d5 && nff10_d4; - assign #T_NOR bury = !(bave || apu_reset); - assign #T_AND coze = caxy && cypu && cupo; + assign dafa = !(bexa || ch1_restart); + assign cymu = !dafa; + assign bave = nff10_d6 && nff10_d5 && nff10_d4; + assign bury = !(bave || apu_reset); + assign coze = caxy && cypu && cupo; logic jone, kado, kaly, kere, jola, jova, kenu, kera, kote, kury, kuku, koro, kozy, kaza, kuxu, koma, kake; logic erum, fare, fyte, eget, doge, dado, dupe, duka, ezec, gefe, fyfo, nfyfo, feku, keko, kaba; @@ -87,43 +87,43 @@ module channel1( nor_srlatch latch_cyto(ch1_restart, bery, cyto,); nor_srlatch latch_fyfo(gefe, ezec, fyfo, nfyfo); nor_srlatch latch_kezu(kyno, keko, kezu,); - assign #T_INV jone = !byfe_128hz; - assign #T_INV kado = !apu_reset; - assign #T_INV kere = !kaly; - assign #T_INV jola = !kere; - assign #T_AND kote = kera && kenu && jova; - assign #T_INV kury = !kozy; - assign #T_NOR kuku = !(horu_512hz || kury); - assign #T_NOR koro = !(kuku || koma || ch1_restart || apu_reset); - assign #T_NOR kaza = !(ch1_restart || kozy); - assign #T_INV kuxu = !kaza; - assign #T_NOR koma = !(ff12_d0 || ff12_d1 || ff12_d2); - assign #T_OR kake = kozy || koma || kezu; - assign #T_INV erum = !apu_reset; - assign #T_NOR eget = !(apu_reset || fare); - assign #T_NAND doge = !(apu_wr && ff14); - assign #T_NOR dado = !(apu_reset || ezec); - assign #T_INV duka = !apu_reset; - assign #T_INV gefe = !eget; - assign #T_OR keko = apu_reset || feku; - assign #T_OR kaba = apu_reset || feku; - assign #T_INV kyly = !kaba; - assign #T_NAND hufu = !(ff12_d3 && hafo && hemy && hoko && hevo); - assign #T_NOR hano = !(ff12_d3 || hafo || hemy || hoko || hevo); - assign #T_INV hake = !hufu; - assign #T_NOR koru = !(ch1_restart || apu_reset); - assign #T_OR jade = hake || hano; - assign #T_INV cara = !cyto; - assign #T_AND cowe = cyto && duwo; - assign #T_OR boto = cowe || net03; - assign #T_AO hesu = (ff12_d3 && hoko) || (!hoko && nff12_d3); - assign #T_AO heto = (ff12_d3 && hemy) || (!hemy && nff12_d3); - assign #T_AO hyto = (ff12_d3 && hafo) || (!hafo && nff12_d3); - assign #T_AO jufy = (ff12_d3 && kake) || (kake && nff12_d3); - assign #T_AND aceg = hevo && boto; - assign #T_AND agof = hoko && boto; - assign #T_AND ason = hemy && boto; - assign #T_AND amop = hafo && boto; + assign jone = !byfe_128hz; + assign kado = !apu_reset; + assign kere = !kaly; + assign jola = !kere; + assign kote = kera && kenu && jova; + assign kury = !kozy; + assign kuku = !(horu_512hz || kury); + assign koro = !(kuku || koma || ch1_restart || apu_reset); + assign kaza = !(ch1_restart || kozy); + assign kuxu = !kaza; + assign koma = !(ff12_d0 || ff12_d1 || ff12_d2); + assign kake = kozy || koma || kezu; + assign erum = !apu_reset; + assign eget = !(apu_reset || fare); + assign doge = !(apu_wr && ff14); + assign dado = !(apu_reset || ezec); + assign duka = !apu_reset; + assign gefe = !eget; + assign keko = apu_reset || feku; + assign kaba = apu_reset || feku; + assign kyly = !kaba; + assign hufu = !(ff12_d3 && hafo && hemy && hoko && hevo); + assign hano = !(ff12_d3 || hafo || hemy || hoko || hevo); + assign hake = !hufu; + assign koru = !(ch1_restart || apu_reset); + assign jade = hake || hano; + assign cara = !cyto; + assign cowe = cyto && duwo; + assign boto = cowe || net03; + assign hesu = (ff12_d3 && hoko) || (!hoko && nff12_d3); + assign heto = (ff12_d3 && hemy) || (!hemy && nff12_d3); + assign hyto = (ff12_d3 && hafo) || (!hafo && nff12_d3); + assign jufy = (ff12_d3 && kake) || (kake && nff12_d3); + assign aceg = hevo && boto; + assign agof = hoko && boto; + assign ason = hemy && boto; + assign amop = hafo && boto; assign ch1_restart = feku; assign nch1_active = cara; assign ch1_out[3] = aceg; @@ -138,19 +138,19 @@ module channel1( tffd tffd_caja(copa, cylu, nff10_d1, caja); tffd tffd_byra(caja, cylu, nff10_d2, byra); nand_srlatch latch_femu(evol, epuk, femu, nfemu); - assign #T_NOR dacu = !(ch1_restart || bexa); - assign #T_INV cylu = !dacu; - assign #T_NAND buge = !(nff10_d2 && nff10_d1 && nff10_d0); - assign #T_AND copy = copa && caja && byra; - assign #T_NOR atat = !(bexa || apu_reset); - assign #T_INV adad = !(!BYTE); - assign #T_NOR epuk = !(apu_reset || adad); - assign #T_NOR evol = !(bexa || fyte); - assign #T_NOR egyp = !(nfemu || dyfa_1mhz); - assign #T_INV cele = !nno_sweep; - assign #T_NOR dody = !(cele || egyp); - assign #T_INV egor = !dody; - assign #T_INV dapu = !egor; + assign dacu = !(ch1_restart || bexa); + assign cylu = !dacu; + assign buge = !(nff10_d2 && nff10_d1 && nff10_d0); + assign copy = copa && caja && byra; + assign atat = !(bexa || apu_reset); + assign adad = !(!BYTE); + assign epuk = !(apu_reset || adad); + assign evol = !(bexa || fyte); + assign egyp = !(nfemu || dyfa_1mhz); + assign cele = !nno_sweep; + assign dody = !(cele || egyp); + assign egor = !dody; + assign dapu = !egor; assign nno_sweep = buge; assign ch1_shift_clk = egor; @@ -159,23 +159,23 @@ module channel1( dffr_bp dffr_esut(dajo, napu_reset6, !esut, esut); dffr_b dffr_eros(!esut, napu_reset6, !eros, eros); dffr_b dffr_dape(!eros, napu_reset6, !dape, dape); - assign #T_INV dajo = !cope; - assign #T_INV duvo = !esut; - assign #T_AND ezoz = dape && eros; - assign #T_AND enek = ezoz && duvo; - assign #T_INV codo = !ezoz; - assign #T_NOR coso = !(ff11_d6 || ff11_d7); - assign #T_NOR cava = !(nff11_d6 || ff11_d7); - assign #T_NOR cevu = !(ff11_d6 || nff11_d7); - assign #T_NOR caxo = !(nff11_d6 || nff11_d7); - assign #T_AO duna = (enek && coso) || (ezoz && cava) || (dape && cevu) || (codo && caxo); + assign dajo = !cope; + assign duvo = !esut; + assign ezoz = dape && eros; + assign enek = ezoz && duvo; + assign codo = !ezoz; + assign coso = !(ff11_d6 || ff11_d7); + assign cava = !(nff11_d6 || ff11_d7); + assign cevu = !(ff11_d6 || nff11_d7); + assign caxo = !(nff11_d6 || nff11_d7); + assign duna = (enek && coso) || (ezoz && cava) || (dape && cevu) || (codo && caxo); assign ch1_bit = duna; logic atuv, boje, buso, kala; - assign #T_AND atuv = bexa && atys; - assign #T_AND boje = atuv && nno_sweep; - assign #T_AND buso = nno_sweep && atys && bexa; - assign #T_NOR kala = !(bexa || ch1_restart); + assign atuv = bexa && atys; + assign boje = atuv && nno_sweep; + assign buso = nno_sweep && atys && bexa; + assign kala = !(bexa || ch1_restart); assign ch1_freq_upd2 = boje; assign ch1_freq_upd1 = buso; assign ch1_ld_shift = kala; diff --git a/dmg_cpu_b/pages/p14_ch2_regs.sv b/dmg_cpu_b/pages/p14_ch2_regs.sv index 28dfe59..6b4272d 100644 --- a/dmg_cpu_b/pages/p14_ch2_regs.sv +++ b/dmg_cpu_b/pages/p14_ch2_regs.sv @@ -19,15 +19,15 @@ module ch2_regs( logic agyn, asyp, bygo, coro, bacu, budu, bamy, bera, ceka, cecy; drlatch latch_bamy(bacu, napu_reset2, d[7], bamy); drlatch latch_bera(bacu, napu_reset2, d[6], bera); - assign #T_NAND agyn = !(apu_wr && ff16); - assign #T_INV asyp = !agyn; - assign #T_NOR beny = !(asyp || apu_reset || elox_q); - assign #T_INV bygo = !ncpu_rd; - assign #T_NAND coro = !(ff16 && bygo); - assign #T_AND bacu = ff16 && apu_wr; - assign #T_INV budu = !bacu; - assign #T_TRI ceka = !coro ? !(!bamy) : 'z; - assign #T_TRI cecy = !coro ? !(!bera) : 'z; + assign agyn = !(apu_wr && ff16); + assign asyp = !agyn; + assign beny = !(asyp || apu_reset || elox_q); + assign bygo = !ncpu_rd; + assign coro = !(ff16 && bygo); + assign bacu = ff16 && apu_wr; + assign budu = !bacu; + assign ceka = !coro ? !(!bamy) : 'z; + assign cecy = !coro ? !(!bera) : 'z; assign nff16_wr = agyn; assign ff16_d7 = bamy; assign nff16_d7 = !bamy; @@ -41,9 +41,9 @@ module ch2_regs( drlatch latch_jupy(jenu, kypu, d[2], jupy); drlatch latch_jany(jenu, kypu, d[1], jany); drlatch latch_jefu(jenu, kypu, d[0], jefu); - assign #T_INV kypu = !apu_reset; - assign #T_AND jenu = ff19 && apu_wr; - assign #T_INV kysa = !jenu; + assign kypu = !apu_reset; + assign jenu = ff19 && apu_wr; + assign kysa = !jenu; assign ff19_d2 = jupy; assign ff19_d1 = jany; assign ff19_d0 = jefu; @@ -59,22 +59,22 @@ module ch2_regs( drlatch latch_hava(gere, jybu, d[2], hava); drlatch latch_hore(gere, jybu, d[1], hore); drlatch latch_hyfu(gere, jybu, d[0], hyfu); - assign #T_AND enuf = ff17 && apu_wr; - assign #T_INV jybu = !apu_reset; - assign #T_INV fyry = !ff17; - assign #T_OR guru = fyry || ncpu_rd; - assign #T_INV gure = !ff17; - assign #T_OR gexa = gure || ncpu_rd; - assign #T_AND gere = apu_wr && ff17; - assign #T_INV jede = !gere; - assign #T_TRI hupe = !guru ? !(!gata) : 'z; - assign #T_TRI gene = !guru ? !(!fore) : 'z; - assign #T_TRI hyry = !guru ? !(!gage) : 'z; - assign #T_TRI horo = !guru ? !(!gura) : 'z; - assign #T_TRI here = !guru ? !(!gufe) : 'z; - assign #T_TRI havu = !gexa ? !(!hava) : 'z; - assign #T_TRI hyre = !gexa ? !(!hore) : 'z; - assign #T_TRI huvu = !gexa ? !(!hyfu) : 'z; + assign enuf = ff17 && apu_wr; + assign jybu = !apu_reset; + assign fyry = !ff17; + assign guru = fyry || ncpu_rd; + assign gure = !ff17; + assign gexa = gure || ncpu_rd; + assign gere = apu_wr && ff17; + assign jede = !gere; + assign hupe = !guru ? !(!gata) : 'z; + assign gene = !guru ? !(!fore) : 'z; + assign hyry = !guru ? !(!gage) : 'z; + assign horo = !guru ? !(!gura) : 'z; + assign here = !guru ? !(!gufe) : 'z; + assign havu = !gexa ? !(!hava) : 'z; + assign hyre = !gexa ? !(!hore) : 'z; + assign huvu = !gexa ? !(!hyfu) : 'z; assign ff17_d4 = gata; assign ff17_d3 = fore; assign nff17_d3 = !fore; @@ -122,32 +122,32 @@ module ch2_regs( tffd tffd_hero(hepu, gypa, ff19_d2, hero); tffd tffd_hepu(hevy, gypa, ff19_d1, hepu); tffd tffd_hevy(gala, gypa, ff19_d0, hevy); - assign #T_AND dosa = ff18 && apu_wr; - assign #T_AND exuc = ff18 && apu_wr; - assign #T_INV hude = !apu_reset; - assign #T_INV esur = !dosa; - assign #T_INV fyxo = !exuc; - assign #T_INV fery = !ff18; - assign #T_NOR guza = !(fery || fape); - assign #T_INV futy = !guza; - assign #T_INV edep = !(!cyvo); - assign #T_TRI fava = !futy ? !(!done) : 'z; - assign #T_TRI fajy = !futy ? !(!dynu) : 'z; - assign #T_TRI fegu = !futy ? !(!ezof) : 'z; - assign #T_TRI fose = !futy ? !(!cyvo) : 'z; - assign #T_TRI gero = !futy ? !(!fuxo) : 'z; - assign #T_TRI gaky = !futy ? !(!gano) : 'z; - assign #T_TRI gadu = !futy ? !(!goca) : 'z; - assign #T_TRI gazo = !futy ? !(!gane) : 'z; - assign #T_INV foge = !ncpu_rd; - assign #T_NAND fape = !(foge && net03); - assign #T_NAND deta = !(apu_wr && ff19); - assign #T_INV gote = !ff19; - assign #T_OR hypo = gote || fape; - assign #T_INV gala = !gane_nq; - assign #T_TRI jeke = !hypo ? !(!hero) : 'z; - assign #T_TRI jaro = !hypo ? !(!hepu) : 'z; - assign #T_TRI huna = !hypo ? !(!hevy) : 'z; + assign dosa = ff18 && apu_wr; + assign exuc = ff18 && apu_wr; + assign hude = !apu_reset; + assign esur = !dosa; + assign fyxo = !exuc; + assign fery = !ff18; + assign guza = !(fery || fape); + assign futy = !guza; + assign edep = !(!cyvo); + assign fava = !futy ? !(!done) : 'z; + assign fajy = !futy ? !(!dynu) : 'z; + assign fegu = !futy ? !(!ezof) : 'z; + assign fose = !futy ? !(!cyvo) : 'z; + assign gero = !futy ? !(!fuxo) : 'z; + assign gaky = !futy ? !(!gano) : 'z; + assign gadu = !futy ? !(!goca) : 'z; + assign gazo = !futy ? !(!gane) : 'z; + assign foge = !ncpu_rd; + assign fape = !(foge && net03); + assign deta = !(apu_wr && ff19); + assign gote = !ff19; + assign hypo = gote || fape; + assign gala = !gane_nq; + assign jeke = !hypo ? !(!hero) : 'z; + assign jaro = !hypo ? !(!hepu) : 'z; + assign huna = !hypo ? !(!hevy) : 'z; assign gane_nq = !gane; assign d = { gazo, gadu, gaky, gero, fose, fegu, fajy, fava }; assign ff19_d7 = etap; @@ -158,11 +158,11 @@ module ch2_regs( logic gado, huma, evyf, fazo, emer, gojy; drlatch latch_emer(!evyf, fazo, d[6], emer); - assign #T_INV gado = !ncpu_rd; - assign #T_NAND huma = !(ff19 && gado); - assign #T_NAND evyf = !(anuj && ff19); - assign #T_INV fazo = !apu_reset; - assign #T_TRI gojy = !huma ? !(!emer) : 'z; + assign gado = !ncpu_rd; + assign huma = !(ff19 && gado); + assign evyf = !(anuj && ff19); + assign fazo = !apu_reset; + assign gojy = !huma ? !(!emer) : 'z; assign ff19_d6 = emer; assign nff19_d6 = !emer; assign d[6] = gojy; diff --git a/dmg_cpu_b/pages/p15_channel2.sv b/dmg_cpu_b/pages/p15_channel2.sv index 2ebd1f2..e55f4e6 100644 --- a/dmg_cpu_b/pages/p15_channel2.sv +++ b/dmg_cpu_b/pages/p15_channel2.sv @@ -61,75 +61,75 @@ module channel2( nor_srlatch latch_dala(celo, dope, dala, ndala); nor_srlatch latch_dane(elox, esyk, dane,); nor_srlatch latch_jeme(hepo, hyle, jeme,); - assign #T_INV hota = !byfe_128hz; - assign #T_INV katy = !apu_reset; - assign #T_INV kylo = !jyna; - assign #T_INV kene = !kylo; - assign #T_AND kyvo = jevy && jona && jore; - assign #T_INV galu = !ch2_ftick; - assign #T_INV etuk = !gyko; - assign #T_INV davu = !etuk; - assign #T_AND fujy = gyko && cemo_1mhz; - assign #T_NOR gyre = !(apu_reset || elox || fujy); - assign #T_NOR duju = !(davu || elox); - assign #T_INV cogu = !duju; - assign #T_INV erog = !duju; - assign #T_INV gypa = !duju; - assign #T_INV cywu = !apu_reset; - assign #T_NOR dera = !(apu_reset || dope); - assign #T_NOR hyly = !(elox || jopa); - assign #T_NOR hypa = !(elox || apu_reset); - assign #T_OR hyle = apu_reset || elox; - assign #T_INV jake = !hyly; - assign #T_INV cexe = !apu_reset; - assign #T_NOR doxa = !(apu_reset || dory); - assign #T_INV celo = !doxa; - assign #T_INV gade = !jopa; - assign #T_NOR holy = !(horu_512hz || gade); - assign #T_NOR jupu = !(ff17_d0 || ff17_d1 || ff17_d2); - assign #T_OR hofo = jopa || jupu || jeme; - assign #T_NOR hafe = !(holy || jupu || elox_q || apu_reset); - assign #T_INV buwe = !apu_reset; - assign #T_INV azeg = !amuk_4mhz; - assign #T_INV byho = !apu_reset; - assign #T_INV bufo = !atep; - assign #T_INV bodo = !caza; - assign #T_NOR cama = !(cemo || nbuta); - assign #T_INV doca = !cama; - assign #T_AO fopy = (fomy && ff17_d3) || (!fomy && nff17_d3); - assign #T_AO etup = (fete && ff17_d3) || (!fete && nff17_d3); - assign #T_AO faru = (feno && ff17_d3) || (!feno && nff17_d3); - assign #T_AO gafa = (hofo && ff17_d3) || (hofo && nff17_d3); - assign #T_AND cyse = dane && dome; - assign #T_OR bonu = cyse || net03; - assign #T_NOR emyr = !(ff17_d3 || feno || fete || fomy || fena); - assign #T_NAND erat = !(ff17_d3 && feno && fete && fomy && fena); - assign #T_INV fyre = !erat; - assign #T_OR gufy = emyr || fyre; - assign #T_AND amov = fena && bonu; - assign #T_AND asog = fomy && bonu; - assign #T_AND anyv = fete && bonu; - assign #T_AND anan = feno && bonu; - assign #T_NOR deme = !(cyre || bufy_256hz || nff19_d6); - assign #T_AND dora = cyre && ff19_d6; - assign #T_NOR fute = !(ff17_d3 || ff17_d4 || ff17_d5 || ff17_d6 || ff17_d7); - assign #T_INV dyro = !deme; - assign #T_OR esyk = apu_reset || dora || fute; - assign #T_NOR ares = !(fute || apu_reset); - assign #T_INV defu = !dane; - assign #T_INV bymo = !nff16_wr; - assign #T_INV aget = !nff16_wr; - assign #T_INV buko = !(!came); - assign #T_INV cule = !davu; - assign #T_AND dymu = dyve && cagy; - assign #T_INV duge = !cano; - assign #T_INV dare = !dymu; - assign #T_AND egog = dymu && duge; - assign #T_NOR domo = !(ff16_d6 || ff16_d7); - assign #T_NOR dyta = !(nff16_d6 || ff16_d7); - assign #T_NOR doju = !(ff16_d6 || nff16_d7); - assign #T_NOR dove = !(nff16_d6 || nff16_d7); - assign #T_AO exes = (egog && domo) || (dymu && dyta) || (dyve && doju) || (dare && dove); + assign hota = !byfe_128hz; + assign katy = !apu_reset; + assign kylo = !jyna; + assign kene = !kylo; + assign kyvo = jevy && jona && jore; + assign galu = !ch2_ftick; + assign etuk = !gyko; + assign davu = !etuk; + assign fujy = gyko && cemo_1mhz; + assign gyre = !(apu_reset || elox || fujy); + assign duju = !(davu || elox); + assign cogu = !duju; + assign erog = !duju; + assign gypa = !duju; + assign cywu = !apu_reset; + assign dera = !(apu_reset || dope); + assign hyly = !(elox || jopa); + assign hypa = !(elox || apu_reset); + assign hyle = apu_reset || elox; + assign jake = !hyly; + assign cexe = !apu_reset; + assign doxa = !(apu_reset || dory); + assign celo = !doxa; + assign gade = !jopa; + assign holy = !(horu_512hz || gade); + assign jupu = !(ff17_d0 || ff17_d1 || ff17_d2); + assign hofo = jopa || jupu || jeme; + assign hafe = !(holy || jupu || elox_q || apu_reset); + assign buwe = !apu_reset; + assign azeg = !amuk_4mhz; + assign byho = !apu_reset; + assign bufo = !atep; + assign bodo = !caza; + assign cama = !(cemo || nbuta); + assign doca = !cama; + assign fopy = (fomy && ff17_d3) || (!fomy && nff17_d3); + assign etup = (fete && ff17_d3) || (!fete && nff17_d3); + assign faru = (feno && ff17_d3) || (!feno && nff17_d3); + assign gafa = (hofo && ff17_d3) || (hofo && nff17_d3); + assign cyse = dane && dome; + assign bonu = cyse || net03; + assign emyr = !(ff17_d3 || feno || fete || fomy || fena); + assign erat = !(ff17_d3 && feno && fete && fomy && fena); + assign fyre = !erat; + assign gufy = emyr || fyre; + assign amov = fena && bonu; + assign asog = fomy && bonu; + assign anyv = fete && bonu; + assign anan = feno && bonu; + assign deme = !(cyre || bufy_256hz || nff19_d6); + assign dora = cyre && ff19_d6; + assign fute = !(ff17_d3 || ff17_d4 || ff17_d5 || ff17_d6 || ff17_d7); + assign dyro = !deme; + assign esyk = apu_reset || dora || fute; + assign ares = !(fute || apu_reset); + assign defu = !dane; + assign bymo = !nff16_wr; + assign aget = !nff16_wr; + assign buko = !(!came); + assign cule = !davu; + assign dymu = dyve && cagy; + assign duge = !cano; + assign dare = !dymu; + assign egog = dymu && duge; + assign domo = !(ff16_d6 || ff16_d7); + assign dyta = !(nff16_d6 || ff16_d7); + assign doju = !(ff16_d6 || nff16_d7); + assign dove = !(nff16_d6 || nff16_d7); + assign exes = (egog && domo) || (dymu && dyta) || (dyve && doju) || (dare && dove); assign elox_q = elox; assign dory_q = dory; assign akyd_nq = !akyd; diff --git a/dmg_cpu_b/pages/p16_ch3_regs.sv b/dmg_cpu_b/pages/p16_ch3_regs.sv index 399a13a..9d3ce86 100644 --- a/dmg_cpu_b/pages/p16_ch3_regs.sv +++ b/dmg_cpu_b/pages/p16_ch3_regs.sv @@ -28,29 +28,29 @@ module ch3_regs( drlatch latch_gavu(!epyx, fako, d[7], gavu); nor_srlatch latch_gofy(gulo, foba, gofy, ngofy); nand_srlatch latch_gugu(faju, fuvo, gugu, ngugu); - assign #T_AND gejo = ff1a && apu_wr; - assign #T_INV gucy = !gejo; - assign #T_INV gove = !apu_reset; - assign #T_NOR fuvo = !(!guxe || apu_reset); - assign #T_NAND fasy = !(ff1a && gaxo); - assign #T_INV fevo = !guxe; - assign #T_TRI geko = !fasy ? !fevo : 'z; - assign #T_INV fabo = !cery_2mhz; - assign #T_INV gaze = !apu_reset; - assign #T_INV faju = !gyra; - assign #T_INV goma = !apu_reset; - assign #T_NOR fury = !(apu_reset || gyta); - assign #T_INV gulo = !fury; - assign #T_NOR fako = !(apu_reset || foba); - assign #T_NAND epyx = !(apu_wr && ff1e); + assign gejo = ff1a && apu_wr; + assign gucy = !gejo; + assign gove = !apu_reset; + assign fuvo = !(!guxe || apu_reset); + assign fasy = !(ff1a && gaxo); + assign fevo = !guxe; + assign geko = !fasy ? !fevo : 'z; + assign fabo = !cery_2mhz; + assign gaze = !apu_reset; + assign faju = !gyra; + assign goma = !apu_reset; + assign fury = !(apu_reset || gyta); + assign gulo = !fury; + assign fako = !(apu_reset || foba); + assign epyx = !(apu_wr && ff1e); assign nff1a_d7 = !guxe; assign d[7] = geko; logic dery, geto, emut, gajy; - assign #T_NAND dery = !(apu_wr && ff1b); - assign #T_INV geto = !dery; - assign #T_INV emut = !dery; - assign #T_INV gajy = !dery; + assign dery = !(apu_wr && ff1b); + assign geto = !dery; + assign emut = !dery; + assign gajy = !dery; assign ff1b_wr3 = geto; assign ff1b_wr1 = emut; assign ff1b_wr2 = gajy; @@ -65,11 +65,11 @@ module ch3_regs( drlatch latch_jaxa(jafa, kuha, d[2], jaxa); drlatch latch_jovy(jafa, kuha, d[1], jovy); drlatch latch_koga(jafa, kuha, d[0], koga); - assign #T_AND kota = ff1d && apu_wr; - assign #T_AND jafa = ff1d && apu_wr; - assign #T_INV kuha = !apu_reset; - assign #T_INV kyho = !kota; - assign #T_INV kuly = !jafa; + assign kota = ff1d && apu_wr; + assign jafa = ff1d && apu_wr; + assign kuha = !apu_reset; + assign kyho = !kota; + assign kuly = !jafa; assign ff1d_d7 = kogu; assign ff1d_d6 = kana; assign ff1d_d5 = jove; @@ -81,29 +81,29 @@ module ch3_regs( logic dovo, egad, hoxa, gute, hovo; logic kamy, kora, jeza, juke, jude, kesy, kafu, jofo; - assign #T_INV dovo = !ncpu_rd; - assign #T_NAND egad = !(net03 && dovo); - assign #T_INV hoxa = !ff1d; - assign #T_NOR gute = !(hoxa || egad); - assign #T_INV hovo = !gute; - assign #T_TRI kamy = !hovo ? !nkeno : 'z; - assign #T_TRI kora = !hovo ? !nkafo : 'z; - assign #T_TRI jeza = !hovo ? !nkepa : 'z; - assign #T_TRI juke = !hovo ? !nkygu : 'z; - assign #T_TRI jude = !hovo ? !nkemu : 'z; - assign #T_TRI kesy = !hovo ? !nkunu : 'z; - assign #T_TRI kafu = !hovo ? !nkupe : 'z; - assign #T_TRI jofo = !hovo ? !nkutu : 'z; + assign dovo = !ncpu_rd; + assign egad = !(net03 && dovo); + assign hoxa = !ff1d; + assign gute = !(hoxa || egad); + assign hovo = !gute; + assign kamy = !hovo ? !nkeno : 'z; + assign kora = !hovo ? !nkafo : 'z; + assign jeza = !hovo ? !nkepa : 'z; + assign juke = !hovo ? !nkygu : 'z; + assign jude = !hovo ? !nkemu : 'z; + assign kesy = !hovo ? !nkunu : 'z; + assign kafu = !hovo ? !nkupe : 'z; + assign jofo = !hovo ? !nkutu : 'z; assign d = { kamy, kora, jeza, juke, jude, kesy, kafu, jofo }; logic fovo, heky, gory, hoto, gawa, haca; drlatch latch_hoto(!fovo, heky, d[6], hoto); - assign #T_AND anuj = from_cpu5 && apu_wr; - assign #T_NAND fovo = !(anuj && ff1e); - assign #T_INV heky = !apu_reset; - assign #T_INV gory = !ncpu_rd; - assign #T_NAND gawa = !(ff1e && gory); - assign #T_TRI haca = !gawa ? !(!hoto) : 'z; + assign anuj = from_cpu5 && apu_wr; + assign fovo = !(anuj && ff1e); + assign heky = !apu_reset; + assign gory = !ncpu_rd; + assign gawa = !(ff1e && gory); + assign haca = !gawa ? !(!hoto) : 'z; assign ff1e_d6 = hoto; assign nff1e_d6 = !hoto; assign d[6] = haca; @@ -112,19 +112,19 @@ module ch3_regs( drlatch latch_jemo(huda, kopy, d[0], jemo); drlatch latch_jacy(huda, kopy, d[2], jacy); drlatch latch_jety(huda, kopy, d[1], jety); - assign #T_AND huda = ff1e && apu_wr; - assign #T_INV juzo = !huda; - assign #T_INV kopy = !apu_reset; + assign huda = ff1e && apu_wr; + assign juzo = !huda; + assign kopy = !apu_reset; assign ff1e_d0 = jemo; assign ff1e_d2 = jacy; assign ff1e_d1 = jety; logic gunu, fuva, hufo, jura, juvy; - assign #T_INV gunu = !ff1e; - assign #T_OR fuva = gunu || egad; - assign #T_TRI hufo = !fuva ? !njapu : 'z; - assign #T_TRI jura = !fuva ? !nkeza : 'z; - assign #T_TRI juvy = !fuva ? !nkeju : 'z; + assign gunu = !ff1e; + assign fuva = gunu || egad; + assign hufo = !fuva ? !njapu : 'z; + assign jura = !fuva ? !nkeza : 'z; + assign juvy = !fuva ? !nkeju : 'z; assign d[2] = hufo; assign d[1] = jura; assign d[0] = juvy; @@ -132,13 +132,13 @@ module ch3_regs( logic haga, guro, guzu, huky, hody, jotu, henu, huco, hamu; drlatch latch_huky(haga, guro, d[6], huky); drlatch latch_hody(haga, guro, d[5], hody); - assign #T_AND haga = apu_wr && ff1c; - assign #T_INV guro = !apu_reset; - assign #T_INV guzu = !haga; - assign #T_INV jotu = !ncpu_rd; - assign #T_NAND henu = !(ff1c && jotu); - assign #T_TRI huco = !henu ? !(!huky) : 'z; - assign #T_TRI hamu = !henu ? !(!hody) : 'z; + assign haga = apu_wr && ff1c; + assign guro = !apu_reset; + assign guzu = !haga; + assign jotu = !ncpu_rd; + assign henu = !(ff1c && jotu); + assign huco = !henu ? !(!huky) : 'z; + assign hamu = !henu ? !(!hody) : 'z; assign ff1c_d6 = huky; assign nff1c_d6 = !huky; assign ff1c_d5 = hody; diff --git a/dmg_cpu_b/pages/p17_wave_ram.sv b/dmg_cpu_b/pages/p17_wave_ram.sv index e6984c4..f89fb1e 100644 --- a/dmg_cpu_b/pages/p17_wave_ram.sv +++ b/dmg_cpu_b/pages/p17_wave_ram.sv @@ -28,31 +28,31 @@ module wave_ram( drlatch latch_budy(butu_512khz, acor, wave_rd_d[2], budy); drlatch latch_cesy(butu_512khz, acor, wave_rd_d[1], cesy); drlatch latch_cyfo(butu_512khz, acor, wave_rd_d[0], cyfo); - assign #T_INV beka = !butu_512khz; - assign #T_INV coju = !butu_512khz; - assign #T_INV baja = !butu_512khz; - assign #T_INV bufe = !butu_512khz; - assign #T_INV acor = !apu_reset; - assign #T_INV akaf = !wave_rd_d[7]; - assign #T_INV cuto = !wave_rd_d[6]; - assign #T_INV bero = !wave_rd_d[5]; - assign #T_INV baca = !wave_rd_d[4]; - assign #T_INV adok = !wave_rd_d[3]; - assign #T_INV atec = !wave_rd_d[2]; - assign #T_INV cegu = !wave_rd_d[1]; - assign #T_INV cugo = !wave_rd_d[0]; - assign #T_TRI bezu = wave_ram_rd ? !akaf : 'z; - assign #T_TRI desa = wave_ram_rd ? !cuto : 'z; - assign #T_TRI bava = wave_ram_rd ? !bero : 'z; - assign #T_TRI bune = wave_ram_rd ? !baca : 'z; - assign #T_TRI bade = wave_ram_rd ? !adok : 'z; - assign #T_TRI baty = wave_ram_rd ? !atec : 'z; - assign #T_TRI desy = wave_ram_rd ? !cegu : 'z; - assign #T_TRI dugu = wave_ram_rd ? !cugo : 'z; - assign #T_MUXI copo = !(efar_q ? !begu : !bepa); - assign #T_MUXI cuzo = !(efar_q ? !budy : !bora); - assign #T_MUXI dazy = !(efar_q ? !cesy : !cevo); - assign #T_MUXI date = !(efar_q ? !cyfo : !cuvo); + assign beka = !butu_512khz; + assign coju = !butu_512khz; + assign baja = !butu_512khz; + assign bufe = !butu_512khz; + assign acor = !apu_reset; + assign akaf = !wave_rd_d[7]; + assign cuto = !wave_rd_d[6]; + assign bero = !wave_rd_d[5]; + assign baca = !wave_rd_d[4]; + assign adok = !wave_rd_d[3]; + assign atec = !wave_rd_d[2]; + assign cegu = !wave_rd_d[1]; + assign cugo = !wave_rd_d[0]; + assign bezu = wave_ram_rd ? !akaf : 'z; + assign desa = wave_ram_rd ? !cuto : 'z; + assign bava = wave_ram_rd ? !bero : 'z; + assign bune = wave_ram_rd ? !baca : 'z; + assign bade = wave_ram_rd ? !adok : 'z; + assign baty = wave_ram_rd ? !atec : 'z; + assign desy = wave_ram_rd ? !cegu : 'z; + assign dugu = wave_ram_rd ? !cugo : 'z; + assign copo = !(efar_q ? !begu : !bepa); + assign cuzo = !(efar_q ? !budy : !bora); + assign dazy = !(efar_q ? !cesy : !cevo); + assign date = !(efar_q ? !cyfo : !cuvo); assign d = { bezu, desa, bava, bune, bade, baty, desy, dugu }; assign wave_play_d = { copo, cuzo, dazy, date }; @@ -62,28 +62,28 @@ module wave_ram( dffr_bp dffr_busa(amuk_4mhz, bama, gase, busa); dffr_bp dffr_bano(cozy, bama, busa, bano); dffr_bp dffr_azus(amuk_4mhz, bama, bano, azus); - assign #T_INV abur = !buke; - assign #T_INV bama = !apu_reset; - assign #T_INV aruc = !amuk_4mhz; - assign #T_INV bory = !abur; - assign #T_OR beta = wave_ram_wr || wave_ram_rd || bory; - assign #T_INV cozy = !amuk_4mhz; - assign #T_INV azor = !beta; - assign #T_INV buku = !azor; - assign #T_NOR boxo = !(azus || azet); - assign #T_INV boru = !boxo; - assign #T_MUX atur = ch3_active ? boru : buku; - assign #T_INV aler = !atur; - assign #T_INV butu = !(!azus); + assign abur = !buke; + assign bama = !apu_reset; + assign aruc = !amuk_4mhz; + assign bory = !abur; + assign beta = wave_ram_wr || wave_ram_rd || bory; + assign cozy = !amuk_4mhz; + assign azor = !beta; + assign buku = !azor; + assign boxo = !(azus || azet); + assign boru = !boxo; + assign atur = ch3_active ? boru : buku; + assign aler = !atur; + assign butu = !(!azus); assign wave_ram_ctrl1 = aler; assign butu_512khz = butu; logic boke, bena, byza, cazu, amyt, wave_ram_wr; - assign #T_INV boke = !ncpu_rd; - assign #T_NAND bena = !(boke && ff3x); - assign #T_AND byza = apu_wr && ff3x; - assign #T_INV cazu = !bena; - assign #T_INV amyt = !byza; + assign boke = !ncpu_rd; + assign bena = !(boke && ff3x); + assign byza = apu_wr && ff3x; + assign cazu = !bena; + assign amyt = !byza; assign wave_ram_rd = cazu; assign wave_ram_wr = byza; assign nwave_ram_wr = amyt; diff --git a/dmg_cpu_b/pages/p18_channel3.sv b/dmg_cpu_b/pages/p18_channel3.sv index 2f5f842..cc00392 100644 --- a/dmg_cpu_b/pages/p18_channel3.sv +++ b/dmg_cpu_b/pages/p18_channel3.sv @@ -45,35 +45,35 @@ module channel3( tffd tffd_keju(kese, jera, ff1e_d0, keju); tffd tffd_keza(keju, jera, ff1e_d1, keza); tffd tffd_japu(keza, jera, ff1e_d2, japu); - assign #T_INV jyfo = !japu; - assign #T_AND hupa = huno && cery_2mhz; - assign #T_INV hema = !huno; - assign #T_INV gase = !hema; - assign #T_NOR gafu = !(apu_reset || gara || hupa); - assign #T_NOR hefo = !(cery_2mhz || ngugu); - assign #T_INV juty = !hefo; - assign #T_NOR hera = !(gase || gara); - assign #T_INV kyko = !hera; - assign #T_INV kaso = !hera; - assign #T_INV kyru = !(!kemu); - assign #T_INV jera = !hera; - assign #T_INV kese = !(!keno); - assign #T_AND foto = fety && gase; - assign #T_NOR etan = !(gara || fety); - assign #T_NOR gyry = !(apu_reset || gara || foto); - assign #T_INV dero = !gase; - assign #T_INV jeco = !ncpu_rd; - assign #T_AND hony = net03 && jeco && ff1c; - assign #T_INV geno = !hony; - assign #T_MUX bole = ch3_active ? erus : a[0]; - assign #T_MUX agyl = ch3_active ? efuz : a[1]; - assign #T_MUX afum = ch3_active ? exel : a[2]; - assign #T_MUX axol = ch3_active ? efal : a[3]; - assign #T_TRI fapy = !geno ? !(!efar) : 'z; - assign #T_TRI faro = !geno ? !(!erus) : 'z; - assign #T_TRI fote = !geno ? !(!efuz) : 'z; - assign #T_TRI fana = !geno ? !(!exel) : 'z; - assign #T_TRI fera = !geno ? !(!efal) : 'z; + assign jyfo = !japu; + assign hupa = huno && cery_2mhz; + assign hema = !huno; + assign gase = !hema; + assign gafu = !(apu_reset || gara || hupa); + assign hefo = !(cery_2mhz || ngugu); + assign juty = !hefo; + assign hera = !(gase || gara); + assign kyko = !hera; + assign kaso = !hera; + assign kyru = !(!kemu); + assign jera = !hera; + assign kese = !(!keno); + assign foto = fety && gase; + assign etan = !(gara || fety); + assign gyry = !(apu_reset || gara || foto); + assign dero = !gase; + assign jeco = !ncpu_rd; + assign hony = net03 && jeco && ff1c; + assign geno = !hony; + assign bole = ch3_active ? erus : a[0]; + assign agyl = ch3_active ? efuz : a[1]; + assign afum = ch3_active ? exel : a[2]; + assign axol = ch3_active ? efal : a[3]; + assign fapy = !geno ? !(!efar) : 'z; + assign faro = !geno ? !(!erus) : 'z; + assign fote = !geno ? !(!efuz) : 'z; + assign fana = !geno ? !(!exel) : 'z; + assign fera = !geno ? !(!efal) : 'z; assign nkutu = !kutu; assign nkupe = !kupe; assign nkunu = !kunu; @@ -96,13 +96,13 @@ module channel3( logic gedo, fygo, fozu, ezas, calu, doru, davo, coka, ered; dffr_bp dffr_davo(ajer_2mhz, calu, doru, davo); nor_srlatch latch_fozu(gara, fygo, fozu,); - assign #T_AND gedo = fexu && ff1e_d6; - assign #T_OR fygo = apu_reset || gedo || nff1a_d7; - assign #T_INV ezas = !fozu; - assign #T_INV calu = !apu_reset; - assign #T_INV doru = !ezas; - assign #T_INV coka = !(!davo); - assign #T_INV ered = !coka; + assign gedo = fexu && ff1e_d6; + assign fygo = apu_reset || gedo || nff1a_d7; + assign ezas = !fozu; + assign calu = !apu_reset; + assign doru = !ezas; + assign coka = !(!davo); + assign ered = !coka; assign ch3_active = coka; assign nch3_active = ered; @@ -117,27 +117,27 @@ module channel3( tffd tffd_foro(gemo, ff1b_wr1, d[5], foro); tffd tffd_fave(foro, ff1b_wr1, d[6], fave); tffd tffd_fyru(fave, ff1b_wr1, d[7], fyru); - assign #T_NOR guda = !(ff1b_wr3 || apu_reset || gara); - assign #T_NOR gepy = !(fexu || bufy_256hz || nff1e_d6); - assign #T_INV genu = !gepy; - assign #T_INV falu = !(!gapo); + assign guda = !(ff1b_wr3 || apu_reset || gara); + assign gepy = !(fexu || bufy_256hz || nff1e_d6); + assign genu = !gepy; + assign falu = !(!gapo); logic goka, gemy, gege, ezag, evug, doky, dore, bary, byka, bopa, bely; - assign #T_NOR goka = !(nff1c_d6 || ff1c_d5); - assign #T_NOR gemy = !(nff1c_d6 || nff1c_d5); - assign #T_NOR gege = !(ff1c_d6 || nff1c_d5); - assign #T_AO ezag = (wave_play_d[0] && gege) || (wave_play_d[1] && goka) || (wave_play_d[2] && gemy); - assign #T_AO evug = (wave_play_d[1] && gege) || (wave_play_d[2] && goka) || (wave_play_d[3] && gemy); - assign #T_AO doky = (gege && wave_play_d[2]) || (wave_play_d[3] && goka); - assign #T_AND dore = wave_play_d[3] && gege; - assign #T_AND bary = ch3_active && ezag; - assign #T_AND byka = ch3_active && evug; - assign #T_AND bopa = ch3_active && doky; - assign #T_AND bely = ch3_active && dore; + assign goka = !(nff1c_d6 || ff1c_d5); + assign gemy = !(nff1c_d6 || nff1c_d5); + assign gege = !(ff1c_d6 || nff1c_d5); + assign ezag = (wave_play_d[0] && gege) || (wave_play_d[1] && goka) || (wave_play_d[2] && gemy); + assign evug = (wave_play_d[1] && gege) || (wave_play_d[2] && goka) || (wave_play_d[3] && gemy); + assign doky = (gege && wave_play_d[2]) || (wave_play_d[3] && goka); + assign dore = wave_play_d[3] && gege; + assign bary = ch3_active && ezag; + assign byka = ch3_active && evug; + assign bopa = ch3_active && doky; + assign bely = ch3_active && dore; assign wave_dac_d = { bely, bopa, byka, bary }; logic beno; - assign #T_MUX beno = ch3_active ? butu_512khz : wave_ram_rd; - assign #T_INV atok = !beno; + assign beno = ch3_active ? butu_512khz : wave_ram_rd; + assign atok = !beno; endmodule diff --git a/dmg_cpu_b/pages/p19_ch4_regs.sv b/dmg_cpu_b/pages/p19_ch4_regs.sv index 6b72415..43a3b03 100644 --- a/dmg_cpu_b/pages/p19_ch4_regs.sv +++ b/dmg_cpu_b/pages/p19_ch4_regs.sv @@ -26,14 +26,14 @@ module ch4_regs( tffd tffd_favy(dano, dotu, d[1], favy); tffd tffd_dena(favy, dotu, d[2], dena); tffd tffd_cedo(dena, dotu, d[3], cedo); - assign #T_INV dopu = !(!cedo); - assign #T_NAND caze = !(apu_wr && ff20); - assign #T_NOR doda = !(fugo || bufy_256hz || nff23_d6); - assign #T_INV furu = !caze; - assign #T_INV epek = !caze; - assign #T_INV dotu = !caze; - assign #T_INV cuwa = !doda; - assign #T_NOR gapy = !(furu || apu_reset || ch4_restart); + assign dopu = !(!cedo); + assign caze = !(apu_wr && ff20); + assign doda = !(fugo || bufy_256hz || nff23_d6); + assign furu = !caze; + assign epek = !caze; + assign dotu = !caze; + assign cuwa = !doda; + assign gapy = !(furu || apu_reset || ch4_restart); assign fugo_q = fugo; logic fexo, goko, fupa, gony, hasu, daco, dyke, bofy, boxe; @@ -47,23 +47,23 @@ module ch4_regs( drlatch latch_ezyk(daco, fexo, d[2], ezyk); drlatch latch_etyj(daco, fexo, d[1], etyj); drlatch latch_emok(daco, fexo, d[0], emok); - assign #T_INV fexo = !apu_reset; - assign #T_AND goko = ff21 && apu_wr; - assign #T_INV fupa = !goko; - assign #T_INV gony = !ff21; - assign #T_OR hasu = gony || ncpu_rd; - assign #T_AND daco = apu_wr && ff21; - assign #T_INV dyke = !daco; - assign #T_INV bofy = !ff21; - assign #T_OR boxe = bofy || ncpu_rd; - assign #T_TRI hacu = !hasu ? !(!gedu) : 'z; - assign #T_TRI hoge = !hasu ? !(!gozo) : 'z; - assign #T_TRI godu = !hasu ? !(!goky) : 'z; - assign #T_TRI heda = !hasu ? !(!garu) : 'z; - assign #T_TRI gome = !hasu ? !(!geky) : 'z; - assign #T_TRI cuzu = !boxe ? !(!ezyk) : 'z; - assign #T_TRI coce = !boxe ? !(!etyj) : 'z; - assign #T_TRI demy = !boxe ? !(!emok) : 'z; + assign fexo = !apu_reset; + assign goko = ff21 && apu_wr; + assign fupa = !goko; + assign gony = !ff21; + assign hasu = gony || ncpu_rd; + assign daco = apu_wr && ff21; + assign dyke = !daco; + assign bofy = !ff21; + assign boxe = bofy || ncpu_rd; + assign hacu = !hasu ? !(!gedu) : 'z; + assign hoge = !hasu ? !(!gozo) : 'z; + assign godu = !hasu ? !(!goky) : 'z; + assign heda = !hasu ? !(!garu) : 'z; + assign gome = !hasu ? !(!geky) : 'z; + assign cuzu = !boxe ? !(!ezyk) : 'z; + assign coce = !boxe ? !(!etyj) : 'z; + assign demy = !boxe ? !(!emok) : 'z; assign ff21_d7 = gedu; assign ff21_d6 = gozo; assign ff21_d5 = goky; @@ -85,19 +85,19 @@ module ch4_regs( drlatch latch_gogo(getu, napu_reset4, d[6], gogo); drlatch latch_gafo(getu, napu_reset4, d[7], gafo); drlatch latch_fyto(getu, napu_reset4, d[5], fyto); - assign #T_INV kage = !ncpu_rd; - assign #T_NAND jora = !(kage && ff22); - assign #T_NAND hoso = !(ff22 && apu_wr); - assign #T_AND getu = apu_wr && ff22; - assign #T_INV gugo = !ff22; - assign #T_OR heze = gugo || ncpu_rd; - assign #T_INV hyne = !apu_reset; - assign #T_INV efug = !getu; - assign #T_TRI keta = !jora ? !(!jamy) : 'z; - assign #T_TRI geda = !heze ? !(!feta) : 'z; - assign #T_TRI gaka = !heze ? !(!gogo) : 'z; - assign #T_TRI hapy = !heze ? !(!gafo) : 'z; - assign #T_TRI gype = !heze ? !(!fyto) : 'z; + assign kage = !ncpu_rd; + assign jora = !(kage && ff22); + assign hoso = !(ff22 && apu_wr); + assign getu = apu_wr && ff22; + assign gugo = !ff22; + assign heze = gugo || ncpu_rd; + assign hyne = !apu_reset; + assign efug = !getu; + assign keta = !jora ? !(!jamy) : 'z; + assign geda = !heze ? !(!feta) : 'z; + assign gaka = !heze ? !(!gogo) : 'z; + assign hapy = !heze ? !(!gafo) : 'z; + assign gype = !heze ? !(!fyto) : 'z; assign ff22_d3 = jamy; assign nff22_d3 = !jamy; assign ff22_d4 = feta; @@ -117,13 +117,13 @@ module ch4_regs( drlatch latch_jaky(humo, napu_reset5, d[2], jaky); drlatch latch_jero(humo, napu_reset5, d[1], jero); drlatch latch_jare(humo, napu_reset5, d[0], jare); - assign #T_AND humo = apu_wr && ff22; - assign #T_INV hova = !humo; - assign #T_INV koku = !ff22; - assign #T_OR keka = koku || ncpu_rd; - assign #T_TRI kyro = !keka ? !(!jaky) : 'z; - assign #T_TRI kaku = !keka ? !(!jero) : 'z; - assign #T_TRI kamo = !keka ? !(!jare) : 'z; + assign humo = apu_wr && ff22; + assign hova = !humo; + assign koku = !ff22; + assign keka = koku || ncpu_rd; + assign kyro = !keka ? !(!jaky) : 'z; + assign kaku = !keka ? !(!jero) : 'z; + assign kamo = !keka ? !(!jare) : 'z; assign nff22_d2 = !jaky; assign nff22_d1 = !jero; assign nff22_d0 = !jare; @@ -133,18 +133,18 @@ module ch4_regs( logic bylo, dulu, cabe, bare, cuny, cury, nff23_d6; drlatch latch_cuny(!dulu, cabe, d[6], cuny); - assign #T_INV bylo = !ncpu_rd; - assign #T_NAND dulu = !(anuj && ff23); - assign #T_INV cabe = !apu_reset; - assign #T_NAND bare = !(ff23 && bylo); - assign #T_TRI cury = !bare ? !(!cuny) : 'z; + assign bylo = !ncpu_rd; + assign dulu = !(anuj && ff23); + assign cabe = !apu_reset; + assign bare = !(ff23 && bylo); + assign cury = !bare ? !(!cuny) : 'z; assign ff23_d6 = cuny; assign nff23_d6 = !cuny; assign d[6] = cury; logic foxe, hoga; drlatch latch_hoga(!foxe, rst_ff23_d7, d[7], hoga); - assign #T_NAND foxe = !(apu_wr && ff23); + assign foxe = !(apu_wr && ff23); assign ff23_d7 = hoga; endmodule diff --git a/dmg_cpu_b/pages/p1_clocks_reset.sv b/dmg_cpu_b/pages/p1_clocks_reset.sv index 7ad83a8..c4e1222 100644 --- a/dmg_cpu_b/pages/p1_clocks_reset.sv +++ b/dmg_cpu_b/pages/p1_clocks_reset.sv @@ -42,23 +42,23 @@ module clocks_reset( ); logic arys, anos, avet; - assign #T_INV arys = !clkin_b; - assign #T_NAND anos = !(clkin_b && avet); - assign #T_NAND avet = !(anos && arys); + assign arys = !clkin_b; + assign anos = !(clkin_b && avet); + assign avet = !(anos && arys); logic atal, atal_4mhz; - assign #T_INV atal = !avet; + assign atal = !avet; assign atal_4mhz = atal; logic azof, zaxy, zeme, alet, lape, tava, atag, amuk; - assign #T_INV azof = !atal; - assign #T_INV zaxy = !azof; - assign #T_INV zeme = !zaxy; - assign #T_INV alet = !zeme; - assign #T_INV lape = !alet; - assign #T_INV tava = !lape; - assign #T_INV atag = !azof; - assign #T_INV amuk = !atag; + assign azof = !atal; + assign zaxy = !azof; + assign zeme = !zaxy; + assign alet = !zeme; + assign lape = !alet; + assign tava = !lape; + assign atag = !azof; + assign amuk = !atag; assign clk1 = zeme; assign clk2 = alet; assign clk4 = lape; @@ -66,22 +66,22 @@ module clocks_reset( assign amuk_4mhz = amuk; logic aryf, apuv, cybo, bela, cery, aryf_4mhz; - assign #T_INV aryf = !amuk; - assign #T_INV apuv = !amuk; - assign #T_INV cybo = !amuk; - assign #T_INV bela = !apu_reset; + assign aryf = !amuk; + assign apuv = !amuk; + assign cybo = !amuk; + assign bela = !apu_reset; dffr_bp dffr_cery(cybo, bela, !cery, cery); assign aryf_4mhz = aryf; assign apuv_4mhz = apuv; assign cery_2mhz = cery; logic dula, cunu, xore, walu, wesy, xebe; - assign #T_INV dula = !nreset2; - assign #T_INV cunu = !dula; - assign #T_INV xore = !cunu; - assign #T_INV walu = !xore; - assign #T_INV wesy = !xore; - assign #T_INV xebe = !xore; + assign dula = !nreset2; + assign cunu = !dula; + assign xore = !cunu; + assign walu = !xore; + assign wesy = !xore; + assign xebe = !xore; assign nreset6 = cunu; assign reset7 = xore; assign nreset7 = xebe; @@ -89,12 +89,12 @@ module clocks_reset( assign nreset9 = wesy; logic xodo, xapo, pyry, atar, lyha, lyfe; - assign #T_NAND xodo = !(ff40_d7 && nreset7); - assign #T_INV xapo = !xodo; - assign #T_INV pyry = !xapo; - assign #T_INV atar = !xapo; - assign #T_INV lyha = !xapo; - assign #T_INV lyfe = !lyha; + assign xodo = !(ff40_d7 && nreset7); + assign xapo = !xodo; + assign pyry = !xapo; + assign atar = !xapo; + assign lyha = !xapo; + assign lyfe = !lyha; assign reset_video = atar; assign nreset_video = xapo; assign reset_video2 = pyry; @@ -107,48 +107,48 @@ module clocks_reset( drlatch latch_afur(atal_4mhz, t1t2_nrst, !adyk, afur); drlatch latch_alef(!atal_4mhz, t1t2_nrst, afur, alef); drlatch latch_apuk(atal_4mhz, t1t2_nrst, alef, apuk); - assign #T_INV abol = !clk_from_cpu; - assign #T_INV ucob = !clkin_a; - assign #T_INV uvyt = !nphi_out; - assign #T_INV adar = !adyk; - assign #T_INV atyp = !(!afur); - assign #T_INV afep = !alef; - assign #T_INV arov = !(!apuk); - assign #T_NOR afas = !(adar || atyp); - assign #T_NAND arev = !(from_cpu3 && afas); - assign #T_INV apov = !arev; - assign #T_INV ajax = !atyp; - assign #T_INV bugo = !afep; - assign #T_OA agut = (arov || ajax) && from_cpu4; - assign #T_NOR awod = !(t1_nt2 || agut); - assign #T_INV abuz = !awod; - assign #T_NOR bate = !(bugo || arov || abol); - assign #T_INV basu = !bate; - assign #T_INV buke = !basu; + assign abol = !clk_from_cpu; + assign ucob = !clkin_a; + assign uvyt = !nphi_out; + assign adar = !adyk; + assign atyp = !(!afur); + assign afep = !alef; + assign arov = !(!apuk); + assign afas = !(adar || atyp); + assign arev = !(from_cpu3 && afas); + assign apov = !arev; + assign ajax = !atyp; + assign bugo = !afep; + assign agut = (arov || ajax) && from_cpu4; + assign awod = !(t1_nt2 || agut); + assign abuz = !awod; + assign bate = !(bugo || arov || abol); + assign basu = !bate; + assign buke = !basu; assign nclkin_a = ucob; assign phi_out = uvyt; assign cpu_wr_sync = apov; logic bapy, belu, beru, byry, bufa, byly, bude, beva, byda, bavy, beja, dova; logic bane, belo, baze, buto; - assign #T_NOR bapy = !(abol || arov || atyp); - assign #T_NOR belu = !(atyp || abol); - assign #T_INV beru = !bapy; - assign #T_INV byry = !belu; - assign #T_INV bufa = !beru; - assign #T_INV byly = !beru; - assign #T_INV bude = !byry; - assign #T_INV beva = !byry; - assign #T_INV bolo = !bufa; - assign #T_INV byda = !bufa; - assign #T_INV beko = !bude; - assign #T_INV bavy = !bude; - assign #T_INV dova = !bude; - assign #T_NAND beja = !(bolo && beko); - assign #T_INV bane = !beja; - assign #T_INV belo = !bane; - assign #T_INV baze = !belo; - assign #T_NAND buto = !(afep && atyp && baze); + assign bapy = !(abol || arov || atyp); + assign belu = !(atyp || abol); + assign beru = !bapy; + assign byry = !belu; + assign bufa = !beru; + assign byly = !beru; + assign bude = !byry; + assign beva = !byry; + assign bolo = !bufa; + assign byda = !bufa; + assign beko = !bude; + assign bavy = !bude; + assign dova = !bude; + assign beja = !(bolo && beko); + assign bane = !beja; + assign belo = !bane; + assign baze = !belo; + assign buto = !(afep && atyp && baze); assign nphi_out = bude; assign dova_phi = dova; assign from_cpu5 = bufa; @@ -156,28 +156,28 @@ module clocks_reset( logic bele, atez, byju, alyp, buty, baly, afar, buvu, boga, asol, nasol, byxo, bowa, avor, alur; dffr_b dffr_afer(boga, t1t2_nrst, nasol, afer); nor_srlatch latch_asol(afar, reset, asol, nasol); - assign #T_INV bele = !buto; - assign #T_INV atez = !clkin_a; - assign #T_OR byju = bele || atez; - assign #T_INV alyp = !taba; - assign #T_INV buty = !abol; - assign #T_INV baly = !byju; - assign #T_NOR afar = !(alyp || reset); - assign #T_AND buvu = buty && baly; - assign #T_INV boga = !baly; - assign #T_INV byxo = !buvu; - assign #T_INV boma = !boga; - assign #T_INV bedo = !byxo; - assign #T_INV bowa = !bedo; - assign #T_OR avor = afer || nasol; - assign #T_INV alur = !avor; + assign bele = !buto; + assign atez = !clkin_a; + assign byju = bele || atez; + assign alyp = !taba; + assign buty = !abol; + assign baly = !byju; + assign afar = !(alyp || reset); + assign buvu = buty && baly; + assign boga = !baly; + assign byxo = !buvu; + assign boma = !boga; + assign bedo = !byxo; + assign bowa = !bedo; + assign avor = afer || nasol; + assign alur = !avor; assign boga1mhz = boga; assign to_cpu = bowa; assign nreset2 = alur; logic tape, ufol, nreset_div; - assign #T_AND tape = ff04_ff07 && cpu_wr && tola_na1 && tovy_na0; - assign #T_NOR ufol = !(nclkin_a || reset || tape); + assign tape = ff04_ff07 && cpu_wr && tola_na1 && tovy_na0; + assign ufol = !(nclkin_a || reset || tape); assign nreset_div = ufol; logic tama, unyk, tero, uner, ufor, ukup, uvyn, tama16384; @@ -187,7 +187,7 @@ module clocks_reset( dffr_bp dffr_uner(!ufor, nreset_div, !uner, uner); dffr_bp dffr_ufor(!ukup, nreset_div, !ufor, ufor); dffr_bp dffr_ukup(boga1mhz, nreset_div, !ukup, ukup); - assign #T_INV uvyn = !tama; + assign uvyn = !tama; assign tama16384 = !tama; assign _16384hz = uvyn; assign _65536hz = tero; @@ -208,27 +208,27 @@ module clocks_reset( dffr_bp dffr_uket(!teka, nreset_div, !uket, uket); dffr_bp dffr_upof(!uket, nreset_div, !upof, upof); nor_srlatch latch_tubo(clk_from_cpu, upyf, tubo, ntubo); - assign #T_MUX ulur = ff60_d1 ? boga1mhz : tama16384; - assign #T_INV umek = !ugot; - assign #T_INV urek = !tulu; - assign #T_INV utok = !tugo; - assign #T_INV sapy = !tofe; - assign #T_INV umer = !teru; - assign #T_INV rave = !sola; - assign #T_INV ryso = !subu; - assign #T_INV udor = !teka; - assign #T_AND tagy = ff04_ff07 && cpu_rd && tola_na1 && tovy_na0; - assign #T_OR upyf = reset || nclkin_a; - assign #T_AND unut = upof && ntubo; - assign #T_OR taba = t1_nt2 || nt1_t2 || unut; - assign #T_TRI tawu = tagy ? !umek : 'z; - assign #T_TRI taku = tagy ? !urek : 'z; - assign #T_TRI temu = tagy ? !utok : 'z; - assign #T_TRI tuse = tagy ? !sapy : 'z; - assign #T_TRI upug = tagy ? !umer : 'z; - assign #T_TRI sepu = tagy ? !rave : 'z; - assign #T_TRI sawa = tagy ? !ryso : 'z; - assign #T_TRI tatu = tagy ? !udor : 'z; + assign ulur = ff60_d1 ? boga1mhz : tama16384; + assign umek = !ugot; + assign urek = !tulu; + assign utok = !tugo; + assign sapy = !tofe; + assign umer = !teru; + assign rave = !sola; + assign ryso = !subu; + assign udor = !teka; + assign tagy = ff04_ff07 && cpu_rd && tola_na1 && tovy_na0; + assign upyf = reset || nclkin_a; + assign unut = upof && ntubo; + assign taba = t1_nt2 || nt1_t2 || unut; + assign tawu = tagy ? !umek : 'z; + assign taku = tagy ? !urek : 'z; + assign temu = tagy ? !utok : 'z; + assign tuse = tagy ? !sapy : 'z; + assign upug = tagy ? !umer : 'z; + assign sepu = tagy ? !rave : 'z; + assign sawa = tagy ? !ryso : 'z; + assign tatu = tagy ? !udor : 'z; assign nff04_d0 = umek; assign nff04_d1 = urek; assign d = { tatu, sawa, sepu, upug, tuse, temu, taku, tawu }; @@ -237,21 +237,21 @@ module clocks_reset( dffr_bp dffr_bara(coke, atus, umer, bara); dffr_bp dffr_caru(bure, atus, !caru, caru); dffr_bp dffr_bylu(!caru, atus, !bylu, bylu); - assign #T_INV atus = !apu_reset; - assign #T_INV coke = !ajer_2mhz; - assign #T_INV bure = !(!bara); - assign #T_INV fyne = !bure; - assign #T_INV culo = !(!caru); - assign #T_INV apef = !(!bylu); - assign #T_MUX gale = fero_q ? hama_512k : fyne; - assign #T_MUX beze = fero_q ? hama_512k : culo; - assign #T_MUX bule = fero_q ? hama_512k : apef; - assign #T_INV gexy = !gale; - assign #T_INV horu = !gexy; - assign #T_INV cofu = !beze; - assign #T_INV bufy = !cofu; - assign #T_INV baru = !bule; - assign #T_INV byfe = !baru; + assign atus = !apu_reset; + assign coke = !ajer_2mhz; + assign bure = !(!bara); + assign fyne = !bure; + assign culo = !(!caru); + assign apef = !(!bylu); + assign gale = fero_q ? hama_512k : fyne; + assign beze = fero_q ? hama_512k : culo; + assign bule = fero_q ? hama_512k : apef; + assign gexy = !gale; + assign horu = !gexy; + assign cofu = !beze; + assign bufy = !cofu; + assign baru = !bule; + assign byfe = !baru; assign horu_512hz = horu; assign bufy_256hz = bufy; assign byfe_128hz = byfe; @@ -260,9 +260,9 @@ module clocks_reset( dffr_bp dffr_atyk(aryf_4mhz, bopo, !atyk, atyk); dffr_bp dffr_avok(!atyk, bopo, !avok, avok); dffr_bp dffr_jeso(bavu, napu_reset5, !jeso, jeso); - assign #T_INV bopo = !apu_reset; - assign #T_INV bavu = !avok; - assign #T_INV hama = !(!jeso); + assign bopo = !apu_reset; + assign bavu = !avok; + assign hama = !(!jeso); assign bavu_1mhz = bavu; assign jeso_512k = jeso; assign hama_512k = hama; diff --git a/dmg_cpu_b/pages/p20_channel4.sv b/dmg_cpu_b/pages/p20_channel4.sv index 7a1c13d..45652b3 100644 --- a/dmg_cpu_b/pages/p20_channel4.sv +++ b/dmg_cpu_b/pages/p20_channel4.sv @@ -39,34 +39,34 @@ module channel4( dffr_bp dffr_ezef(!deko, napu_reset4, !ezef, ezef); dffr_bp dffr_deko(!cexo, napu_reset4, !deko, deko); dffr_bp dffr_cexo(cary, napu_reset4, !cexo, cexo); - assign #T_NOR emof = !(nff22_d4 || nff22_d5 || nff22_d6); - assign #T_NOR elar = !(nff22_d6 || nff22_d5 || ff22_d4); - assign #T_NOR dudu = !(nff22_d6 || ff22_d5 || nff22_d4); - assign #T_NOR etat = !(nff22_d6 || ff22_d5 || ff22_d4); - assign #T_NOR fura = !(ff22_d6 || nff22_d5 || nff22_d4); - assign #T_NOR etar = !(ff22_d6 || nff22_d5 || ff22_d4); - assign #T_NOR ever = !(ff22_d6 || ff22_d5 || nff22_d4); - assign #T_NOR etov = !(ff22_d6 || ff22_d5 || ff22_d4); - assign #T_AO etyr = (esep && dudu) || (dere && etat) || (dota && fura) || + assign emof = !(nff22_d4 || nff22_d5 || nff22_d6); + assign elar = !(nff22_d6 || nff22_d5 || ff22_d4); + assign dudu = !(nff22_d6 || ff22_d5 || nff22_d4); + assign etat = !(nff22_d6 || ff22_d5 || ff22_d4); + assign fura = !(ff22_d6 || nff22_d5 || nff22_d4); + assign etar = !(ff22_d6 || nff22_d5 || ff22_d4); + assign ever = !(ff22_d6 || ff22_d5 || nff22_d4); + assign etov = !(ff22_d6 || ff22_d5 || ff22_d4); + assign etyr = (esep && dudu) || (dere && etat) || (dota && fura) || (erut && etar) || (dete && ever) || (dose && etov); - assign #T_AO elyx = (demo && emof) || (doke && elar) || (dale && dudu) || (dure && etat); - assign #T_AO dary = (epor && fura) || (ezef && etar) || (deko && ever) || (cexo && etov); - assign #T_OR eryf = dary || elyx; - assign #T_MUX feme = ff22_d7 ? etyr : eryf; - assign #T_MUX ezul = dyry ? feme : lfsr_out; - assign #T_INV gufa = !feme; - assign #T_INV gyve = !gufa; - assign #T_INV kara = !gyve; - assign #T_INV kopa = !kara; - assign #T_INV cosa = !ncpu_rd; - assign #T_AND dyry = ff23_d6 && net03; - assign #T_INV cepy = !ff23_d6; - assign #T_AND como = dyry && cosa; - assign #T_AND cote = cepy && net03; - assign #T_NAND bagu = !(ff23 && como); - assign #T_INV befa = !cary; - assign #T_OR dato = ezul || cote; - assign #T_TRI atel = !bagu ? !befa : 'z; + assign elyx = (demo && emof) || (doke && elar) || (dale && dudu) || (dure && etat); + assign dary = (epor && fura) || (ezef && etar) || (deko && ever) || (cexo && etov); + assign eryf = dary || elyx; + assign feme = ff22_d7 ? etyr : eryf; + assign ezul = dyry ? feme : lfsr_out; + assign gufa = !feme; + assign gyve = !gufa; + assign kara = !gyve; + assign kopa = !kara; + assign cosa = !ncpu_rd; + assign dyry = ff23_d6 && net03; + assign cepy = !ff23_d6; + assign como = dyry && cosa; + assign cote = cepy && net03; + assign bagu = !(ff23 && como); + assign befa = !cary; + assign dato = ezul || cote; + assign atel = !bagu ? !befa : 'z; assign ch4_lfsr_clk1 = feme; assign ch4_lfsr_clk2 = gyve; assign ch4_lfsr_clk3 = kopa; @@ -81,21 +81,21 @@ module channel4( tffd tffd_feru(edyf, ch4_restart, ff21_d6, feru); tffd tffd_fyro(elaf, ch4_restart, ff21_d7, fyro); nor_srlatch latch_erox(fyno, enur, erox,); - assign #T_OR felo = ch4_eg_tick || ch4_eg_disable || erox; - assign #T_AO fole = (felo && ff21_d3) || (felo && nff21_d3); - assign #T_AO etef = (feko && ff21_d3) || (!feko && nff21_d3); - assign #T_AO edyf = (faty && ff21_d3) || (!faty && nff21_d3); - assign #T_AO elaf = (feru && ff21_d3) || (!feru && nff21_d3); - assign #T_AND akof = feko && ch4_bit; - assign #T_AND byzy = faty && ch4_bit; - assign #T_AND apyr = feru && ch4_bit; - assign #T_AND boza = fyro && ch4_bit; - assign #T_NOR daro = !(ff21_d3 || feko || faty || feru || fyro); - assign #T_NAND cuty = !(ff21_d3 && feko && faty && feru && fyro); - assign #T_INV dubo = !cuty; - assign #T_NOR emet = !(ch4_restart || apu_reset); - assign #T_OR evur = daro || dubo; - assign #T_OR enur = apu_reset || ch4_restart; + assign felo = ch4_eg_tick || ch4_eg_disable || erox; + assign fole = (felo && ff21_d3) || (felo && nff21_d3); + assign etef = (feko && ff21_d3) || (!feko && nff21_d3); + assign edyf = (faty && ff21_d3) || (!faty && nff21_d3); + assign elaf = (feru && ff21_d3) || (!feru && nff21_d3); + assign akof = feko && ch4_bit; + assign byzy = faty && ch4_bit; + assign apyr = feru && ch4_bit; + assign boza = fyro && ch4_bit; + assign daro = !(ff21_d3 || feko || faty || feru || fyro); + assign cuty = !(ff21_d3 && feko && faty && feru && fyro); + assign dubo = !cuty; + assign emet = !(ch4_restart || apu_reset); + assign evur = daro || dubo; + assign enur = apu_reset || ch4_restart; assign ch4_out = { boza, apyr, byzy, akof }; logic alop, boky, abel, bawa, buxo, dogo, cofe, cuna, ejex; @@ -106,17 +106,17 @@ module channel4( tffd tffd_dogo(cofe, dapy, nff21_d2, dogo); tffd tffd_cofe(cuna, dapy, nff21_d1, cofe); tffd tffd_cuna(buxo, dapy, nff21_d0, cuna); - assign #T_INV alop = !byfe_128hz; - assign #T_INV boky = !apu_reset; - assign #T_INV bawa = !abel; - assign #T_INV buxo = !bawa; - assign #T_AND ejex = dogo && cofe && cuna; - assign #T_NOR enec = !(ch4_restart || fosy); - assign #T_INV dapy = !enec; - assign #T_INV gexe = !fosy; - assign #T_NOR hury = !(horu_512hz || gexe); - assign #T_NOR fowa = !(ff21_d0 || ff21_d1 || ff21_d2); - assign #T_NOR gopa = !(hury || fowa || ch4_restart || apu_reset); + assign alop = !byfe_128hz; + assign boky = !apu_reset; + assign bawa = !abel; + assign buxo = !bawa; + assign ejex = dogo && cofe && cuna; + assign enec = !(ch4_restart || fosy); + assign dapy = !enec; + assign gexe = !fosy; + assign hury = !(horu_512hz || gexe); + assign fowa = !(ff21_d0 || ff21_d1 || ff21_d2); + assign gopa = !(hury || fowa || ch4_restart || apu_reset); assign ch4_eg_tick = fosy; assign ch4_eg_disable = fowa; @@ -153,32 +153,32 @@ module channel4( nor_srlatch latch_gena(ch4_restart, fegy, gena,); nor_srlatch latch_hazo(helu, gysu, hazo, nhazo); nand_srlatch latch_jery(hapu, hery, jery, njery); - assign #T_INV gaso = !apu_reset; - assign #T_NOR fale = !(apu_reset || gora); - assign #T_INV helu = !fale; - assign #T_NOR guzy = !(apu_reset || gysu); - assign #T_INV feby = !apu_reset; - assign #T_INV hapu = !gaty; - assign #T_NOR gevy = !(ff21_d3 || ff21_d4 || ff21_d5 || ff21_d6 || ff21_d7); - assign #T_AND efot = ff23_d6 && fugo_q; - assign #T_NOR hery = !(gevy || apu_reset); - assign #T_OR fegy = apu_reset || efot || gevy; - assign #T_OR kyku = njery || jeso_512k; - assign #T_INV juwa = !gena; - assign #T_INV kony = !kyku; - assign #T_INV kanu = !kony; - assign #T_AND hyno = jyfu && jyre && jyco; - assign #T_INV gyba = !bavu_1mhz; - assign #T_AND cary = bavu_1mhz && gary; - assign #T_NOR gofu = !(ch4_restart || gary); - assign #T_NOR guny = !(apu_reset || ch4_restart); - assign #T_INV huce = !gofu; - assign #T_OR gepo = ch4_restart || apu_reset; - assign #T_INV goge = !gepo; - assign #T_INV jyja = !ch4_lfsr_clk1; - assign #T_AO kavu = (joto && ff22_d3) || (nff22_d3 && juxe); - assign #T_AND game = gena && hezu; - assign #T_XNOR hura = hyro == hezu; + assign gaso = !apu_reset; + assign fale = !(apu_reset || gora); + assign helu = !fale; + assign guzy = !(apu_reset || gysu); + assign feby = !apu_reset; + assign hapu = !gaty; + assign gevy = !(ff21_d3 || ff21_d4 || ff21_d5 || ff21_d6 || ff21_d7); + assign efot = ff23_d6 && fugo_q; + assign hery = !(gevy || apu_reset); + assign fegy = apu_reset || efot || gevy; + assign kyku = njery || jeso_512k; + assign juwa = !gena; + assign kony = !kyku; + assign kanu = !kony; + assign hyno = jyfu && jyre && jyco; + assign gyba = !bavu_1mhz; + assign cary = bavu_1mhz && gary; + assign gofu = !(ch4_restart || gary); + assign guny = !(apu_reset || ch4_restart); + assign huce = !gofu; + assign gepo = ch4_restart || apu_reset; + assign goge = !gepo; + assign jyja = !ch4_lfsr_clk1; + assign kavu = (joto && ff22_d3) || (nff22_d3 && juxe); + assign game = gena && hezu; + assign hura = hyro == hezu; assign rst_ff23_d7 = guzy; assign ch4_restart = gone; assign nch4_amp_en = gevy; diff --git a/dmg_cpu_b/pages/p21_video_control.sv b/dmg_cpu_b/pages/p21_video_control.sv index 5daa23f..3e2943c 100644 --- a/dmg_cpu_b/pages/p21_video_control.sv +++ b/dmg_cpu_b/pages/p21_video_control.sv @@ -17,18 +17,18 @@ module video_control( ); logic syfu, tery, tucy, tyku, rasy, reda, tyde, ryme, sovu, subo, rape, paly; - assign #T_XOR syfu = v[7] != ff45_d7; - assign #T_XOR tery = v[6] != ff45_d6; - assign #T_XOR tucy = v[5] != ff45_d5; - assign #T_XOR tyku = v[4] != ff45_d4; - assign #T_XOR rasy = v[3] != ff45_d3; - assign #T_XOR reda = v[2] != ff45_d2; - assign #T_XOR tyde = v[1] != ff45_d1; - assign #T_XOR ryme = v[0] != ff45_d0; - assign #T_NOR sovu = !(syfu || tery || tucy || tyku); - assign #T_NOR subo = !(rasy || reda || tyde || ryme); - assign #T_NAND rape = !(sovu && subo); - assign #T_INV paly = !rape; + assign syfu = v[7] != ff45_d7; + assign tery = v[6] != ff45_d6; + assign tucy = v[5] != ff45_d5; + assign tyku = v[4] != ff45_d4; + assign rasy = v[3] != ff45_d3; + assign reda = v[2] != ff45_d2; + assign tyde = v[1] != ff45_d1; + assign ryme = v[0] != ff45_d0; + assign sovu = !(syfu || tery || tucy || tyku); + assign subo = !(rasy || reda || tyde || ryme); + assign rape = !(sovu && subo); + assign paly = !rape; logic vena, mude, saxo, typo, vyzo, telu, sude, taha, tyry; logic tocu, vepe, vuty, tuju, tafy, tuda, vate, voku, tozu, tece, tebo, tegy; @@ -43,24 +43,24 @@ module video_control( dffr_bp dffr_tyry(!taha, mude, !tyry, tyry); dffr_bp dffr_rutu(sono, nreset_video2, sanu, rutu); dffr_bp dffr_sygu(sono, nreset_video2, tegy, sygu); - assign #T_NOR mude = !(l113 || reset_video3); - assign #T_INV talu = !(!vena); - assign #T_INV tocu = !saxo; - assign #T_INV vepe = !typo; - assign #T_INV vuty = !vyzo; - assign #T_INV tuju = !tyry; - assign #T_INV tafy = !taha; - assign #T_INV tuda = !sude; - assign #T_INV vate = !telu; - assign #T_NAND voku = !(tuju && tafy && tuda && vate && vuty && vepe && tocu); - assign #T_NAND tozu = !(tuju && tafy && tuda && vate && vyzo && typo && saxo); - assign #T_NAND tece = !(tuju && taha && tuda && telu && vyzo && vepe && saxo); - assign #T_NAND tebo = !(tyry && tafy && sude && vate && vuty && typo && saxo); - assign #T_NAND tegy = !(voku && tozu && tece && tebo); - assign #T_AND sanu = tyry && taha && sude && saxo; - assign #T_INV sono = !talu; - assign #T_OR ryno = rutu || sygu; - assign #T_INV pogu = !ryno; + assign mude = !(l113 || reset_video3); + assign talu = !(!vena); + assign tocu = !saxo; + assign vepe = !typo; + assign vuty = !vyzo; + assign tuju = !tyry; + assign tafy = !taha; + assign tuda = !sude; + assign vate = !telu; + assign voku = !(tuju && tafy && tuda && vate && vuty && vepe && tocu); + assign tozu = !(tuju && tafy && tuda && vate && vyzo && typo && saxo); + assign tece = !(tuju && taha && tuda && telu && vyzo && vepe && saxo); + assign tebo = !(tyry && tafy && sude && vate && vuty && typo && saxo); + assign tegy = !(voku && tozu && tece && tebo); + assign sanu = tyry && taha && sude && saxo; + assign sono = !talu; + assign ryno = rutu || sygu; + assign pogu = !ryno; assign l113 = rutu; assign npin_cpg = pogu; @@ -81,41 +81,41 @@ module video_control( nor_srlatch latch_xymu(wego, avap, xymu, nxymu); nor_srlatch latch_wusa(xajo, wego, wusa,); nor_srlatch latch_rupo(ropo, pago, rupo, nrupo); - assign #T_AND xyvo = v[4] && v[7]; - assign #T_NAND xugu = !(h[0] && h[1] && h[2] && h[5] && h[7]); - assign #T_INV xena = !fepo; - assign #T_INV xano = !xugu; - assign #T_INV paru = !(!popu); - assign #T_AND wodu = xena && xano; - assign #T_INV PURE = !l113; - assign #T_INV sela = !PURE; - assign #T_INV tolu = !paru; - assign #T_AND tapa = sela && tolu; - assign #T_AND taru = wodu && tolu; - assign #T_INV vypu = !tolu; - assign #T_AND sepa = cpu_wr2 && ff41; - assign #T_INV ryve = !sepa; - assign #T_AO suko = (rugu && ropo) || (refe && int_oam) || (rufo && int_vbl) || (roxe && int_hbl); - assign #T_INV tuva = !suko; - assign #T_INV voty = !tuva; - assign #T_OR wego = tofu || voga; - assign #T_AND xajo = h[0] && h[3]; - assign #T_AND toba = wusa && clkpipe; - assign #T_AND tobe = cpu_rd2 && ff41; - assign #T_OR semu = toba || pova; - assign #T_INV vave = !tobe; - assign #T_NOR sadu = !(nxymu || paru); - assign #T_NOR xaty = !(acyl || nxymu); - assign #T_INV rypo = !semu; - assign #T_INV ryju = !sepa; - assign #T_TRI puzo = !vave ? !(!roxe) : 'z; - assign #T_TRI sasy = !vave ? !(!refe) : 'z; - assign #T_TRI pofo = !vave ? !(!rufo) : 'z; - assign #T_TRI pote = !vave ? !(!rugu) : 'z; - assign #T_TRI teby = tobe ? !sadu : 'z; - assign #T_TRI wuga = tobe ? !xaty : 'z; - assign #T_OR pago = nreset9 || ryju; - assign #T_TRI sego = tobe ? !nrupo : 'z; + assign xyvo = v[4] && v[7]; + assign xugu = !(h[0] && h[1] && h[2] && h[5] && h[7]); + assign xena = !fepo; + assign xano = !xugu; + assign paru = !(!popu); + assign wodu = xena && xano; + assign PURE = !l113; + assign sela = !PURE; + assign tolu = !paru; + assign tapa = sela && tolu; + assign taru = wodu && tolu; + assign vypu = !tolu; + assign sepa = cpu_wr2 && ff41; + assign ryve = !sepa; + assign suko = (rugu && ropo) || (refe && int_oam) || (rufo && int_vbl) || (roxe && int_hbl); + assign tuva = !suko; + assign voty = !tuva; + assign wego = tofu || voga; + assign xajo = h[0] && h[3]; + assign toba = wusa && clkpipe; + assign tobe = cpu_rd2 && ff41; + assign semu = toba || pova; + assign vave = !tobe; + assign sadu = !(nxymu || paru); + assign xaty = !(acyl || nxymu); + assign rypo = !semu; + assign ryju = !sepa; + assign puzo = !vave ? !(!roxe) : 'z; + assign sasy = !vave ? !(!refe) : 'z; + assign pofo = !vave ? !(!rufo) : 'z; + assign pote = !vave ? !(!rugu) : 'z; + assign teby = tobe ? !sadu : 'z; + assign wuga = tobe ? !xaty : 'z; + assign pago = nreset9 || ryju; + assign sego = tobe ? !nrupo : 'z; assign nnype = !nype; assign int_vbl = paru; assign int_oam = tapa; @@ -141,26 +141,26 @@ module video_control( dffr_bp dffr_tuky(toca, tady, sake, tuky); dffr_bp dffr_tako(toca, tady, tyge, tako); dffr_bp dffr_sybe(toca, tady, roku, sybe); - assign #T_NOR tady = !(atej || tofu); - assign #T_AND xuke = xeho && savy; - assign #T_AND xyle = xuke && xodu; - assign #T_XOR rybo = savy != xeho; - assign #T_XOR xegy = xodu != xuke; - assign #T_XOR xora = xydo != xyle; - assign #T_INV acam = !xeho; - assign #T_INV azub = !savy; - assign #T_INV amel = !xodu; - assign #T_INV ahal = !xydo; - assign #T_INV toca = !h[3]; - assign #T_AND tyba = tuhu && tuky; - assign #T_AND sury = tyba && tako; - assign #T_XOR sake = tuky != tuhu; - assign #T_XOR tyge = tako != tyba; - assign #T_XOR roku = sybe != sury; - assign #T_INV apux = !tuhu; - assign #T_INV abef = !tuky; - assign #T_INV adaz = !tako; - assign #T_INV asah = !sybe; + assign tady = !(atej || tofu); + assign xuke = xeho && savy; + assign xyle = xuke && xodu; + assign rybo = savy != xeho; + assign xegy = xodu != xuke; + assign xora = xydo != xyle; + assign acam = !xeho; + assign azub = !savy; + assign amel = !xodu; + assign ahal = !xydo; + assign toca = !h[3]; + assign tyba = tuhu && tuky; + assign sury = tyba && tako; + assign sake = tuky != tuhu; + assign tyge = tako != tyba; + assign roku = sybe != sury; + assign apux = !tuhu; + assign abef = !tuky; + assign adaz = !tako; + assign asah = !sybe; assign h[0] = xeho; assign h[1] = savy; assign h[2] = xodu; @@ -188,8 +188,8 @@ module video_control( dffr_bp dffr_lema(!lovu, lama, !lema, lema); dffr_bp dffr_mato(!lema, lama, !mato, mato); dffr_bp dffr_lafo(!mato, lama, !lafo, lafo); - assign #T_AND noko = v[7] && v[4] && v[3] && v[0]; - assign #T_NOR lama = !(myta || reset_video3); + assign noko = v[7] && v[4] && v[3] && v[0]; + assign lama = !(myta || reset_video3); assign v[0] = muwy; assign v[1] = myro; assign v[2] = lexa; diff --git a/dmg_cpu_b/pages/p22_ppu_decode.sv b/dmg_cpu_b/pages/p22_ppu_decode.sv index eb91ecb..5de1ad5 100644 --- a/dmg_cpu_b/pages/p22_ppu_decode.sv +++ b/dmg_cpu_b/pages/p22_ppu_decode.sv @@ -11,41 +11,41 @@ module ppu_decode( logic xaly, wutu, wero, xola, xeno, xusy, xera, wado, wesa, walo, wepo; logic weta, wyle, woru, wate, wyvo, wety, wofa, wavu, wage, webu, vama, wybo; logic xayo, xogy, voca, xeda, vyga, xayu, vary, xavy, vumy, xaro, tego, wera; - assign #T_NOR xaly = !(a[7] || a[5] || a[4]); - assign #T_NAND wutu = !(ffxx && a[6] && xaly); - assign #T_INV wero = !wutu; - assign #T_INV xola = !a[0]; - assign #T_INV xeno = !a[1]; - assign #T_INV xusy = !a[2]; - assign #T_INV xera = !a[3]; - assign #T_INV wado = !xola; - assign #T_INV wesa = !xeno; - assign #T_INV walo = !xusy; - assign #T_INV wepo = !xera; - assign #T_NAND weta = !(wero && xola && xeno && xusy && wepo); - assign #T_NAND wyle = !(wero && xola && xeno && walo && xera); - assign #T_NAND woru = !(wero && xola && xeno && xusy && xera); - assign #T_NAND wate = !(wero && xola && wesa && walo && xera); - assign #T_NAND wyvo = !(wero && xola && wesa && xusy && wepo); - assign #T_NAND wety = !(wero && wado && xeno && walo && xera); - assign #T_NAND wofa = !(wero && wado && xeno && xusy && xera); - assign #T_NAND wavu = !(wero && wado && wesa && xusy && xera); - assign #T_NAND wage = !(wero && wado && wesa && xusy && wepo); - assign #T_NAND webu = !(wero && xola && wesa && xusy && xera); - assign #T_NAND vama = !(wero && wado && xeno && xusy && wepo); - assign #T_NAND wybo = !(wero && wado && wesa && walo && xera); - assign #T_INV xayo = !weta; - assign #T_INV xogy = !wyle; - assign #T_INV voca = !woru; - assign #T_INV xeda = !wate; - assign #T_INV vyga = !wyvo; - assign #T_INV xayu = !wety; - assign #T_INV vary = !wofa; - assign #T_INV xavy = !wavu; - assign #T_INV vumy = !wage; - assign #T_INV xaro = !webu; - assign #T_INV tego = !vama; - assign #T_INV wera = !wybo; + assign xaly = !(a[7] || a[5] || a[4]); + assign wutu = !(ffxx && a[6] && xaly); + assign wero = !wutu; + assign xola = !a[0]; + assign xeno = !a[1]; + assign xusy = !a[2]; + assign xera = !a[3]; + assign wado = !xola; + assign wesa = !xeno; + assign walo = !xusy; + assign wepo = !xera; + assign weta = !(wero && xola && xeno && xusy && wepo); + assign wyle = !(wero && xola && xeno && walo && xera); + assign woru = !(wero && xola && xeno && xusy && xera); + assign wate = !(wero && xola && wesa && walo && xera); + assign wyvo = !(wero && xola && wesa && xusy && wepo); + assign wety = !(wero && wado && xeno && walo && xera); + assign wofa = !(wero && wado && xeno && xusy && xera); + assign wavu = !(wero && wado && wesa && xusy && xera); + assign wage = !(wero && wado && wesa && xusy && wepo); + assign webu = !(wero && xola && wesa && xusy && xera); + assign vama = !(wero && wado && xeno && xusy && wepo); + assign wybo = !(wero && wado && wesa && walo && xera); + assign xayo = !weta; + assign xogy = !wyle; + assign voca = !woru; + assign xeda = !wate; + assign vyga = !wyvo; + assign xayu = !wety; + assign vary = !wofa; + assign xavy = !wavu; + assign vumy = !wage; + assign xaro = !webu; + assign tego = !vama; + assign wera = !wybo; assign ff48 = xayo; assign ff44 = xogy; assign ff40 = voca; diff --git a/dmg_cpu_b/pages/p23_video_regs.sv b/dmg_cpu_b/pages/p23_video_regs.sv index b75c754..96f2b71 100644 --- a/dmg_cpu_b/pages/p23_video_regs.sv +++ b/dmg_cpu_b/pages/p23_video_regs.sv @@ -28,18 +28,18 @@ module video_regs( drlatch latch_muvo(!voxu, nreset8, d[6], muvo); drlatch latch_meby(!voxu, nreset8, d[3], meby); drlatch latch_noke(!voxu, nreset8, d[2], noke); - assign #T_AND wyze = cpu_rd2 && ff4b; - assign #T_AND wuza = cpu_wr2 && ff4b; - assign #T_INV vycu = !wyze; - assign #T_INV voxu = !wuza; - assign #T_TRI mufe = !vycu ? !(!myce) : 'z; - assign #T_TRI lova = !vycu ? !(!mypa) : 'z; - assign #T_TRI muka = !vycu ? !(!nofe) : 'z; - assign #T_TRI mara = !vycu ? !(!nuku) : 'z; - assign #T_TRI mele = !vycu ? !(!mypu) : 'z; - assign #T_TRI muly = !vycu ? !(!muvo) : 'z; - assign #T_TRI lole = !vycu ? !(!meby) : 'z; - assign #T_TRI moko = !vycu ? !(!noke) : 'z; + assign wyze = cpu_rd2 && ff4b; + assign wuza = cpu_wr2 && ff4b; + assign vycu = !wyze; + assign voxu = !wuza; + assign mufe = !vycu ? !(!myce) : 'z; + assign lova = !vycu ? !(!mypa) : 'z; + assign muka = !vycu ? !(!nofe) : 'z; + assign mara = !vycu ? !(!nuku) : 'z; + assign mele = !vycu ? !(!mypu) : 'z; + assign muly = !vycu ? !(!muvo) : 'z; + assign lole = !vycu ? !(!meby) : 'z; + assign moko = !vycu ? !(!noke) : 'z; assign ff4b_d5 = myce; assign ff4b_d0 = mypa; assign ff4b_d1 = nofe; @@ -67,18 +67,18 @@ module video_regs( drlatch latch_nuka(!vefu, nreset8, d[6], nuka); drlatch latch_nene(!vefu, nreset8, d[5], nene); drlatch latch_neso(!vefu, nreset8, d[0], neso); - assign #T_AND waxu = cpu_rd2 && ff4a; - assign #T_AND weko = cpu_wr2 && ff4a; - assign #T_INV vomy = !waxu; - assign #T_INV vefu = !weko; - assign #T_TRI mera = !vomy ? !(!nafu) : 'z; - assign #T_TRI loka = !vomy ? !(!mela) : 'z; - assign #T_TRI poda = !vomy ? !(!nyro) : 'z; - assign #T_TRI pygu = !vomy ? !(!naga) : 'z; - assign #T_TRI mega = !vomy ? !(!nulo) : 'z; - assign #T_TRI polo = !vomy ? !(!nuka) : 'z; - assign #T_TRI pela = !vomy ? !(!nene) : 'z; - assign #T_TRI punu = !vomy ? !(!neso) : 'z; + assign waxu = cpu_rd2 && ff4a; + assign weko = cpu_wr2 && ff4a; + assign vomy = !waxu; + assign vefu = !weko; + assign mera = !vomy ? !(!nafu) : 'z; + assign loka = !vomy ? !(!mela) : 'z; + assign poda = !vomy ? !(!nyro) : 'z; + assign pygu = !vomy ? !(!naga) : 'z; + assign mega = !vomy ? !(!nulo) : 'z; + assign polo = !vomy ? !(!nuka) : 'z; + assign pela = !vomy ? !(!nene) : 'z; + assign punu = !vomy ? !(!neso) : 'z; assign ff4a_d7 = nafu; assign ff4a_d3 = mela; assign ff4a_d1 = nyro; @@ -106,18 +106,18 @@ module video_regs( drlatch latch_duzu(!amun, nreset6, d[1], duzu); drlatch latch_daty(!amun, nreset6, d[0], daty); drlatch latch_gubo(!amun, nreset6, d[3], gubo); - assign #T_AND avog = ff43 && cpu_rd2; - assign #T_AND arur = ff43 && cpu_wr2; - assign #T_INV beba = !avog; - assign #T_INV amun = !arur; - assign #T_TRI cuga = !beba ? !(!cyxu) : 'z; - assign #T_TRI casy = !beba ? !(!bake) : 'z; - assign #T_TRI cedu = !beba ? !(!bemy) : 'z; - assign #T_TRI cata = !beba ? !(!cuzy) : 'z; - assign #T_TRI doxe = !beba ? !(!cabu) : 'z; - assign #T_TRI ekob = !beba ? !(!duzu) : 'z; - assign #T_TRI edos = !beba ? !(!daty) : 'z; - assign #T_TRI wony = !beba ? !(!gubo) : 'z; + assign avog = ff43 && cpu_rd2; + assign arur = ff43 && cpu_wr2; + assign beba = !avog; + assign amun = !arur; + assign cuga = !beba ? !(!cyxu) : 'z; + assign casy = !beba ? !(!bake) : 'z; + assign cedu = !beba ? !(!bemy) : 'z; + assign cata = !beba ? !(!cuzy) : 'z; + assign doxe = !beba ? !(!cabu) : 'z; + assign ekob = !beba ? !(!duzu) : 'z; + assign edos = !beba ? !(!daty) : 'z; + assign wony = !beba ? !(!gubo) : 'z; assign ff43_d2 = cyxu; assign ff43_d7 = bake; assign ff43_d4 = bemy; @@ -145,18 +145,18 @@ module video_regs( drlatch latch_fymo(!cavo, nreset6, d[1], fymo); drlatch latch_gave(!cavo, nreset6, d[0], gave); drlatch latch_fujo(!cavo, nreset6, d[3], fujo); - assign #T_AND anyp = cpu_rd2 && ff42; - assign #T_AND bedy = cpu_wr2 && ff42; - assign #T_INV buwy = !anyp; - assign #T_INV cavo = !bedy; - assign #T_TRI gonu = !buwy ? !(!fezu) : 'z; - assign #T_TRI gyza = !buwy ? !(!funy) : 'z; - assign #T_TRI cusa = !buwy ? !(!dede) : 'z; - assign #T_TRI gyzo = !buwy ? !(!foty) : 'z; - assign #T_TRI gune = !buwy ? !(!foha) : 'z; - assign #T_TRI goba = !buwy ? !(!fymo) : 'z; - assign #T_TRI ware = !buwy ? !(!gave) : 'z; - assign #T_TRI godo = !buwy ? !(!fujo) : 'z; + assign anyp = cpu_rd2 && ff42; + assign bedy = cpu_wr2 && ff42; + assign buwy = !anyp; + assign cavo = !bedy; + assign gonu = !buwy ? !(!fezu) : 'z; + assign gyza = !buwy ? !(!funy) : 'z; + assign cusa = !buwy ? !(!dede) : 'z; + assign gyzo = !buwy ? !(!foty) : 'z; + assign gune = !buwy ? !(!foha) : 'z; + assign goba = !buwy ? !(!fymo) : 'z; + assign ware = !buwy ? !(!gave) : 'z; + assign godo = !buwy ? !(!fujo) : 'z; assign ff42_d2 = fezu; assign ff42_d7 = funy; assign ff42_d4 = dede; @@ -184,19 +184,19 @@ module video_regs( drlatch latch_wexu(!xubo, xare, d[4], wexu); drlatch latch_woky(!xubo, xare, d[6], woky); drlatch latch_vyxe(!xubo, xare, d[0], vyxe); - assign #T_AND vyre = ff40 && cpu_rd2; - assign #T_AND waru = ff40 && cpu_wr2; - assign #T_INV wyce = !vyre; - assign #T_INV xubo = !waru; - assign #T_INV xare = !reset7; - assign #T_TRI xero = !wyce ? !(!xylo) : 'z; - assign #T_TRI wuka = !wyce ? !(!xafo) : 'z; - assign #T_TRI wyju = !wyce ? !(!xymo) : 'z; - assign #T_TRI xebu = !wyce ? !(!xona) : 'z; - assign #T_TRI vato = !wyce ? !(!wymo) : 'z; - assign #T_TRI voke = !wyce ? !(!wexu) : 'z; - assign #T_TRI vaha = !wyce ? !(!woky) : 'z; - assign #T_TRI wypo = !wyce ? !(!vyxe) : 'z; + assign vyre = ff40 && cpu_rd2; + assign waru = ff40 && cpu_wr2; + assign wyce = !vyre; + assign xubo = !waru; + assign xare = !reset7; + assign xero = !wyce ? !(!xylo) : 'z; + assign wuka = !wyce ? !(!xafo) : 'z; + assign wyju = !wyce ? !(!xymo) : 'z; + assign xebu = !wyce ? !(!xona) : 'z; + assign vato = !wyce ? !(!wymo) : 'z; + assign voke = !wyce ? !(!wexu) : 'z; + assign vaha = !wyce ? !(!woky) : 'z; + assign wypo = !wyce ? !(!vyxe) : 'z; assign ff40_d1 = xylo; assign ff40_d3 = xafo; assign ff40_d2 = xymo; @@ -224,18 +224,18 @@ module video_regs( drlatch latch_vafa(!wane, nreset9, d[5], vafa); drlatch latch_vuce(!wane, nreset9, d[1], vuce); drlatch latch_raha(!wane, nreset9, d[7], raha); - assign #T_AND xyly = cpu_rd2 && ff45; - assign #T_AND xufa = cpu_wr2 && ff45; - assign #T_INV weku = !xyly; - assign #T_INV wane = !xufa; - assign #T_TRI race = !weku ? !(!sota) : 'z; - assign #T_TRI retu = !weku ? !(!syry) : 'z; - assign #T_TRI redy = !weku ? !(!salo) : 'z; - assign #T_TRI razu = !weku ? !(!sedy) : 'z; - assign #T_TRI vafe = !weku ? !(!vevo) : 'z; - assign #T_TRI vazu = !weku ? !(!vafa) : 'z; - assign #T_TRI vojo = !weku ? !(!vuce) : 'z; - assign #T_TRI pufy = !weku ? !(!raha) : 'z; + assign xyly = cpu_rd2 && ff45; + assign xufa = cpu_wr2 && ff45; + assign weku = !xyly; + assign wane = !xufa; + assign race = !weku ? !(!sota) : 'z; + assign retu = !weku ? !(!syry) : 'z; + assign redy = !weku ? !(!salo) : 'z; + assign razu = !weku ? !(!sedy) : 'z; + assign vafe = !weku ? !(!vevo) : 'z; + assign vazu = !weku ? !(!vafa) : 'z; + assign vojo = !weku ? !(!vuce) : 'z; + assign pufy = !weku ? !(!raha) : 'z; assign ff45_d4 = sota; assign ff45_d0 = syry; assign ff45_d3 = salo; @@ -255,24 +255,24 @@ module video_regs( logic wafu, varo, wata, xaga, xepo, xuhy, xowo, xuce, wury, myfa; logic vyne, wama, wuva, wojy, weze, wavo, vega, lyco; - assign #T_AND wafu = cpu_rd2 && ff44; - assign #T_INV varo = !wafu; - assign #T_INV wata = !v[4]; - assign #T_INV xaga = !v[5]; - assign #T_INV xepo = !v[1]; - assign #T_INV xuhy = !v[3]; - assign #T_INV xowo = !v[7]; - assign #T_INV xuce = !v[6]; - assign #T_INV wury = !v[0]; - assign #T_INV myfa = !v[2]; - assign #T_TRI vyne = !varo ? !wata : 'z; - assign #T_TRI wama = !varo ? !xaga : 'z; - assign #T_TRI wuva = !varo ? !xepo : 'z; - assign #T_TRI wojy = !varo ? !xuhy : 'z; - assign #T_TRI weze = !varo ? !xowo : 'z; - assign #T_TRI wavo = !varo ? !xuce : 'z; - assign #T_TRI vega = !varo ? !wury : 'z; - assign #T_TRI lyco = !varo ? !myfa : 'z; + assign wafu = cpu_rd2 && ff44; + assign varo = !wafu; + assign wata = !v[4]; + assign xaga = !v[5]; + assign xepo = !v[1]; + assign xuhy = !v[3]; + assign xowo = !v[7]; + assign xuce = !v[6]; + assign wury = !v[0]; + assign myfa = !v[2]; + assign vyne = !varo ? !wata : 'z; + assign wama = !varo ? !xaga : 'z; + assign wuva = !varo ? !xepo : 'z; + assign wojy = !varo ? !xuhy : 'z; + assign weze = !varo ? !xowo : 'z; + assign wavo = !varo ? !xuce : 'z; + assign vega = !varo ? !wury : 'z; + assign lyco = !varo ? !myfa : 'z; assign d[4] = vyne; assign d[5] = wama; assign d[1] = wuva; diff --git a/dmg_cpu_b/pages/p24_lcd_control.sv b/dmg_cpu_b/pages/p24_lcd_control.sv index 45d753e..f25ba23 100644 --- a/dmg_cpu_b/pages/p24_lcd_control.sv +++ b/dmg_cpu_b/pages/p24_lcd_control.sv @@ -17,18 +17,18 @@ module lcd_control( logic lofu, luca, magu, lebe, meco, kebo, kasa, umob, usec, kedy, kahe, kupa, kymo, kofo; dffr_bp dffr_luca(lofu, nreset_video2, !luca, luca); dffr_bp dffr_lebe(!luca, nreset_video2, !lebe, lebe); - assign #T_INV lofu = !l113; - assign #T_XOR magu = napo != !luca; - assign #T_INV meco = !magu; - assign #T_INV kebo = !meco; - assign #T_INV kasa = !PURE; - assign #T_INV umob = !nff04_d0; - assign #T_INV usec = !nff04_d1; - assign #T_INV kedy = !ff40_d7; - assign #T_AO kahe = (ff40_d7 && kasa) || (kedy && umob); - assign #T_AO kupa = (ff40_d7 && kebo) || (kedy && usec); - assign #T_INV kymo = !kahe; - assign #T_INV kofo = !kupa; + assign lofu = !l113; + assign magu = napo != !luca; + assign meco = !magu; + assign kebo = !meco; + assign kasa = !PURE; + assign umob = !nff04_d0; + assign usec = !nff04_d1; + assign kedy = !ff40_d7; + assign kahe = (ff40_d7 && kasa) || (kedy && umob); + assign kupa = (ff40_d7 && kebo) || (kedy && usec); + assign kymo = !kahe; + assign kofo = !kupa; assign npin_cpl = kymo; assign npin_fr = kofo; @@ -38,27 +38,27 @@ module lcd_control( dffr_bp dffr_pygo(clk2, nxymu, pory, pygo); dffr_bp dffr_paho(roxo, nxymu, h[3], paho); nor_srlatch latch_poky(pygo, loby, poky,); - assign #T_INV loby = !nxymu; - assign #T_NOR nafy = !(loby || mosu); - assign #T_INV tomu = !sylo; - assign #T_INV socy = !tomu; - assign #T_NOR vybo = !(fepo || wodu || myvo); - assign #T_AND tyfa = socy && poky && vybo; - assign #T_INV segu = !tyfa; - assign #T_INV roxo = !segu; - assign #T_NOR pome = !(avap || pofy); - assign #T_OR sacu = segu || roxy; - assign #T_INV tofu = !nreset_video; - assign #T_OR ruju = paho || tofu || pome; - assign #T_INV pofy = !ruju; - assign #T_INV ruze = !pofy; + assign loby = !nxymu; + assign nafy = !(loby || mosu); + assign tomu = !sylo; + assign socy = !tomu; + assign vybo = !(fepo || wodu || myvo); + assign tyfa = socy && poky && vybo; + assign segu = !tyfa; + assign roxo = !segu; + assign pome = !(avap || pofy); + assign sacu = segu || roxy; + assign tofu = !nreset_video; + assign ruju = paho || tofu || pome; + assign pofy = !ruju; + assign ruze = !pofy; assign clkpipe = sacu; assign npin_st = ruze; logic neru, meda, mure; dffr_bp dffr_meda(nnype, nreset_video2, neru, meda); - assign #T_NOR neru = !(v[7] || v[4] || v[3] || v[0] || v[1] || v[2] || v[5] || v[6]); - assign #T_INV mure = !meda; + assign neru = !(v[7] || v[4] || v[3] || v[0] || v[1] || v[2] || v[5] || v[6]); + assign mure = !meda; assign npin_s = mure; endmodule diff --git a/dmg_cpu_b/pages/p25_vram_interface.sv b/dmg_cpu_b/pages/p25_vram_interface.sv index 2fbfd4e..1aed182 100644 --- a/dmg_cpu_b/pages/p25_vram_interface.sv +++ b/dmg_cpu_b/pages/p25_vram_interface.sv @@ -28,32 +28,32 @@ module vram_interface( logic reho, pony, ruma, pedu, ruky, nuva, vode, tago, vova, tujy, mume, luby, mewy; logic lefa, mysa, lalo, mepa, loly, mavu, luvo, myre, laca, masa, lozu, myfu, lexe; - assign #T_INV reho = !nma[12]; - assign #T_INV ruma = !nma[11]; - assign #T_INV ruky = !nma[10]; - assign #T_INV vode = !nma[9]; - assign #T_INV vova = !nma[8]; - assign #T_INV mume = !nma[7]; - assign #T_INV mewy = !nma[6]; - assign #T_INV mysa = !nma[5]; - assign #T_INV mepa = !nma[4]; - assign #T_INV mavu = !nma[3]; - assign #T_INV myre = !nma[2]; - assign #T_INV masa = !nma[1]; - assign #T_INV myfu = !nma[0]; - assign #T_INV pony = !reho; - assign #T_INV pedu = !ruma; - assign #T_INV nuva = !ruky; - assign #T_INV tago = !vode; - assign #T_INV tujy = !vova; - assign #T_INV luby = !mume; - assign #T_INV lefa = !mewy; - assign #T_INV lalo = !mysa; - assign #T_INV loly = !mepa; - assign #T_INV luvo = !mavu; - assign #T_INV laca = !myre; - assign #T_INV lozu = !masa; - assign #T_INV lexe = !myfu; + assign reho = !nma[12]; + assign ruma = !nma[11]; + assign ruky = !nma[10]; + assign vode = !nma[9]; + assign vova = !nma[8]; + assign mume = !nma[7]; + assign mewy = !nma[6]; + assign mysa = !nma[5]; + assign mepa = !nma[4]; + assign mavu = !nma[3]; + assign myre = !nma[2]; + assign masa = !nma[1]; + assign myfu = !nma[0]; + assign pony = !reho; + assign pedu = !ruma; + assign nuva = !ruky; + assign tago = !vode; + assign tujy = !vova; + assign luby = !mume; + assign lefa = !mewy; + assign lalo = !mysa; + assign loly = !mepa; + assign luvo = !mavu; + assign laca = !myre; + assign lozu = !masa; + assign lexe = !myfu; assign nma_out[12] = pony; assign nma_out[11] = pedu; assign nma_out[10] = nuva; @@ -69,14 +69,14 @@ module vram_interface( assign nma_out[0] = lexe; logic ryvo, rera, raby, rory, ruja, ravu, rafy, ruxa; - assign #T_NAND ryvo = !(d[5] && lula); - assign #T_NAND rera = !(d[3] && lula); - assign #T_NAND raby = !(d[2] && lula); - assign #T_NAND rory = !(d[4] && lula); - assign #T_NAND ruja = !(d[1] && lula); - assign #T_NAND ravu = !(d[7] && lula); - assign #T_NAND rafy = !(d[6] && lula); - assign #T_NAND ruxa = !(d[0] && lula); + assign ryvo = !(d[5] && lula); + assign rera = !(d[3] && lula); + assign raby = !(d[2] && lula); + assign rory = !(d[4] && lula); + assign ruja = !(d[1] && lula); + assign ravu = !(d[7] && lula); + assign rafy = !(d[6] && lula); + assign ruxa = !(d[0] && lula); assign d_a[5] = ryvo; assign d_a[3] = rera; assign d_a[2] = raby; @@ -87,63 +87,63 @@ module vram_interface( assign d_a[0] = ruxa; logic cufe, vape, aver, xujy, bycu; - assign #T_OAI cufe = !((saro || dma_run) && mopa_nphi); - assign #T_AND vape = tacu && tuvo; - assign #T_NAND aver = !(acyl && xyso); - assign #T_INV xujy = !vape; - assign #T_NAND bycu = !(cufe && xujy && aver); - assign #T_INV cota = !bycu; + assign cufe = !((saro || dma_run) && mopa_nphi); + assign vape = tacu && tuvo; + assign aver = !(acyl && xyso); + assign xujy = !vape; + assign bycu = !(cufe && xujy && aver); + assign cota = !bycu; logic tefa, sose, tuca, tuja, tegu, tavy, sycy, soto, tuto, sudo, tefy, sale, tyjy, tole; dffr_bp dffr_soto(sycy, nreset6, !soto, soto); - assign #T_INV syro = !nfexxffxx; - assign #T_NOR tefa = !(syro || texo); - assign #T_AND sose = a[15] && tefa; - assign #T_AND tuca = sose && abuz; - assign #T_AND tuja = sose && cpu_wr_sync; - assign #T_NAND tegu = !(sose && from_cpu3); - assign #T_INV tavy = !moe_in; - assign #T_INV sycy = !t1_nt2; - assign #T_AND tuto = t1_nt2 && !soto; - assign #T_INV sudo = !mwr_in; - assign #T_INV tefy = !mcs_in; - assign #T_MUX sale = tuto ? tavy : tegu; - assign #T_MUX tyjy = tuto ? sudo : tuja; - assign #T_MUX tole = tuto ? tefy : tuca; + assign syro = !nfexxffxx; + assign tefa = !(syro || texo); + assign sose = a[15] && tefa; + assign tuca = sose && abuz; + assign tuja = sose && cpu_wr_sync; + assign tegu = !(sose && from_cpu3); + assign tavy = !moe_in; + assign sycy = !t1_nt2; + assign tuto = t1_nt2 && !soto; + assign sudo = !mwr_in; + assign tefy = !mcs_in; + assign sale = tuto ? tavy : tegu; + assign tyjy = tuto ? sudo : tuja; + assign tole = tuto ? tefy : tuca; logic soho, rawa, raco, rylu, racu, apam, ruvy, sohy, sutu, sere, sazo, ropy, ryje, revo, rela, rocy; logic rena, rahu, rofa, rute, sema, sofy, taxy, sewo, tode, saha, refo, ragu, sysy, sety, soky; - assign #T_AND soho = tacu && texy; - assign #T_INV rawa = !soho; - assign #T_NAND rylu = !(sale && ropy); - assign #T_INV apam = !vram_to_oam; - assign #T_AND racu = rylu && rawa && myma && apam; - assign #T_INV raco = !tuto; - assign #T_INV ruvy = !sale; - assign #T_NOR sutu = !(lena || vram_to_oam || texy || sere); - assign #T_NAND sohy = !(tyjy && sere); - assign #T_INV ropy = !nxymu; - assign #T_AND sere = tole && ropy; - assign #T_AND sazo = ruvy && sere; - assign #T_INV ryje = !sazo; - assign #T_INV revo = !ryje; - assign #T_OR rela = revo || sazo; - assign #T_INV rena = !rela; - assign #T_INV rofa = !rena; - assign #T_AND rocy = sazo && revo; - assign #T_INV rahu = !rocy; - assign #T_OR rute = tuto || racu; - assign #T_AND sema = racu && raco; - assign #T_OR sofy = tuto || sohy; - assign #T_AND taxy = sohy && raco; - assign #T_OR sewo = tuto || sutu; - assign #T_AND tode = sutu && raco; - assign #T_INV saha = !rute; - assign #T_INV refo = !sema; - assign #T_INV ragu = !sofy; - assign #T_INV sysy = !taxy; - assign #T_INV sety = !sewo; - assign #T_INV soky = !tode; + assign soho = tacu && texy; + assign rawa = !soho; + assign rylu = !(sale && ropy); + assign apam = !vram_to_oam; + assign racu = rylu && rawa && myma && apam; + assign raco = !tuto; + assign ruvy = !sale; + assign sutu = !(lena || vram_to_oam || texy || sere); + assign sohy = !(tyjy && sere); + assign ropy = !nxymu; + assign sere = tole && ropy; + assign sazo = ruvy && sere; + assign ryje = !sazo; + assign revo = !ryje; + assign rela = revo || sazo; + assign rena = !rela; + assign rofa = !rena; + assign rocy = sazo && revo; + assign rahu = !rocy; + assign rute = tuto || racu; + assign sema = racu && raco; + assign sofy = tuto || sohy; + assign taxy = sohy && raco; + assign sewo = tuto || sutu; + assign tode = sutu && raco; + assign saha = !rute; + assign refo = !sema; + assign ragu = !sofy; + assign sysy = !taxy; + assign sety = !sewo; + assign soky = !tode; assign moe_d = saha; assign moe_a = refo; assign mwr_d = ragu; @@ -153,14 +153,14 @@ module vram_interface( assign md_b = rofa; logic raku, roce, remo, ropu, reta, rydo, rody, reba; - assign #T_TRI raku = rena ? !md_in[7] : 'z; - assign #T_TRI roce = rena ? !md_in[4] : 'z; - assign #T_TRI remo = rena ? !md_in[3] : 'z; - assign #T_TRI ropu = rena ? !md_in[5] : 'z; - assign #T_TRI reta = rena ? !md_in[6] : 'z; - assign #T_TRI rydo = rena ? !md_in[2] : 'z; - assign #T_TRI rody = rena ? !md_in[0] : 'z; - assign #T_TRI reba = rena ? !md_in[1] : 'z; + assign raku = rena ? !md_in[7] : 'z; + assign roce = rena ? !md_in[4] : 'z; + assign remo = rena ? !md_in[3] : 'z; + assign ropu = rena ? !md_in[5] : 'z; + assign reta = rena ? !md_in[6] : 'z; + assign rydo = rena ? !md_in[2] : 'z; + assign rody = rena ? !md_in[0] : 'z; + assign reba = rena ? !md_in[1] : 'z; assign md[7] = raku; assign md[4] = roce; assign md[3] = remo; @@ -172,16 +172,16 @@ module vram_interface( logic runy, tuso, sole, tahy, tesu, taxo, tovu, tazu, tewa, sosa, sedu; assign runy = 1; - assign #T_NOR tuso = !(t1_nt2 || bedo); - assign #T_INV sole = !tuso; - assign #T_TRIB tahy = !runy ? sole : 'z; - assign #T_TRIB tesu = !runy ? sole : 'z; - assign #T_TRIB taxo = !runy ? sole : 'z; - assign #T_TRIB tovu = !runy ? sole : 'z; - assign #T_TRIB tazu = !runy ? sole : 'z; - assign #T_TRIB tewa = !runy ? sole : 'z; - assign #T_TRIB sosa = !runy ? sole : 'z; - assign #T_TRIB sedu = !runy ? sole : 'z; + assign tuso = !(t1_nt2 || bedo); + assign sole = !tuso; + assign tahy = !runy ? sole : 'z; + assign tesu = !runy ? sole : 'z; + assign taxo = !runy ? sole : 'z; + assign tovu = !runy ? sole : 'z; + assign tazu = !runy ? sole : 'z; + assign tewa = !runy ? sole : 'z; + assign sosa = !runy ? sole : 'z; + assign sedu = !runy ? sole : 'z; assign d[4] = tahy; assign d[5] = tesu; assign d[3] = taxo; @@ -192,21 +192,21 @@ module vram_interface( assign d[2] = sedu; logic xane, xedu, xeca, xybo, rysu, ruse, rumo, xyne, xoba, xody, ryna, rese, xaky, xopo, xuxu; - assign #T_NOR xane = !(vram_to_oam || nxymu); - assign #T_INV xedu = !xane; - assign #T_TRI xeca = !xedu ? !a[4] : 'z; - assign #T_TRI xybo = !xedu ? !a[7] : 'z; - assign #T_TRI rysu = !xedu ? !a[8] : 'z; - assign #T_TRI ruse = !xedu ? !a[10] : 'z; - assign #T_TRI rumo = !xedu ? !a[12] : 'z; - assign #T_TRI xyne = !xedu ? !a[2] : 'z; - assign #T_TRI xoba = !xedu ? !a[5] : 'z; - assign #T_TRI xody = !xedu ? !a[3] : 'z; - assign #T_TRI ryna = !xedu ? !a[11] : 'z; - assign #T_TRI rese = !xedu ? !a[9] : 'z; - assign #T_TRI xaky = !xedu ? !a[0] : 'z; - assign #T_TRI xopo = !xedu ? !a[6] : 'z; - assign #T_TRI xuxu = !xedu ? !a[1] : 'z; + assign xane = !(vram_to_oam || nxymu); + assign xedu = !xane; + assign xeca = !xedu ? !a[4] : 'z; + assign xybo = !xedu ? !a[7] : 'z; + assign rysu = !xedu ? !a[8] : 'z; + assign ruse = !xedu ? !a[10] : 'z; + assign rumo = !xedu ? !a[12] : 'z; + assign xyne = !xedu ? !a[2] : 'z; + assign xoba = !xedu ? !a[5] : 'z; + assign xody = !xedu ? !a[3] : 'z; + assign ryna = !xedu ? !a[11] : 'z; + assign rese = !xedu ? !a[9] : 'z; + assign xaky = !xedu ? !a[0] : 'z; + assign xopo = !xedu ? !a[6] : 'z; + assign xuxu = !xedu ? !a[1] : 'z; assign nma[4] = xeca; assign nma[7] = xybo; assign nma[8] = rysu; @@ -223,23 +223,23 @@ module vram_interface( logic lyra, ryba, ruzy, rome, tehe, soca, ratu, tovo, saza; logic ropa, sywa, sugu, tute, temy, sajo, tuty, tawo; - assign #T_NAND lyra = !(t1_nt2 && roru); - assign #T_INV ryba = !d_in[7]; - assign #T_INV ruzy = !d_in[1]; - assign #T_INV rome = !d_in[2]; - assign #T_INV tehe = !d_in[4]; - assign #T_INV soca = !d_in[6]; - assign #T_INV ratu = !d_in[5]; - assign #T_INV tovo = !d_in[0]; - assign #T_INV saza = !d_in[3]; - assign #T_TRIB ropa = !lyra ? ryba : 'z; - assign #T_TRIB sywa = !lyra ? ruzy : 'z; - assign #T_TRIB sugu = !lyra ? rome : 'z; - assign #T_TRIB tute = !lyra ? tehe : 'z; - assign #T_TRIB temy = !lyra ? soca : 'z; - assign #T_TRIB sajo = !lyra ? ratu : 'z; - assign #T_TRIB tuty = !lyra ? tovo : 'z; - assign #T_TRIB tawo = !lyra ? saza : 'z; + assign lyra = !(t1_nt2 && roru); + assign ryba = !d_in[7]; + assign ruzy = !d_in[1]; + assign rome = !d_in[2]; + assign tehe = !d_in[4]; + assign soca = !d_in[6]; + assign ratu = !d_in[5]; + assign tovo = !d_in[0]; + assign saza = !d_in[3]; + assign ropa = !lyra ? ryba : 'z; + assign sywa = !lyra ? ruzy : 'z; + assign sugu = !lyra ? rome : 'z; + assign tute = !lyra ? tehe : 'z; + assign temy = !lyra ? soca : 'z; + assign sajo = !lyra ? ratu : 'z; + assign tuty = !lyra ? tovo : 'z; + assign tawo = !lyra ? saza : 'z; assign d[7] = ropa; assign d[1] = sywa; assign d[2] = sugu; @@ -250,23 +250,23 @@ module vram_interface( assign d[3] = tawo; logic rove, sefa, suna, sumo, suke, samo, sogo, sazu, sefu, rege, rada, ryro, ryze, reku, ryky, revu, razo; - assign #T_INV rove = !rahu; - assign #T_AND sefa = md[0] && rove; - assign #T_AND suna = md[3] && rove; - assign #T_AND sumo = md[4] && rove; - assign #T_AND suke = md[7] && rove; - assign #T_AND samo = md[6] && rove; - assign #T_AND sogo = md[1] && rove; - assign #T_AND sazu = md[5] && rove; - assign #T_AND sefu = md[2] && rove; - assign #T_INV rege = !sefa; - assign #T_INV rada = !suna; - assign #T_INV ryro = !sumo; - assign #T_INV ryze = !suke; - assign #T_INV reku = !samo; - assign #T_INV ryky = !sogo; - assign #T_INV revu = !sazu; - assign #T_INV razo = !sefu; + assign rove = !rahu; + assign sefa = md[0] && rove; + assign suna = md[3] && rove; + assign sumo = md[4] && rove; + assign suke = md[7] && rove; + assign samo = md[6] && rove; + assign sogo = md[1] && rove; + assign sazu = md[5] && rove; + assign sefu = md[2] && rove; + assign rege = !sefa; + assign rada = !suna; + assign ryro = !sumo; + assign ryze = !suke; + assign reku = !samo; + assign ryky = !sogo; + assign revu = !sazu; + assign razo = !sefu; assign md_a[0] = rege; assign md_a[3] = rada; assign md_a[4] = ryro; @@ -278,31 +278,31 @@ module vram_interface( logic cede, syzo, tune, sera, sysa, tube, sugy, ralo, tenu; logic bape, bypy, bomo, bubo, basa, betu, buma, baxu, basy, byny, bupy, buhu, wasa, wejo, cako, cyme; - assign #T_INV cede = !dma_addr_ext; - assign #T_INV syzo = !d_in[7]; - assign #T_INV tune = !d_in[1]; - assign #T_INV sera = !d_in[2]; - assign #T_INV sysa = !d_in[4]; - assign #T_INV tube = !d_in[6]; - assign #T_INV sugy = !d_in[5]; - assign #T_INV ralo = !d_in[0]; - assign #T_INV tenu = !d_in[3]; - assign #T_TRI bape = !cede ? !syzo : 'z; - assign #T_TRI bypy = !cede ? !syzo : 'z; - assign #T_TRI bomo = !cede ? !tune : 'z; - assign #T_TRI bubo = !cede ? !tune : 'z; - assign #T_TRI basa = !cede ? !sera : 'z; - assign #T_TRI betu = !cede ? !sera : 'z; - assign #T_TRI buma = !cede ? !sysa : 'z; - assign #T_TRI baxu = !cede ? !sysa : 'z; - assign #T_TRI basy = !cede ? !tube : 'z; - assign #T_TRI byny = !cede ? !tube : 'z; - assign #T_TRI bupy = !cede ? !sugy : 'z; - assign #T_TRI buhu = !cede ? !sugy : 'z; - assign #T_TRI wasa = !cede ? !ralo : 'z; - assign #T_TRI wejo = !cede ? !ralo : 'z; - assign #T_TRI cako = !cede ? !tenu : 'z; - assign #T_TRI cyme = !cede ? !tenu : 'z; + assign cede = !dma_addr_ext; + assign syzo = !d_in[7]; + assign tune = !d_in[1]; + assign sera = !d_in[2]; + assign sysa = !d_in[4]; + assign tube = !d_in[6]; + assign sugy = !d_in[5]; + assign ralo = !d_in[0]; + assign tenu = !d_in[3]; + assign bape = !cede ? !syzo : 'z; + assign bypy = !cede ? !syzo : 'z; + assign bomo = !cede ? !tune : 'z; + assign bubo = !cede ? !tune : 'z; + assign basa = !cede ? !sera : 'z; + assign betu = !cede ? !sera : 'z; + assign buma = !cede ? !sysa : 'z; + assign baxu = !cede ? !sysa : 'z; + assign basy = !cede ? !tube : 'z; + assign byny = !cede ? !tube : 'z; + assign bupy = !cede ? !sugy : 'z; + assign buhu = !cede ? !sugy : 'z; + assign wasa = !cede ? !ralo : 'z; + assign wejo = !cede ? !ralo : 'z; + assign cako = !cede ? !tenu : 'z; + assign cyme = !cede ? !tenu : 'z; assign oam_b_nd[7] = bape; assign oam_a_nd[7] = bypy; assign oam_b_nd[1] = bomo; @@ -321,24 +321,24 @@ module vram_interface( assign oam_a_nd[3] = cyme; logic tyvy, seby, roro, rery, rona, runa, runo, same, sana, rabo, rexu, ruga, rybu, rota, raju, toku, tyja, rupy; - assign #T_NAND tyvy = !(sere && leko); - assign #T_INV seby = !tyvy; - assign #T_INV roro = !md[5]; - assign #T_INV rery = !md[0]; - assign #T_INV rona = !md[2]; - assign #T_INV runa = !md[1]; - assign #T_INV runo = !md[3]; - assign #T_INV same = !md[7]; - assign #T_INV sana = !md[4]; - assign #T_INV rabo = !md[6]; - assign #T_TRI rexu = seby ? !roro : 'z; - assign #T_TRI ruga = seby ? !rery : 'z; - assign #T_TRI rybu = seby ? !rona : 'z; - assign #T_TRI rota = seby ? !runa : 'z; - assign #T_TRI raju = seby ? !runo : 'z; - assign #T_TRI toku = seby ? !same : 'z; - assign #T_TRI tyja = seby ? !sana : 'z; - assign #T_TRI rupy = seby ? !rabo : 'z; + assign tyvy = !(sere && leko); + assign seby = !tyvy; + assign roro = !md[5]; + assign rery = !md[0]; + assign rona = !md[2]; + assign runa = !md[1]; + assign runo = !md[3]; + assign same = !md[7]; + assign sana = !md[4]; + assign rabo = !md[6]; + assign rexu = seby ? !roro : 'z; + assign ruga = seby ? !rery : 'z; + assign rybu = seby ? !rona : 'z; + assign rota = seby ? !runa : 'z; + assign raju = seby ? !runo : 'z; + assign toku = seby ? !same : 'z; + assign tyja = seby ? !sana : 'z; + assign rupy = seby ? !rabo : 'z; assign d[5] = rexu; assign d[0] = ruga; assign d[2] = rybu; @@ -349,13 +349,13 @@ module vram_interface( assign d[6] = rupy; logic xonu, wudo, wawe, wolu, xucy, xeze; - assign #T_TRI xonu = !xucy ? !xuha : 'z; - assign #T_TRI wudo = !xucy ? !vyno : 'z; - assign #T_TRI wawe = !xucy ? !vujo : 'z; - assign #T_TRI wolu = !xucy ? !vymu : 'z; - assign #T_NAND xucy = !(neta && pore); - assign #T_AND xeze = potu && pore; - assign #T_INV wuko = !xeze; + assign xonu = !xucy ? !xuha : 'z; + assign wudo = !xucy ? !vyno : 'z; + assign wawe = !xucy ? !vujo : 'z; + assign wolu = !xucy ? !vymu : 'z; + assign xucy = !(neta && pore); + assign xeze = potu && pore; + assign wuko = !xeze; assign nma[0] = xonu; assign nma[1] = wudo; assign nma[2] = wawe; @@ -364,30 +364,30 @@ module vram_interface( logic teme, tewu, tygo, sote, seke, rujo, tofa, suza; logic synu, syma, roko, sybu, sako, sejy, sedo, sawu; logic rura, ruly, rare, rodu, rube, rumu, ryty, rady; - assign #T_TRIB teme = !rahu ? d[0] : 'z; - assign #T_TRIB tewu = !rahu ? d[1] : 'z; - assign #T_TRIB tygo = !rahu ? d[2] : 'z; - assign #T_TRIB sote = !rahu ? d[3] : 'z; - assign #T_TRIB seke = !rahu ? d[4] : 'z; - assign #T_TRIB rujo = !rahu ? d[5] : 'z; - assign #T_TRIB tofa = !rahu ? d[6] : 'z; - assign #T_TRIB suza = !rahu ? d[7] : 'z; - assign #T_OR synu = rahu || md[0]; - assign #T_OR syma = rahu || md[1]; - assign #T_OR roko = rahu || md[2]; - assign #T_OR sybu = rahu || md[3]; - assign #T_OR sako = rahu || md[4]; - assign #T_OR sejy = rahu || md[5]; - assign #T_OR sedo = rahu || md[6]; - assign #T_OR sawu = rahu || md[7]; - assign #T_INV rura = !synu; - assign #T_INV ruly = !syma; - assign #T_INV rare = !roko; - assign #T_INV rodu = !sybu; - assign #T_INV rube = !sako; - assign #T_INV rumu = !sejy; - assign #T_INV ryty = !sedo; - assign #T_INV rady = !sawu; + assign teme = !rahu ? d[0] : 'z; + assign tewu = !rahu ? d[1] : 'z; + assign tygo = !rahu ? d[2] : 'z; + assign sote = !rahu ? d[3] : 'z; + assign seke = !rahu ? d[4] : 'z; + assign rujo = !rahu ? d[5] : 'z; + assign tofa = !rahu ? d[6] : 'z; + assign suza = !rahu ? d[7] : 'z; + assign synu = rahu || md[0]; + assign syma = rahu || md[1]; + assign roko = rahu || md[2]; + assign sybu = rahu || md[3]; + assign sako = rahu || md[4]; + assign sejy = rahu || md[5]; + assign sedo = rahu || md[6]; + assign sawu = rahu || md[7]; + assign rura = !synu; + assign ruly = !syma; + assign rare = !roko; + assign rodu = !sybu; + assign rube = !sako; + assign rumu = !sejy; + assign ryty = !sedo; + assign rady = !sawu; assign md[0] = teme; assign md[1] = tewu; assign md[2] = tygo; @@ -406,16 +406,16 @@ module vram_interface( assign md_out[7] = rady; logic vuza, vury, tobo, suvo, reso, roha, rusa, vejy, sezu, vapy; - assign #T_NOR vuza = !(ff40_d4 || pyju); - assign #T_TRI vury = neta ? !vuza : 'z; - assign #T_TRI tobo = neta ? !pyju : 'z; - assign #T_TRI suvo = neta ? !powy : 'z; - assign #T_TRI reso = neta ? !poju : 'z; - assign #T_TRI roha = neta ? !pulo : 'z; - assign #T_TRI rusa = neta ? !poxa : 'z; - assign #T_TRI vejy = neta ? !pyzo : 'z; - assign #T_TRI sezu = neta ? !pozo : 'z; - assign #T_TRI vapy = neta ? !rawu : 'z; + assign vuza = !(ff40_d4 || pyju); + assign vury = neta ? !vuza : 'z; + assign tobo = neta ? !pyju : 'z; + assign suvo = neta ? !powy : 'z; + assign reso = neta ? !poju : 'z; + assign roha = neta ? !pulo : 'z; + assign rusa = neta ? !poxa : 'z; + assign vejy = neta ? !pyzo : 'z; + assign sezu = neta ? !pozo : 'z; + assign vapy = neta ? !rawu : 'z; assign nma[12] = vury; assign nma[11] = tobo; assign nma[10] = suvo; diff --git a/dmg_cpu_b/pages/p26_background.sv b/dmg_cpu_b/pages/p26_background.sv index 676a752..7bcfbaf 100644 --- a/dmg_cpu_b/pages/p26_background.sv +++ b/dmg_cpu_b/pages/p26_background.sv @@ -19,44 +19,44 @@ module background( logic atad, behu, apyh, babe, abod, bewy, byca, acul; logic atad_c, behu_c, apyh_c, babe_c, abod_c, bewy_c, byca_c, acul_c; logic amuv, coxo, cove, axep, afeb, alel, coly, ajan; - assign #T_INV axad = !pore; - assign #T_AND acen = potu && axad; - assign #T_AND asul = axad && neta; - assign #T_INV bafy = !acen; - assign #T_INV beje = !asul; - assign #T_HADD { fafo_c, fafo } = v[0] + ff42_d0; - assign #T_ADD { emux_c, emux } = v[1] + ff42_d1 + fafo_c; - assign #T_ADD { ecab_c, ecab } = v[2] + ff42_d2 + emux_c; - assign #T_ADD { etam_c, etam } = v[3] + ff42_d3 + ecab_c; - assign #T_ADD { doto_c, doto } = v[4] + ff42_d4 + etam_c; - assign #T_ADD { daba_c, daba } = v[5] + ff42_d5 + doto_c; - assign #T_ADD { efyk_c, efyk } = v[6] + ff42_d6 + daba_c; - assign #T_ADD { ejok_c, ejok } = v[7] + ff42_d7 + efyk_c; - assign #T_TRI asum = !beje ? !xuha : 'z; - assign #T_TRI evad = !beje ? !fafo : 'z; - assign #T_TRI dahu = !beje ? !emux : 'z; - assign #T_TRI dode = !beje ? !ecab : 'z; - assign #T_TRI duho = !bafy ? !etam : 'z; - assign #T_TRI CASE = !bafy ? !doto : 'z; - assign #T_TRI cypo = !bafy ? !daba : 'z; - assign #T_TRI ceta = !bafy ? !efyk : 'z; - assign #T_TRI dafe = !bafy ? !ejok : 'z; - assign #T_HADD { atad_c, atad } = h[0] + ff43_d0; - assign #T_ADD { behu_c, behu } = h[1] + ff43_d1 + atad_c; - assign #T_ADD { apyh_c, apyh } = h[2] + ff43_d2 + behu_c; - assign #T_ADD { babe_c, babe } = h[3] + ff43_d3 + apyh_c; - assign #T_ADD { abod_c, abod } = h[4] + ff43_d4 + babe_c; - assign #T_ADD { bewy_c, bewy } = h[5] + ff43_d5 + abod_c; - assign #T_ADD { byca_c, byca } = h[6] + ff43_d6 + bewy_c; - assign #T_ADD { acul_c, acul } = h[7] + ff43_d7 + byca_c; - assign #T_TRI amuv = !bafy ? !ff40_d3 : 'z; - assign #T_TRI coxo = !bafy ? !1 : 'z; - assign #T_TRI cove = !bafy ? !1 : 'z; - assign #T_TRI axep = !bafy ? !babe : 'z; - assign #T_TRI afeb = !bafy ? !abod : 'z; - assign #T_TRI alel = !bafy ? !bewy : 'z; - assign #T_TRI coly = !bafy ? !byca : 'z; - assign #T_TRI ajan = !bafy ? !acul : 'z; + assign axad = !pore; + assign acen = potu && axad; + assign asul = axad && neta; + assign bafy = !acen; + assign beje = !asul; + assign { fafo_c, fafo } = v[0] + ff42_d0; + assign { emux_c, emux } = v[1] + ff42_d1 + fafo_c; + assign { ecab_c, ecab } = v[2] + ff42_d2 + emux_c; + assign { etam_c, etam } = v[3] + ff42_d3 + ecab_c; + assign { doto_c, doto } = v[4] + ff42_d4 + etam_c; + assign { daba_c, daba } = v[5] + ff42_d5 + doto_c; + assign { efyk_c, efyk } = v[6] + ff42_d6 + daba_c; + assign { ejok_c, ejok } = v[7] + ff42_d7 + efyk_c; + assign asum = !beje ? !xuha : 'z; + assign evad = !beje ? !fafo : 'z; + assign dahu = !beje ? !emux : 'z; + assign dode = !beje ? !ecab : 'z; + assign duho = !bafy ? !etam : 'z; + assign CASE = !bafy ? !doto : 'z; + assign cypo = !bafy ? !daba : 'z; + assign ceta = !bafy ? !efyk : 'z; + assign dafe = !bafy ? !ejok : 'z; + assign { atad_c, atad } = h[0] + ff43_d0; + assign { behu_c, behu } = h[1] + ff43_d1 + atad_c; + assign { apyh_c, apyh } = h[2] + ff43_d2 + behu_c; + assign { babe_c, babe } = h[3] + ff43_d3 + apyh_c; + assign { abod_c, abod } = h[4] + ff43_d4 + babe_c; + assign { bewy_c, bewy } = h[5] + ff43_d5 + abod_c; + assign { byca_c, byca } = h[6] + ff43_d6 + bewy_c; + assign { acul_c, acul } = h[7] + ff43_d7 + byca_c; + assign amuv = !bafy ? !ff40_d3 : 'z; + assign coxo = !bafy ? !1 : 'z; + assign cove = !bafy ? !1 : 'z; + assign axep = !bafy ? !babe : 'z; + assign afeb = !bafy ? !abod : 'z; + assign alel = !bafy ? !bewy : 'z; + assign coly = !bafy ? !byca : 'z; + assign ajan = !bafy ? !acul : 'z; assign nma[0] = asum; assign nma[1] = evad; assign nma[2] = dahu; @@ -87,29 +87,29 @@ module background( dffsr dffsr_woda(clkpipe, xely, wuja, xete, woda); dffsr dffsr_vumo(clkpipe, tyko, tena, woda, vumo); dffsr dffsr_vava(clkpipe, tuwu, wubu, vumo, vava); - assign #T_INV xoga = !ndepo; - assign #T_INV xura = !ndepo; - assign #T_INV tajo = !ndepo; - assign #T_INV xenu = !ndepo; - assign #T_INV xyke = !ndepo; - assign #T_INV xaba = !ndepo; - assign #T_INV tafu = !ndepo; - assign #T_INV xuho = !ndepo; - assign #T_NAND tede = !(ndepo && lesy); - assign #T_NAND woka = !(xoga && lesy); - assign #T_NAND xala = !(ndepo && lota); - assign #T_NAND wede = !(xura && lota); - assign #T_NAND tyra = !(ndepo && lyku); - assign #T_NAND tufo = !(tajo && lyku); - assign #T_NAND xyru = !(ndepo && roby); - assign #T_NAND wevo = !(xenu && roby); - assign #T_NAND xuku = !(ndepo && tyta); - assign #T_NAND wedy = !(xyke && tyta); - assign #T_NAND xely = !(ndepo && tyco); - assign #T_NAND wuja = !(xaba && tyco); - assign #T_NAND tyko = !(ndepo && soka); - assign #T_NAND tena = !(tafu && soka); - assign #T_NAND tuwu = !(ndepo && xovu); - assign #T_NAND wubu = !(xuho && xovu); + assign xoga = !ndepo; + assign xura = !ndepo; + assign tajo = !ndepo; + assign xenu = !ndepo; + assign xyke = !ndepo; + assign xaba = !ndepo; + assign tafu = !ndepo; + assign xuho = !ndepo; + assign tede = !(ndepo && lesy); + assign woka = !(xoga && lesy); + assign xala = !(ndepo && lota); + assign wede = !(xura && lota); + assign tyra = !(ndepo && lyku); + assign tufo = !(tajo && lyku); + assign xyru = !(ndepo && roby); + assign wevo = !(xenu && roby); + assign xuku = !(ndepo && tyta); + assign wedy = !(xyke && tyta); + assign xely = !(ndepo && tyco); + assign wuja = !(xaba && tyco); + assign tyko = !(ndepo && soka); + assign tena = !(tafu && soka); + assign tuwu = !(ndepo && xovu); + assign wubu = !(xuho && xovu); endmodule diff --git a/dmg_cpu_b/pages/p27_window_map_lookup.sv b/dmg_cpu_b/pages/p27_window_map_lookup.sv index 30fc433..3a22c8e 100644 --- a/dmg_cpu_b/pages/p27_window_map_lookup.sv +++ b/dmg_cpu_b/pages/p27_window_map_lookup.sv @@ -22,29 +22,29 @@ module window_map_lookup( dffr_bp dffr_sobu(clk5, '1, teky, sobu); dffr_bp dffr_suda(clk4, '1, sobu, suda); nand_srlatch latch_taka(seca, veku, taka,); - assign #T_NOR veku = !(wuty || tave); - assign #T_INV tuku = !tomu; - assign #T_INV sowo = !taka; - assign #T_AND teky = fepo && tuku && lyry && sowo; - assign #T_INV rosy = !nreset_video; - assign #T_AND ryce = !suda && sobu; - assign #T_NOR seca = !(ryce || rosy || atej); + assign veku = !(wuty || tave); + assign tuku = !tomu; + assign sowo = !taka; + assign teky = fepo && tuku && lyry && sowo; + assign rosy = !nreset_video; + assign ryce = !suda && sobu; + assign seca = !(ryce || rosy || atej); logic nojo, paga, pezo, nupa, naze, pebo, pomo, nevu; logic palo, nele, pafu, roge, sary; dffr_bp dffr_sary(talu, nreset_video, roge, sary); - assign #T_XNOR nojo = ff4a_d4 == v[4]; - assign #T_XNOR paga = ff4a_d5 == v[5]; - assign #T_XNOR pezo = ff4a_d6 == v[6]; - assign #T_XNOR nupa = ff4a_d7 == v[7]; - assign #T_XNOR naze = ff4a_d0 == v[0]; - assign #T_XNOR pebo = ff4a_d1 == v[1]; - assign #T_XNOR pomo = ff4a_d2 == v[2]; - assign #T_XNOR nevu = ff4a_d3 == v[3]; - assign #T_NAND palo = !(ff40_d5 && nojo && paga && pezo && nupa); - assign #T_INV nele = !palo; - assign #T_NAND pafu = !(nele && naze && pebo && pomo && nevu); - assign #T_INV roge = !pafu; + assign nojo = ff4a_d4 == v[4]; + assign paga = ff4a_d5 == v[5]; + assign pezo = ff4a_d6 == v[6]; + assign nupa = ff4a_d7 == v[7]; + assign naze = ff4a_d0 == v[0]; + assign pebo = ff4a_d1 == v[1]; + assign pomo = ff4a_d2 == v[2]; + assign nevu = ff4a_d3 == v[3]; + assign palo = !(ff40_d5 && nojo && paga && pezo && nupa); + assign nele = !palo; + assign pafu = !(nele && naze && pebo && pomo && nevu); + assign roge = !pafu; logic lebo, laxe, lyzu, laxu, mesu, nyva, lovy, myso; logic nako, nofu, moce, lury, nogu, lony, neny, lusu; @@ -54,25 +54,25 @@ module window_map_lookup( dffr_bp dffr_nyva(!mesu, nyxu, !nyva, nyva); dffr_bp dffr_lovy(myvo, nyxu, lyry, lovy); nand_srlatch latch_lony(nyxu, lury, lony,); - assign #T_NAND lebo = !(clk2 && moce); - assign #T_INV myvo = !clk2; - assign #T_INV lyry = !moce; - assign #T_INV laxe = !laxu; - assign #T_NOR myso = !(loby || laxe || lyzu); - assign #T_INV nako = !mesu; - assign #T_INV nofu = !nyva; - assign #T_NAND moce = !(nyva && nyxu && laxu); - assign #T_AND lury = !lovy && nxymu; - assign #T_AND mofu = nako && myso; - assign #T_NAND nogu = !(nako && nofu); - assign #T_NAND nydy = !(myso && mesu && nofu); - assign #T_INV xuha = !nofu; - assign #T_INV neny = !nogu; - assign #T_INV myma = !lony; - assign #T_INV lusu = !lony; - assign #T_AND potu = neny && lena; - assign #T_AND neta = nogu && lena; - assign #T_INV lena = !lusu; + assign lebo = !(clk2 && moce); + assign myvo = !clk2; + assign lyry = !moce; + assign laxe = !laxu; + assign myso = !(loby || laxe || lyzu); + assign nako = !mesu; + assign nofu = !nyva; + assign moce = !(nyva && nyxu && laxu); + assign lury = !lovy && nxymu; + assign mofu = nako && myso; + assign nogu = !(nako && nofu); + assign nydy = !(myso && mesu && nofu); + assign xuha = !nofu; + assign neny = !nogu; + assign myma = !lony; + assign lusu = !lony; + assign potu = neny && lena; + assign neta = nogu && lena; + assign lena = !lusu; logic repu, rejo, nezo, nory, nono, pase, mylo, puwu, puho, nytu; logic puky, nufa, nogy, nuko, nopa, nuny, nyfo; @@ -111,68 +111,68 @@ module window_map_lookup( nor_srlatch latch_rejo(sary, repu, rejo,); nor_srlatch latch_pynu(nunu, xofo, pynu,); nor_srlatch latch_roxy(paha, pova, roxy,); - assign #T_OR repu = int_vbl || reset_video2; - assign #T_XNOR nezo = ff4b_d4 == h[4]; - assign #T_XNOR nory = ff4b_d5 == h[5]; - assign #T_XNOR nono = ff4b_d6 == h[6]; - assign #T_XNOR pase = ff4b_d7 == h[7]; - assign #T_XNOR mylo = ff4b_d0 == h[0]; - assign #T_XNOR puwu = ff4b_d1 == h[1]; - assign #T_XNOR puho = ff4b_d2 == h[2]; - assign #T_XNOR nytu = ff4b_d3 == h[3]; - assign #T_NAND puky = !(rejo && nezo && nory && nono && pase); - assign #T_INV nufa = !puky; - assign #T_NAND nogy = !(nufa && mylo && puwu && puho && nytu); - assign #T_INV nuko = !nogy; - assign #T_AND nuny = pynu && !nopa; - assign #T_INV nyfo = !nuny; - assign #T_INV mosu = !nyfo; - assign #T_NOR nyxu = !(avap || mosu || tevo); - assign #T_INV roco = !segu; - assign #T_INV mehe = !clk2; - assign #T_INV nocu = !pynu; - assign #T_INV pore = !nocu; - assign #T_INV wazy = !pore; - assign #T_INV syny = !repu; - assign #T_INV paha = !nxymu; - assign #T_NOR paso = !(paha || tevo); - assign #T_NAND pecu = !(roxo && roze); - assign #T_NAND roze = !(rubu && roga && ryku); - assign #T_XNOR suha = ff43_d0 == ryku; - assign #T_XNOR syby = ff43_d1 == roga; - assign #T_XNOR sozu = ff43_d2 == rubu; - assign #T_NAND rone = !(roxy && suha && syby && sozu); - assign #T_INV pohu = !rone; - assign #T_INV moxe = !clk2; - assign #T_AND pova = !nyze && puxa; - assign #T_NOR puku = !(nuny || rydy); - assign #T_NOR rydy = !(puku || pory || reset_video2); - assign #T_NOR pany = !(roze || nuko); - assign #T_NOR seko = !(!ryfa || rene); - assign #T_OR tevo = seko || suzu || tave; - assign #T_AND vetu = tevo && pore; - assign #T_INV sylo = !rydy; - assign #T_NAND tuxy = !(sovy && sylo); - assign #T_INV suzu = !tuxy; - assign #T_INV romo = !poky; - assign #T_NAND suvu = !(nxymu && romo && nyka && pory); - assign #T_INV tave = !suvu; - assign #T_INV xahy = !atej; - assign #T_NAND xofo = !(ff40_d5 && xahy && nreset_video); - assign #T_INV xaco = !xofo; - assign #T_TRI vevy = !wuko ? !ff40_d6 : 'z; - assign #T_TRI vogu = !wuko ? !1 : 'z; - assign #T_TRI veza = !wuko ? !1 : 'z; - assign #T_TRI vyto = !wuko ? !tufu : 'z; - assign #T_TRI veha = !wuko ? !taxa : 'z; - assign #T_TRI vace = !wuko ? !tozo : 'z; - assign #T_TRI vovo = !wuko ? !tate : 'z; - assign #T_TRI vulo = !wuko ? !teke : 'z; - assign #T_TRI xeja = !wuko ? !wyka : 'z; - assign #T_TRI xamo = !wuko ? !wody : 'z; - assign #T_TRI xahe = !wuko ? !wobo : 'z; - assign #T_TRI xulo = !wuko ? !wyko : 'z; - assign #T_TRI wuju = !wuko ? !xolo : 'z; + assign repu = int_vbl || reset_video2; + assign nezo = ff4b_d4 == h[4]; + assign nory = ff4b_d5 == h[5]; + assign nono = ff4b_d6 == h[6]; + assign pase = ff4b_d7 == h[7]; + assign mylo = ff4b_d0 == h[0]; + assign puwu = ff4b_d1 == h[1]; + assign puho = ff4b_d2 == h[2]; + assign nytu = ff4b_d3 == h[3]; + assign puky = !(rejo && nezo && nory && nono && pase); + assign nufa = !puky; + assign nogy = !(nufa && mylo && puwu && puho && nytu); + assign nuko = !nogy; + assign nuny = pynu && !nopa; + assign nyfo = !nuny; + assign mosu = !nyfo; + assign nyxu = !(avap || mosu || tevo); + assign roco = !segu; + assign mehe = !clk2; + assign nocu = !pynu; + assign pore = !nocu; + assign wazy = !pore; + assign syny = !repu; + assign paha = !nxymu; + assign paso = !(paha || tevo); + assign pecu = !(roxo && roze); + assign roze = !(rubu && roga && ryku); + assign suha = ff43_d0 == ryku; + assign syby = ff43_d1 == roga; + assign sozu = ff43_d2 == rubu; + assign rone = !(roxy && suha && syby && sozu); + assign pohu = !rone; + assign moxe = !clk2; + assign pova = !nyze && puxa; + assign puku = !(nuny || rydy); + assign rydy = !(puku || pory || reset_video2); + assign pany = !(roze || nuko); + assign seko = !(!ryfa || rene); + assign tevo = seko || suzu || tave; + assign vetu = tevo && pore; + assign sylo = !rydy; + assign tuxy = !(sovy && sylo); + assign suzu = !tuxy; + assign romo = !poky; + assign suvu = !(nxymu && romo && nyka && pory); + assign tave = !suvu; + assign xahy = !atej; + assign xofo = !(ff40_d5 && xahy && nreset_video); + assign xaco = !xofo; + assign vevy = !wuko ? !ff40_d6 : 'z; + assign vogu = !wuko ? !1 : 'z; + assign veza = !wuko ? !1 : 'z; + assign vyto = !wuko ? !tufu : 'z; + assign veha = !wuko ? !taxa : 'z; + assign vace = !wuko ? !tozo : 'z; + assign vovo = !wuko ? !tate : 'z; + assign vulo = !wuko ? !teke : 'z; + assign xeja = !wuko ? !wyka : 'z; + assign xamo = !wuko ? !wody : 'z; + assign xahe = !wuko ? !wobo : 'z; + assign xulo = !wuko ? !wyko : 'z; + assign wuju = !wuko ? !xolo : 'z; assign nma[10] = vevy; assign nma[12] = vogu; assign nma[11] = veza; diff --git a/dmg_cpu_b/pages/p28_oam.sv b/dmg_cpu_b/pages/p28_oam.sv index 75dd000..45a9c22 100644 --- a/dmg_cpu_b/pages/p28_oam.sv +++ b/dmg_cpu_b/pages/p28_oam.sv @@ -23,20 +23,20 @@ module oam( dffr_bp dffr_elyn(!goso, anom, !elyn, elyn); dffr_bp dffr_faha(!elyn, anom, !faha, faha); dffr_bp dffr_fony(!faha, anom, !fony, fony); - assign #T_AND feto = yfel && wewy && fony && goso; - assign #T_OR gava = feto || xupy; + assign feto = yfel && wewy && fony && goso; + assign gava = feto || xupy; logic awoh, abaf, anel, byha, amyg, abak; dffr_bp dffr_anel(awoh, abez, catu, anel); - assign #T_INV awoh = !xupy; - assign #T_INV abaf = !catu; - assign #T_OA byha = (anel || abaf) && abez; - assign #T_INV atej = !byha; - assign #T_INV amyg = !nreset_video; - assign #T_NOR anom = !(atej || reset_video); - assign #T_INV azyb = !atej; - assign #T_OR abak = atej || amyg; - assign #T_INV byva = !abak; + assign awoh = !xupy; + assign abaf = !catu; + assign byha = (anel || abaf) && abez; + assign atej = !byha; + assign amyg = !nreset_video; + assign anom = !(atej || reset_video); + assign azyb = !atej; + assign abak = atej || amyg; + assign byva = !abak; logic asen, boge, ajon, bete, apar, ajuj, asam, xyny, xuto, adah, wuje; logic wefy, bofe, ajep, xuja, bota, xupa, xuca, apag, asyt, xecy, azul; @@ -50,65 +50,65 @@ module oam( drlatch latch_xecy(waru, nreset7, d[7], xecy); nor_srlatch latch_besu(catu, asen, besu,); nor_srlatch latch_wuje(xyny, xuto, wuje,); - assign #T_OR asen = reset_video || avap; - assign #T_INV boge = !dma_run; - assign #T_AND ajon = nxymu && boge; - assign #T_AND acyl = boge && besu; - assign #T_INV bete = !ajon; - assign #T_INV apar = !acyl; - assign #T_NOR ajuj = !(dma_run || acyl || ajon); - assign #T_OR asam = acyl || nxymu || dma_run; - assign #T_INV xyny = !mopa_nphi; - assign #T_AND xuto = saro && cpu_wr2; - assign #T_AND amab = saro && ajuj; - assign #T_INV adah = !saro; - assign #T_AND wefy = tuvo && tyfo_nq; - assign #T_INV bofe = !caty; - assign #T_NAND ajep = !(acyl && xoce); - assign #T_INV xuja = !wefy; - assign #T_NAND bota = !(bofe && saro && cpu_rd2); - assign #T_INV xupa = !wuje; - assign #T_INV xuca = !waru; - assign #T_AO apag = (xupa && amab) || (ajuj && adah); - assign #T_AND asyt = ajep && xuja && bota; - assign #T_INV azul = !apag; - assign #T_INV bode = !asyt; - assign #T_INV yval = !bode; - assign #T_INV yryv = !yval; - assign #T_INV zodo = !yryv; - assign #T_INV azar = !vram_to_oam; - assign #T_TRI zaxa = !azul ? !d[0] : 'z; - assign #T_TRI zamy = !azul ? !d[0] : 'z; - assign #T_TRI zaky = !azul ? !d[1] : 'z; - assign #T_TRI zopu = !azul ? !d[1] : 'z; - assign #T_TRI wule = !azul ? !d[2] : 'z; - assign #T_TRI wyky = !azul ? !d[2] : 'z; - assign #T_TRI zozo = !azul ? !d[3] : 'z; - assign #T_TRI zaja = !azul ? !d[3] : 'z; - assign #T_TRI zufo = !azul ? !d[4] : 'z; - assign #T_TRI zuga = !azul ? !d[4] : 'z; - assign #T_TRI zato = !azul ? !d[5] : 'z; - assign #T_TRI zumo = !azul ? !d[5] : 'z; - assign #T_TRI yvuc = !azul ? !d[6] : 'z; - assign #T_TRI xyto = !azul ? !d[6] : 'z; - assign #T_TRI zufe = !azul ? !d[7] : 'z; - assign #T_TRI zyfa = !azul ? !d[7] : 'z; - assign #T_TRI wuzu = !azar ? !md[0] : 'z; - assign #T_TRI wowa = !azar ? !md[0] : 'z; - assign #T_TRI axer = !azar ? !md[1] : 'z; - assign #T_TRI aveb = !azar ? !md[1] : 'z; - assign #T_TRI asox = !azar ? !md[2] : 'z; - assign #T_TRI amuh = !azar ? !md[2] : 'z; - assign #T_TRI cetu = !azar ? !md[3] : 'z; - assign #T_TRI cofo = !azar ? !md[3] : 'z; - assign #T_TRI aryn = !azar ? !md[4] : 'z; - assign #T_TRI azoz = !azar ? !md[4] : 'z; - assign #T_TRI acot = !azar ? !md[5] : 'z; - assign #T_TRI agyk = !azar ? !md[5] : 'z; - assign #T_TRI cuje = !azar ? !md[6] : 'z; - assign #T_TRI buse = !azar ? !md[6] : 'z; - assign #T_TRI ater = !azar ? !md[7] : 'z; - assign #T_TRI anum = !azar ? !md[7] : 'z; + assign asen = reset_video || avap; + assign boge = !dma_run; + assign ajon = nxymu && boge; + assign acyl = boge && besu; + assign bete = !ajon; + assign apar = !acyl; + assign ajuj = !(dma_run || acyl || ajon); + assign asam = acyl || nxymu || dma_run; + assign xyny = !mopa_nphi; + assign xuto = saro && cpu_wr2; + assign amab = saro && ajuj; + assign adah = !saro; + assign wefy = tuvo && tyfo_nq; + assign bofe = !caty; + assign ajep = !(acyl && xoce); + assign xuja = !wefy; + assign bota = !(bofe && saro && cpu_rd2); + assign xupa = !wuje; + assign xuca = !waru; + assign apag = (xupa && amab) || (ajuj && adah); + assign asyt = ajep && xuja && bota; + assign azul = !apag; + assign bode = !asyt; + assign yval = !bode; + assign yryv = !yval; + assign zodo = !yryv; + assign azar = !vram_to_oam; + assign zaxa = !azul ? !d[0] : 'z; + assign zamy = !azul ? !d[0] : 'z; + assign zaky = !azul ? !d[1] : 'z; + assign zopu = !azul ? !d[1] : 'z; + assign wule = !azul ? !d[2] : 'z; + assign wyky = !azul ? !d[2] : 'z; + assign zozo = !azul ? !d[3] : 'z; + assign zaja = !azul ? !d[3] : 'z; + assign zufo = !azul ? !d[4] : 'z; + assign zuga = !azul ? !d[4] : 'z; + assign zato = !azul ? !d[5] : 'z; + assign zumo = !azul ? !d[5] : 'z; + assign yvuc = !azul ? !d[6] : 'z; + assign xyto = !azul ? !d[6] : 'z; + assign zufe = !azul ? !d[7] : 'z; + assign zyfa = !azul ? !d[7] : 'z; + assign wuzu = !azar ? !md[0] : 'z; + assign wowa = !azar ? !md[0] : 'z; + assign axer = !azar ? !md[1] : 'z; + assign aveb = !azar ? !md[1] : 'z; + assign asox = !azar ? !md[2] : 'z; + assign amuh = !azar ? !md[2] : 'z; + assign cetu = !azar ? !md[3] : 'z; + assign cofo = !azar ? !md[3] : 'z; + assign aryn = !azar ? !md[4] : 'z; + assign azoz = !azar ? !md[4] : 'z; + assign acot = !azar ? !md[5] : 'z; + assign agyk = !azar ? !md[5] : 'z; + assign cuje = !azar ? !md[6] : 'z; + assign buse = !azar ? !md[6] : 'z; + assign ater = !azar ? !md[7] : 'z; + assign anum = !azar ? !md[7] : 'z; assign oam_addr_nrender = bete; assign oam_addr_nparse = apar; assign oam_addr_ncpu = asam; @@ -153,57 +153,57 @@ module oam( logic wacu, wydu, wuwe, fesa, zyfo, garo, geca, gefy, fodo, geka; logic mynu, wafo, guko, wuku, ylyc, ynyc, wume, wewu, zone, zofe; tri logic [7:0] oam_na; - assign #T_TRI foby = !oam_addr_ncpu ? !a[7] : 'z; - assign #T_TRI fyke = !oam_addr_nrender ? !weza : 'z; - assign #T_TRI goby = !oam_addr_nparse ? !fony : 'z; - assign #T_TRI fetu = !oam_addr_ndma ? !dma_a[7] : 'z; - assign #T_TRI waxa = !oam_addr_ncpu ? !a[6] : 'z; - assign #T_TRI fugu = !oam_addr_nrender ? !wuco : 'z; - assign #T_TRI gama = !oam_addr_nparse ? !faha : 'z; - assign #T_TRI fydu = !oam_addr_ndma ? !dma_a[6] : 'z; - assign #T_TRI gera = !oam_addr_ncpu ? !a[5] : 'z; - assign #T_TRI faco = !oam_addr_nrender ? !wyda : 'z; - assign #T_TRI faku = !oam_addr_nparse ? !elyn : 'z; - assign #T_TRI edol = !oam_addr_ndma ? !dma_a[5] : 'z; - assign #T_TRI fevu = !oam_addr_ncpu ? !a[4] : 'z; - assign #T_TRI faby = !oam_addr_nrender ? !zysu : 'z; - assign #T_TRI futo = !oam_addr_nparse ? !goso : 'z; - assign #T_TRI elug = !oam_addr_ndma ? !dma_a[4] : 'z; - assign #T_TRI wape = !oam_addr_ncpu ? !a[3] : 'z; - assign #T_TRI gyka = !oam_addr_nrender ? !wyse : 'z; - assign #T_TRI gema = !oam_addr_nparse ? !wewy : 'z; - assign #T_TRI fyky = !oam_addr_ndma ? !dma_a[3] : 'z; - assign #T_TRI gose = !oam_addr_ncpu ? !a[2] : 'z; - assign #T_TRI gybu = !oam_addr_nrender ? !wuzy : 'z; - assign #T_TRI guse = !oam_addr_nparse ? !yfel : 'z; - assign #T_TRI fago = !oam_addr_ndma ? !dma_a[2] : 'z; - assign #T_TRI wacu = !oam_addr_ncpu ? !a[1] : 'z; - assign #T_TRI wydu = !oam_addr_nrender ? !1 : 'z; - assign #T_TRI wuwe = !oam_addr_nparse ? !0 : 'z; - assign #T_TRI fesa = !oam_addr_ndma ? !dma_a[1] : 'z; - assign #T_TRI garo = !oam_addr_ncpu ? !a[0] : 'z; - assign #T_TRI geca = !oam_addr_nrender ? !1 : 'z; - assign #T_TRI gefy = !oam_addr_nparse ? !0 : 'z; - assign #T_TRI fodo = !oam_addr_ndma ? !dma_a[0] : 'z; - assign #T_INV yzet = !oam_na[7]; - assign #T_INV xemu = !oam_na[6]; - assign #T_INV ymev = !oam_na[5]; - assign #T_INV yvom = !oam_na[4]; - assign #T_INV yfoc = !oam_na[3]; - assign #T_INV yfot = !oam_na[2]; - assign #T_INV zyfo = !oam_na[1]; - assign #T_INV geka = !oam_na[0]; - assign #T_NAND mynu = !(cpu_rd2 && caty); - assign #T_INV leko = !mynu; - assign #T_INV wafo = !geka; - assign #T_AND guko = wafo && amab && leko; - assign #T_AND wuku = leko && amab && geka; - assign #T_AND ylyc = wyja && geka; - assign #T_AND ynyc = wafo && wyja; - assign #T_INV wume = !guko; - assign #T_INV wewu = !wuku; - assign #T_INV zone = !ylyc; - assign #T_INV zofe = !ynyc; + assign foby = !oam_addr_ncpu ? !a[7] : 'z; + assign fyke = !oam_addr_nrender ? !weza : 'z; + assign goby = !oam_addr_nparse ? !fony : 'z; + assign fetu = !oam_addr_ndma ? !dma_a[7] : 'z; + assign waxa = !oam_addr_ncpu ? !a[6] : 'z; + assign fugu = !oam_addr_nrender ? !wuco : 'z; + assign gama = !oam_addr_nparse ? !faha : 'z; + assign fydu = !oam_addr_ndma ? !dma_a[6] : 'z; + assign gera = !oam_addr_ncpu ? !a[5] : 'z; + assign faco = !oam_addr_nrender ? !wyda : 'z; + assign faku = !oam_addr_nparse ? !elyn : 'z; + assign edol = !oam_addr_ndma ? !dma_a[5] : 'z; + assign fevu = !oam_addr_ncpu ? !a[4] : 'z; + assign faby = !oam_addr_nrender ? !zysu : 'z; + assign futo = !oam_addr_nparse ? !goso : 'z; + assign elug = !oam_addr_ndma ? !dma_a[4] : 'z; + assign wape = !oam_addr_ncpu ? !a[3] : 'z; + assign gyka = !oam_addr_nrender ? !wyse : 'z; + assign gema = !oam_addr_nparse ? !wewy : 'z; + assign fyky = !oam_addr_ndma ? !dma_a[3] : 'z; + assign gose = !oam_addr_ncpu ? !a[2] : 'z; + assign gybu = !oam_addr_nrender ? !wuzy : 'z; + assign guse = !oam_addr_nparse ? !yfel : 'z; + assign fago = !oam_addr_ndma ? !dma_a[2] : 'z; + assign wacu = !oam_addr_ncpu ? !a[1] : 'z; + assign wydu = !oam_addr_nrender ? !1 : 'z; + assign wuwe = !oam_addr_nparse ? !0 : 'z; + assign fesa = !oam_addr_ndma ? !dma_a[1] : 'z; + assign garo = !oam_addr_ncpu ? !a[0] : 'z; + assign geca = !oam_addr_nrender ? !1 : 'z; + assign gefy = !oam_addr_nparse ? !0 : 'z; + assign fodo = !oam_addr_ndma ? !dma_a[0] : 'z; + assign yzet = !oam_na[7]; + assign xemu = !oam_na[6]; + assign ymev = !oam_na[5]; + assign yvom = !oam_na[4]; + assign yfoc = !oam_na[3]; + assign yfot = !oam_na[2]; + assign zyfo = !oam_na[1]; + assign geka = !oam_na[0]; + assign mynu = !(cpu_rd2 && caty); + assign leko = !mynu; + assign wafo = !geka; + assign guko = wafo && amab && leko; + assign wuku = leko && amab && geka; + assign ylyc = wyja && geka; + assign ynyc = wafo && wyja; + assign wume = !guko; + assign wewu = !wuku; + assign zone = !ylyc; + assign zofe = !ynyc; assign oam_na[7] = foby; assign oam_na[7] = fyke; assign oam_na[7] = goby; diff --git a/dmg_cpu_b/pages/p29_sprite_control.sv b/dmg_cpu_b/pages/p29_sprite_control.sv index 6ef839e..4872969 100644 --- a/dmg_cpu_b/pages/p29_sprite_control.sv +++ b/dmg_cpu_b/pages/p29_sprite_control.sv @@ -39,81 +39,81 @@ module sprite_control( dffr_bp dffr_egav(wuty, byva, emol, egav); dffr_bp dffr_cedy(wuty, byva, enut, cedy); dffr_bp dffr_eboj(wuty, byva, guva, eboj); - assign #T_INV byjo = !ceha; - assign #T_AND azem = byjo && nxymu; - assign #T_AND aror = azem && ff40_d1; - assign #T_NAND xage = !(aror && ynaz && ykok); - assign #T_NAND yloz = !(aror && zure && ywos); - assign #T_NAND dego = !(aror && ekes && cehu); - assign #T_NAND dydu = !(aror && ewam && cyvy); - assign #T_NAND ydug = !(aror && zako && xeba); - assign #T_NAND ygem = !(aror && ylev && ytub); - assign #T_NAND efyl = !(aror && feha && dama); - assign #T_NAND dyka = !(aror && cyco && daje); - assign #T_NAND ybez = !(aror && ydot && ywap); - assign #T_NAND egom = !(aror && fyma && cogy); - assign #T_NAND fefy = !(xage && yloz && dego && dydu && ydug); - assign #T_NAND fove = !(ygem && efyl && dyka && ybez && egom); - assign #T_OR fepo = fefy || fove; - assign #T_INV wefu = !ydug; - assign #T_OR geze = wefu || '0; - assign #T_NOR guva = !(ydug || '0); - assign #T_INV gaja = !dydu; - assign #T_OR fuma = gaja || geze; - assign #T_NOR enut = !(dydu || geze); - assign #T_INV gupo = !dego; - assign #T_OR gede = gupo || fuma; - assign #T_NOR emol = !(dego || fuma); - assign #T_INV webo = !yloz; - assign #T_OR wuto = webo || gede; - assign #T_NOR gyfy = !(yloz || gede); - assign #T_INV wuna = !xage; - assign #T_OR xyla = wuna || wuto; - assign #T_NOR gono = !(xage || wuto); - assign #T_INV gaba = !egom; - assign #T_OR weja = gaba || xyla; - assign #T_NOR gega = !(egom || xyla); - assign #T_INV wase = !ybez; - assign #T_OR wyla = wase || weja; - assign #T_NOR xoja = !(ybez || weja); - assign #T_INV gyte = !dyka; - assign #T_OR favo = gyte || wyla; - assign #T_NOR gutu = !(dyka || wyla); - assign #T_INV geke = !efyl; - assign #T_OR gyga = geke || favo; - assign #T_NOR foxa = !(efyl || favo); - assign #T_NOR guze = !(ygem || gyga); - assign #T_INV fado = !guze; - assign #T_INV deny = !foxa; - assign #T_INV gugy = !gutu; - assign #T_INV xyme = !xoja; - assign #T_INV gygy = !gega; - assign #T_INV gowo = !gono; - assign #T_INV gyma = !gyfy; - assign #T_INV fame = !emol; - assign #T_INV dydo = !enut; - assign #T_INV furo = !guva; - assign #T_INV dyba = !byva; - assign #T_OR dubu = dyba || fono; - assign #T_OR goro = dyba || exuq; - assign #T_OR guky = dyba || wapo; - assign #T_OR wacy = dyba || womy; - assign #T_OR feve = dyba || wafy; - assign #T_OR wohu = dyba || xudy; - assign #T_OR gake = dyba || gota; - assign #T_OR foko = dyba || egav; - assign #T_OR efev = dyba || cedy; - assign #T_OR dywe = dyba || eboj; - assign #T_INV dosy = !dubu; - assign #T_INV wuzo = !goro; - assign #T_INV gafy = !guky; - assign #T_INV xaho = !wacy; - assign #T_INV ejad = !feve; - assign #T_INV wunu = !wohu; - assign #T_INV wupa = !gake; - assign #T_INV gamy = !foko; - assign #T_INV doku = !efev; - assign #T_INV dyna = !dywe; + assign byjo = !ceha; + assign azem = byjo && nxymu; + assign aror = azem && ff40_d1; + assign xage = !(aror && ynaz && ykok); + assign yloz = !(aror && zure && ywos); + assign dego = !(aror && ekes && cehu); + assign dydu = !(aror && ewam && cyvy); + assign ydug = !(aror && zako && xeba); + assign ygem = !(aror && ylev && ytub); + assign efyl = !(aror && feha && dama); + assign dyka = !(aror && cyco && daje); + assign ybez = !(aror && ydot && ywap); + assign egom = !(aror && fyma && cogy); + assign fefy = !(xage && yloz && dego && dydu && ydug); + assign fove = !(ygem && efyl && dyka && ybez && egom); + assign fepo = fefy || fove; + assign wefu = !ydug; + assign geze = wefu || '0; + assign guva = !(ydug || '0); + assign gaja = !dydu; + assign fuma = gaja || geze; + assign enut = !(dydu || geze); + assign gupo = !dego; + assign gede = gupo || fuma; + assign emol = !(dego || fuma); + assign webo = !yloz; + assign wuto = webo || gede; + assign gyfy = !(yloz || gede); + assign wuna = !xage; + assign xyla = wuna || wuto; + assign gono = !(xage || wuto); + assign gaba = !egom; + assign weja = gaba || xyla; + assign gega = !(egom || xyla); + assign wase = !ybez; + assign wyla = wase || weja; + assign xoja = !(ybez || weja); + assign gyte = !dyka; + assign favo = gyte || wyla; + assign gutu = !(dyka || wyla); + assign geke = !efyl; + assign gyga = geke || favo; + assign foxa = !(efyl || favo); + assign guze = !(ygem || gyga); + assign fado = !guze; + assign deny = !foxa; + assign gugy = !gutu; + assign xyme = !xoja; + assign gygy = !gega; + assign gowo = !gono; + assign gyma = !gyfy; + assign fame = !emol; + assign dydo = !enut; + assign furo = !guva; + assign dyba = !byva; + assign dubu = dyba || fono; + assign goro = dyba || exuq; + assign guky = dyba || wapo; + assign wacy = dyba || womy; + assign feve = dyba || wafy; + assign wohu = dyba || xudy; + assign gake = dyba || gota; + assign foko = dyba || egav; + assign efev = dyba || cedy; + assign dywe = dyba || eboj; + assign dosy = !dubu; + assign wuzo = !goro; + assign gafy = !guky; + assign xaho = !wacy; + assign ejad = !feve; + assign wunu = !wohu; + assign wupa = !gake; + assign gamy = !foko; + assign doku = !efev; + assign dyna = !dywe; logic yceb, zuca, WONE, zaxe, xafu, yses, zeca, ydyv; logic xele, ypon, xuvo, zysa, yweg, xabu, ytux, yfap; @@ -143,64 +143,64 @@ module sprite_control( dlatch_b latch_yses(clk3, oam_b_nd[6], yses); dlatch_b latch_zeca(clk3, oam_b_nd[7], zeca); dlatch_b latch_ydyv(clk3, oam_b_nd[0], ydyv); - assign #T_TRIB xele = !oam_b_cpu_nrd ? !yceb : 'z; - assign #T_TRIB ypon = !oam_b_cpu_nrd ? !zuca : 'z; - assign #T_TRIB xuvo = !oam_b_cpu_nrd ? !WONE : 'z; - assign #T_TRIB zysa = !oam_b_cpu_nrd ? !zaxe : 'z; - assign #T_TRIB yweg = !oam_b_cpu_nrd ? !xafu : 'z; - assign #T_TRIB xabu = !oam_b_cpu_nrd ? !yses : 'z; - assign #T_TRIB ytux = !oam_b_cpu_nrd ? !zeca : 'z; - assign #T_TRIB yfap = !oam_b_cpu_nrd ? !ydyv : 'z; - assign #T_INV ywok = !cota; - assign #T_INV abon = !texy; - assign #T_TRI fugy = !abon ? !(!xegu) : 'z; - assign #T_TRI gavo = !abon ? !(!yjex) : 'z; - assign #T_TRI wyga = !abon ? !(!xyju) : 'z; - assign #T_TRI wune = !abon ? !(!ybog) : 'z; - assign #T_TRI gotu = !abon ? !(!wyso) : 'z; - assign #T_TRI gegu = !abon ? !(!xote) : 'z; - assign #T_TRI xehe = !abon ? !(!yzab) : 'z; - assign #T_INV ebos = !v[0]; - assign #T_INV dasa = !v[1]; - assign #T_INV fuky = !v[2]; - assign #T_INV fuve = !v[3]; - assign #T_INV fepu = !v[4]; - assign #T_INV fofa = !v[5]; - assign #T_INV femo = !v[6]; - assign #T_INV gusu = !v[7]; - assign #T_ADD { eruc_c, eruc } = ebos + !xuso + '0; - assign #T_ADD { enef_c, enef } = dasa + !xegu + eruc_c; - assign #T_ADD { feco_c, feco } = fuky + !yjex + enef_c; - assign #T_ADD { gyky_c, gyky } = fuve + !xyju + feco_c; - assign #T_ADD { gopu_c, gopu } = fepu + !ybog + gyky_c; - assign #T_ADD { fuwa_c, fuwa } = fofa + !wyso + gopu_c; - assign #T_ADD { goju_c, goju } = femo + !xote + fuwa_c; - assign #T_ADD { wuhu_c, wuhu } = gusu + !yzab + goju_c; - assign #T_INV dege = !eruc; - assign #T_INV daby = !enef; - assign #T_INV dabu = !feco; - assign #T_INV gysa = !gyky; - assign #T_INV gace = !gopu; - assign #T_INV guvu = !fuwa; - assign #T_INV gyda = !goju; - assign #T_INV gewy = !wuhu; - assign #T_OR govu = ff40_d2 || gyky; - assign #T_NAND wota = !(gace && guvu && gyda && gewy && wuhu_c && govu); - assign #T_INV gese = !wota; - assign #T_INV wuky = !nyzos; - assign #T_XOR wago = wuky != wenu; - assign #T_XOR cyvu = wuky != cucu; - assign #T_XOR bore = wuky != cuca; - assign #T_XOR buvy = wuky != cega; - assign #T_INV xuqu = !(!vonu); - assign #T_TRI baxe = !abon ? !cyvu : 'z; - assign #T_TRI aras = !abon ? !bore : 'z; - assign #T_TRI agag = !abon ? !buvy : 'z; - assign #T_TRI abem = !abon ? !xuqu : 'z; - assign #T_TRI dyso = !abon ? !0 : 'z; - assign #T_INV fufo = !ff40_d2; - assign #T_AO gejy = (!xuso && fufo) || (ff40_d2 && wago); - assign #T_TRI famu = !abon ? !gejy : 'z; + assign xele = !oam_b_cpu_nrd ? !yceb : 'z; + assign ypon = !oam_b_cpu_nrd ? !zuca : 'z; + assign xuvo = !oam_b_cpu_nrd ? !WONE : 'z; + assign zysa = !oam_b_cpu_nrd ? !zaxe : 'z; + assign yweg = !oam_b_cpu_nrd ? !xafu : 'z; + assign xabu = !oam_b_cpu_nrd ? !yses : 'z; + assign ytux = !oam_b_cpu_nrd ? !zeca : 'z; + assign yfap = !oam_b_cpu_nrd ? !ydyv : 'z; + assign ywok = !cota; + assign abon = !texy; + assign fugy = !abon ? !(!xegu) : 'z; + assign gavo = !abon ? !(!yjex) : 'z; + assign wyga = !abon ? !(!xyju) : 'z; + assign wune = !abon ? !(!ybog) : 'z; + assign gotu = !abon ? !(!wyso) : 'z; + assign gegu = !abon ? !(!xote) : 'z; + assign xehe = !abon ? !(!yzab) : 'z; + assign ebos = !v[0]; + assign dasa = !v[1]; + assign fuky = !v[2]; + assign fuve = !v[3]; + assign fepu = !v[4]; + assign fofa = !v[5]; + assign femo = !v[6]; + assign gusu = !v[7]; + assign { eruc_c, eruc } = ebos + !xuso + '0; + assign { enef_c, enef } = dasa + !xegu + eruc_c; + assign { feco_c, feco } = fuky + !yjex + enef_c; + assign { gyky_c, gyky } = fuve + !xyju + feco_c; + assign { gopu_c, gopu } = fepu + !ybog + gyky_c; + assign { fuwa_c, fuwa } = fofa + !wyso + gopu_c; + assign { goju_c, goju } = femo + !xote + fuwa_c; + assign { wuhu_c, wuhu } = gusu + !yzab + goju_c; + assign dege = !eruc; + assign daby = !enef; + assign dabu = !feco; + assign gysa = !gyky; + assign gace = !gopu; + assign guvu = !fuwa; + assign gyda = !goju; + assign gewy = !wuhu; + assign govu = ff40_d2 || gyky; + assign wota = !(gace && guvu && gyda && gewy && wuhu_c && govu); + assign gese = !wota; + assign wuky = !nyzos; + assign wago = wuky != wenu; + assign cyvu = wuky != cucu; + assign bore = wuky != cuca; + assign buvy = wuky != cega; + assign xuqu = !(!vonu); + assign baxe = !abon ? !cyvu : 'z; + assign aras = !abon ? !bore : 'z; + assign agag = !abon ? !buvy : 'z; + assign abem = !abon ? !xuqu : 'z; + assign dyso = !abon ? !0 : 'z; + assign fufo = !ff40_d2; + assign gejy = (!xuso && fufo) || (ff40_d2 && wago); + assign famu = !abon ? !gejy : 'z; assign d[1] = xele; assign d[2] = ypon; assign d[3] = xuvo; @@ -232,24 +232,24 @@ module sprite_control( dffr_bp dffr_catu(xupy, abez, abov, catu); dffr_bp dffr_byba(xupy, bagy, feto, byba); dffr_bp dffr_doba(clk2, bagy, byba, doba); - assign #T_INV xyva = !clk1; - assign #T_INV xota = !xyva; - assign #T_INV xyfy = !xota; - assign #T_INV ales = !xyvo; - assign #T_AND abov = sela && ales; - assign #T_INV balu = !anom; - assign #T_INV xupy = !(!wuvu); - assign #T_INV abez = !reset_video; - assign #T_INV bagy = !balu; - assign #T_NOR wojo = !(!wosu || !wuvu); - assign #T_INV xoce = !wosu; - assign #T_INV xyso = !wojo; - assign #T_INV ceha = !(!ceno); - assign #T_AND buza = !ceno && nxymu; - assign #T_AND care = xoce && ceha && spr_match; - assign #T_OR bebu = doba || balu || !byba; - assign #T_INV dyty = !care; - assign #T_INV avap = !bebu; + assign xyva = !clk1; + assign xota = !xyva; + assign xyfy = !xota; + assign ales = !xyvo; + assign abov = sela && ales; + assign balu = !anom; + assign xupy = !(!wuvu); + assign abez = !reset_video; + assign bagy = !balu; + assign wojo = !(!wosu || !wuvu); + assign xoce = !wosu; + assign xyso = !wojo; + assign ceha = !(!ceno); + assign buza = !ceno && nxymu; + assign care = xoce && ceha && spr_match; + assign bebu = doba || balu || !byba; + assign dyty = !care; + assign avap = !bebu; assign wuvu_nq = !wuvu; logic seba, toxe, tuly, tese, tepa, tyfo, tyno, saky, tytu, toma; @@ -259,29 +259,29 @@ module sprite_control( dffr_bp dffr_tuly(!toxe, seca, !tuly, tuly); dffr_bp dffr_tese(!tuly, seca, !tese, tese); dffr_bp dffr_tyfo(clk4, '1, toxe, tyfo); - assign #T_INV tepa = !nxymu; - assign #T_NAND tyno = !(toxe && seba && vonu); - assign #T_NOR saky = !(tuly || vonu); - assign #T_INV tytu = !toxe; - assign #T_OR vusa = !tyfo || tyno; - assign #T_OR tyso = saky || tepa; - assign #T_NOR tuvo = !(tepa || tuly || tese); - assign #T_NAND tame = !(tese && toxe); - assign #T_NOR sycu = !(tytu || tepa || tyfo); - assign #T_NAND tacu = !(tytu && tyfo); - assign #T_INV wuty = !vusa; - assign #T_INV texy = !tyso; - assign #T_AND topu = tuly && sycu; - assign #T_AND raca = vonu && sycu; - assign #T_INV xefy = !wuty; - assign #T_AND xono = nbaxo && texy; - assign #T_NAND toma = !(clk4 && tame); - assign #T_INV vywa = !topu; - assign #T_INV peby = !raca; - assign #T_INV weny = !vywa; - assign #T_INV nybe = !peby; - assign #T_INV xado = !weny; - assign #T_INV puco = !nybe; + assign tepa = !nxymu; + assign tyno = !(toxe && seba && vonu); + assign saky = !(tuly || vonu); + assign tytu = !toxe; + assign vusa = !tyfo || tyno; + assign tyso = saky || tepa; + assign tuvo = !(tepa || tuly || tese); + assign tame = !(tese && toxe); + assign sycu = !(tytu || tepa || tyfo); + assign tacu = !(tytu && tyfo); + assign wuty = !vusa; + assign texy = !tyso; + assign topu = tuly && sycu; + assign raca = vonu && sycu; + assign xefy = !wuty; + assign xono = nbaxo && texy; + assign toma = !(clk4 && tame); + assign vywa = !topu; + assign peby = !raca; + assign weny = !vywa; + assign nybe = !peby; + assign xado = !weny; + assign puco = !nybe; assign tyfo_nq = !tyfo; logic baky, dezy, cake, bese, cuxy, bego, dybe; @@ -294,75 +294,75 @@ module sprite_control( dffr_bp dffr_cuxy(!bese, azyb, !cuxy, cuxy); dffr_bp dffr_bego(!cuxy, azyb, !bego, bego); dffr_bp dffr_dybe(!bego, azyb, !dybe, dybe); - assign #T_AND baky = cuxy && dybe; - assign #T_OR cake = baky || dezy; - assign #T_INV eden = !bese; - assign #T_INV cypy = !cuxy; - assign #T_INV cape = !bego; - assign #T_INV caxu = !dybe; - assign #T_INV fycu = !eden; - assign #T_INV fone = !cypy; - assign #T_INV ekud = !cape; - assign #T_INV elyg = !caxu; - assign #T_NAND gebu = !(eden && fone && cape && caxu); - assign #T_NAND womu = !(eden && fone && ekud && caxu); - assign #T_NAND guna = !(fycu && fone && ekud && caxu); - assign #T_NAND foco = !(fycu && fone && cape && caxu); - assign #T_NAND dewy = !(eden && cypy && cape && elyg); - assign #T_NAND dezo = !(eden && cypy && cape && caxu); - assign #T_NAND dogu = !(fycu && cypy && cape && elyg); - assign #T_NAND cugu = !(fycu && cypy && ekud && caxu); - assign #T_NAND cupe = !(eden && cypy && ekud && caxu); - assign #T_NAND cuva = !(fycu && cypy && cape && caxu); - assign #T_OR wyxo = dyty || gebu; - assign #T_OR xujo = dyty || womu; - assign #T_OR gape = dyty || guna; - assign #T_OR guve = dyty || foco; - assign #T_OR caho = dyty || dewy; - assign #T_OR cemy = dyty || dezo; - assign #T_OR cato = dyty || dogu; - assign #T_OR cado = dyty || cugu; - assign #T_OR cecu = dyty || cupe; - assign #T_OR byby = dyty || cuva; - assign #T_INV gyfo = !wyxo; - assign #T_INV weka = !xujo; - assign #T_INV gyvo = !gape; - assign #T_INV gusa = !guve; - assign #T_INV buka = !caho; - assign #T_INV dyhu = !cemy; - assign #T_INV decu = !cato; - assign #T_INV bede = !cado; - assign #T_INV duke = !cecu; - assign #T_INV buco = !byby; - assign #T_INV cacu = !gyfo; - assign #T_INV buzy = !gyfo; - assign #T_INV fuke = !gyfo; - assign #T_INV zape = !weka; - assign #T_INV wuse = !weka; - assign #T_INV zuru = !weka; - assign #T_INV fefo = !gyvo; - assign #T_INV gecy = !gyvo; - assign #T_INV wabe = !gyvo; - assign #T_INV feka = !gusa; - assign #T_INV xyha = !gusa; - assign #T_INV yfag = !gusa; - assign #T_INV cexu = !buka; - assign #T_INV akol = !buka; - assign #T_INV bymy = !buka; - assign #T_INV fuxu = !dyhu; - assign #T_INV enob = !dyhu; - assign #T_INV geny = !dyhu; - assign #T_INV weme = !decu; - assign #T_INV wufa = !decu; - assign #T_INV faka = !decu; - assign #T_INV cyla = !bede; - assign #T_INV dymo = !bede; - assign #T_INV bucy = !bede; - assign #T_INV wofo = !duke; - assign #T_INV wylu = !duke; - assign #T_INV ewot = !duke; - assign #T_INV asys = !buco; - assign #T_INV ahof = !buco; - assign #T_INV byvy = !buco; + assign baky = cuxy && dybe; + assign cake = baky || dezy; + assign eden = !bese; + assign cypy = !cuxy; + assign cape = !bego; + assign caxu = !dybe; + assign fycu = !eden; + assign fone = !cypy; + assign ekud = !cape; + assign elyg = !caxu; + assign gebu = !(eden && fone && cape && caxu); + assign womu = !(eden && fone && ekud && caxu); + assign guna = !(fycu && fone && ekud && caxu); + assign foco = !(fycu && fone && cape && caxu); + assign dewy = !(eden && cypy && cape && elyg); + assign dezo = !(eden && cypy && cape && caxu); + assign dogu = !(fycu && cypy && cape && elyg); + assign cugu = !(fycu && cypy && ekud && caxu); + assign cupe = !(eden && cypy && ekud && caxu); + assign cuva = !(fycu && cypy && cape && caxu); + assign wyxo = dyty || gebu; + assign xujo = dyty || womu; + assign gape = dyty || guna; + assign guve = dyty || foco; + assign caho = dyty || dewy; + assign cemy = dyty || dezo; + assign cato = dyty || dogu; + assign cado = dyty || cugu; + assign cecu = dyty || cupe; + assign byby = dyty || cuva; + assign gyfo = !wyxo; + assign weka = !xujo; + assign gyvo = !gape; + assign gusa = !guve; + assign buka = !caho; + assign dyhu = !cemy; + assign decu = !cato; + assign bede = !cado; + assign duke = !cecu; + assign buco = !byby; + assign cacu = !gyfo; + assign buzy = !gyfo; + assign fuke = !gyfo; + assign zape = !weka; + assign wuse = !weka; + assign zuru = !weka; + assign fefo = !gyvo; + assign gecy = !gyvo; + assign wabe = !gyvo; + assign feka = !gusa; + assign xyha = !gusa; + assign yfag = !gusa; + assign cexu = !buka; + assign akol = !buka; + assign bymy = !buka; + assign fuxu = !dyhu; + assign enob = !dyhu; + assign geny = !dyhu; + assign weme = !decu; + assign wufa = !decu; + assign faka = !decu; + assign cyla = !bede; + assign dymo = !bede; + assign bucy = !bede; + assign wofo = !duke; + assign wylu = !duke; + assign ewot = !duke; + assign asys = !buco; + assign ahof = !buco; + assign byvy = !buco; endmodule diff --git a/dmg_cpu_b/pages/p2_interrupts.sv b/dmg_cpu_b/pages/p2_interrupts.sv index 309073a..da784d3 100644 --- a/dmg_cpu_b/pages/p2_interrupts.sv +++ b/dmg_cpu_b/pages/p2_interrupts.sv @@ -19,8 +19,8 @@ module interrupts( dffr_bp dffr_agem(boga1mhz, nreset2, acef, agem); dffr_bp dffr_apug(boga1mhz, nreset2, agem, apug); dlatch_b latch_awob(boga1mhz, kery, awob); - assign #T_OR kery = p13_c || p12_c || p11_c || p10_c; - assign #T_AND asok = apug && batu; + assign kery = p13_c || p12_c || p11_c || p10_c; + assign asok = apug && batu; assign to_cpu2 = awob; assign int_jp = asok; @@ -38,33 +38,33 @@ module interrupts( dlatch_b latch_nuty(nff0f_rd, ulak, nuty); dlatch_b latch_mopo(nff0f_rd, lalu, mopo); dlatch_b latch_pavy(nff0f_rd, nybo, pavy); - assign #T_INV rotu = !nff0f_wr; - assign #T_INV lety = !cpu_irq0_ack; - assign #T_OR muxe = d[0] || nff0f_wr; - assign #T_INV lufe = !cpu_irq3_ack; - assign #T_OR sulo = d[3] || nff0f_wr; - assign #T_INV lamo = !cpu_irq4_ack; - assign #T_OR seme = d[4] || nff0f_wr; - assign #T_INV leja = !cpu_irq1_ack; - assign #T_OR nabe = d[1] || nff0f_wr; - assign #T_INV lesa = !cpu_irq2_ack; - assign #T_OR rake = d[2] || nff0f_wr; - assign #T_NAND myzu = !(rotu && lety && d[0]); - assign #T_AND lyta = muxe && lety && nreset2; - assign #T_NAND tome = !(rotu && lufe && d[3]); - assign #T_AND tuny = sulo && lufe && nreset2; - assign #T_NAND toga = !(rotu && lamo && d[4]); - assign #T_AND tyme = seme && lamo && nreset2; - assign #T_NAND mody = !(rotu && leja && d[1]); - assign #T_AND movu = nabe && leja && nreset2; - assign #T_NAND pyhu = !(rotu && lesa && d[2]); - assign #T_AND pyga = rake && lesa && nreset2; - assign #T_INV pola = !nff0f_rd; - assign #T_TRI nela = pola ? !(!maty) : 'z; - assign #T_TRI pado = pola ? !(!nejy) : 'z; - assign #T_TRI pegy = pola ? !(!nuty) : 'z; - assign #T_TRI nabo = pola ? !(!mopo) : 'z; - assign #T_TRI rova = pola ? !(!pavy) : 'z; + assign rotu = !nff0f_wr; + assign lety = !cpu_irq0_ack; + assign muxe = d[0] || nff0f_wr; + assign lufe = !cpu_irq3_ack; + assign sulo = d[3] || nff0f_wr; + assign lamo = !cpu_irq4_ack; + assign seme = d[4] || nff0f_wr; + assign leja = !cpu_irq1_ack; + assign nabe = d[1] || nff0f_wr; + assign lesa = !cpu_irq2_ack; + assign rake = d[2] || nff0f_wr; + assign myzu = !(rotu && lety && d[0]); + assign lyta = muxe && lety && nreset2; + assign tome = !(rotu && lufe && d[3]); + assign tuny = sulo && lufe && nreset2; + assign toga = !(rotu && lamo && d[4]); + assign tyme = seme && lamo && nreset2; + assign mody = !(rotu && leja && d[1]); + assign movu = nabe && leja && nreset2; + assign pyhu = !(rotu && lesa && d[2]); + assign pyga = rake && lesa && nreset2; + assign pola = !nff0f_rd; + assign nela = pola ? !(!maty) : 'z; + assign pado = pola ? !(!nejy) : 'z; + assign pegy = pola ? !(!nuty) : 'z; + assign nabo = pola ? !(!mopo) : 'z; + assign rova = pola ? !(!pavy) : 'z; assign cpu_irq0_trig = lope; assign cpu_irq3_trig = ubul; assign cpu_irq4_trig = ulak; diff --git a/dmg_cpu_b/pages/p30_sprite_store.sv b/dmg_cpu_b/pages/p30_sprite_store.sv index 4ccdbe0..3c97e2e 100644 --- a/dmg_cpu_b/pages/p30_sprite_store.sv +++ b/dmg_cpu_b/pages/p30_sprite_store.sv @@ -141,118 +141,118 @@ module sprite_store( dlatch_a latch_gyho(!enob, cucu, gyho); dlatch_a latch_bozu(!enob, cega, bozu); dlatch_a latch_cufo(!enob, cuca, cufo); - assign #T_INV cyke = !xupy; - assign #T_INV wuda = !cyke; - assign #T_TRI weza_o = !buza ? !(!xecu) : 'z; - assign #T_TRI wuco_o = !buza ? !(!yduf) : 'z; - assign #T_TRI wyda_o = !buza ? !(!xobe) : 'z; - assign #T_TRI zysu_o = !buza ? !(!zuze) : 'z; - assign #T_TRI wyse_o = !buza ? !(!xedy) : 'z; - assign #T_TRI wuzy_o = !buza ? !(!xadu) : 'z; - assign #T_TRI wenu_o = !fepo ? !gysa : 'z; - assign #T_TRI cucu_o = !fepo ? !dege : 'z; - assign #T_TRI cega_o = !fepo ? !dabu : 'z; - assign #T_TRI cuca_o = !fepo ? !daby : 'z; - assign #T_TRI adyb = !deny ? !(!axuv) : 'z; - assign #T_TRI apob = !deny ? !(!bada) : 'z; - assign #T_TRI apyv = !deny ? !(!apev) : 'z; - assign #T_TRI afen = !deny ? !(!bado) : 'z; - assign #T_TRI akyh = !deny ? !(!bexy) : 'z; - assign #T_TRI apoc = !deny ? !(!byhe) : 'z; - assign #T_TRI bujy = !deny ? !(!afym) : 'z; - assign #T_TRI boso = !deny ? !(!azap) : 'z; - assign #T_TRI ahac = !deny ? !(!afut) : 'z; - assign #T_TRI bazu = !deny ? !(!afyx) : 'z; - assign #T_TRI wocy = !xyme ? !(!gecu) : 'z; - assign #T_TRI elyc = !xyme ? !(!foxy) : 'z; - assign #T_TRI wabo = !xyme ? !(!gohu) : 'z; - assign #T_TRI ezoc = !xyme ? !(!fogo) : 'z; - assign #T_TRI wywy = !xyme ? !(!gacy) : 'z; - assign #T_TRI wato = !xyme ? !(!gabo) : 'z; - assign #T_TRI zudo = !xyme ? !(!zube) : 'z; - assign #T_TRI ybuk = !xyme ? !(!zumy) : 'z; - assign #T_TRI zyto = !xyme ? !(!zexo) : 'z; - assign #T_TRI ykoz = !xyme ? !(!zafu) : 'z; - assign #T_TRI waja = !gowo ? !(!xynu) : 'z; - assign #T_TRI woxy = !gowo ? !(!xege) : 'z; - assign #T_TRI xyre = !gowo ? !(!xabo) : 'z; - assign #T_TRI weru = !gowo ? !(!wanu) : 'z; - assign #T_TRI wepy = !gowo ? !(!xefe) : 'z; - assign #T_TRI wuxu = !gowo ? !(!xave) : 'z; - assign #T_TRI bydo = !gowo ? !(!cumu) : 'z; - assign #T_TRI buce = !gowo ? !(!capo) : 'z; - assign #T_TRI bove = !gowo ? !(!cono) : 'z; - assign #T_TRI bevy = !gowo ? !(!caju) : 'z; - assign #T_TRI evyt = !gugy ? !(!fuzo) : 'z; - assign #T_TRI waba = !gugy ? !(!gesy) : 'z; - assign #T_TRI etad = !gugy ? !(!fysu) : 'z; - assign #T_TRI elep = !gugy ? !(!fefa) : 'z; - assign #T_TRI wygo = !gugy ? !(!gyno) : 'z; - assign #T_TRI wako = !gugy ? !(!gule) : 'z; - assign #T_TRI wana = !gugy ? !(!xygo) : 'z; - assign #T_TRI waxe = !gugy ? !(!xyna) : 'z; - assign #T_TRI wabu = !gugy ? !(!xaku) : 'z; - assign #T_TRI ypoz = !gugy ? !(!ygum) : 'z; - assign #T_TRI bemo = !dydo ? !(!cajy) : 'z; - assign #T_TRI cyby = !dydo ? !(!cuza) : 'z; - assign #T_TRI bety = !dydo ? !(!coma) : 'z; - assign #T_TRI cegy = !dydo ? !(!cufa) : 'z; - assign #T_TRI celu = !dydo ? !(!cebo) : 'z; - assign #T_TRI cubo = !dydo ? !(!cadu) : 'z; - assign #T_TRI befe = !dydo ? !(!abug) : 'z; - assign #T_TRI byro = !dydo ? !(!ames) : 'z; - assign #T_TRI baco = !dydo ? !(!abop) : 'z; - assign #T_TRI ahum = !dydo ? !(!arof) : 'z; - assign #T_TRI dalo = !gygy ? !(!ekap) : 'z; - assign #T_TRI daly = !gygy ? !(!etav) : 'z; - assign #T_TRI duza = !gygy ? !(!ebex) : 'z; - assign #T_TRI waga = !gygy ? !(!goru) : 'z; - assign #T_TRI dyny = !gygy ? !(!etym) : 'z; - assign #T_TRI dobo = !gygy ? !(!ekop) : 'z; - assign #T_TRI awat = !gygy ? !(!aned) : 'z; - assign #T_TRI bace = !gygy ? !(!acep) : 'z; - assign #T_TRI bodu = !gygy ? !(!abux) : 'z; - assign #T_TRI buja = !gygy ? !(!abeg) : 'z; - assign #T_TRI dezu = !gyma ? !(!dafu) : 'z; - assign #T_TRI efud = !gyma ? !(!deba) : 'z; - assign #T_TRI dony = !gyma ? !(!duha) : 'z; - assign #T_TRI dowa = !gyma ? !(!duny) : 'z; - assign #T_TRI dygo = !gyma ? !(!dese) : 'z; - assign #T_TRI enap = !gyma ? !(!devy) : 'z; - assign #T_TRI zypo = !gyma ? !(!zury) : 'z; - assign #T_TRI zexe = !gyma ? !(!zuro) : 'z; - assign #T_TRI yjem = !gyma ? !(!zene) : 'z; - assign #T_TRI ywav = !gyma ? !(!zylu) : 'z; - assign #T_TRI axec = !fame ? !(!boxa) : 'z; - assign #T_TRI cyro = !fame ? !(!buna) : 'z; - assign #T_TRI cuvu = !fame ? !(!bulu) : 'z; - assign #T_TRI apon = !fame ? !(!beca) : 'z; - assign #T_TRI afoz = !fame ? !(!byhu) : 'z; - assign #T_TRI cube = !fame ? !(!buhe) : 'z; - assign #T_TRI zaby = !fame ? !(!ykuk) : 'z; - assign #T_TRI zuke = !fame ? !(!ylov) : 'z; - assign #T_TRI wuxe = !fame ? !(!xazy) : 'z; - assign #T_TRI were = !fame ? !(!xosy) : 'z; - assign #T_TRI yhal = !fado ? !(!xufo) : 'z; - assign #T_TRI yrad = !fado ? !(!xute) : 'z; - assign #T_TRI xyra = !fado ? !(!xotu) : 'z; - assign #T_TRI ynev = !fado ? !(!xyfe) : 'z; - assign #T_TRI zojy = !fado ? !(!yzor) : 'z; - assign #T_TRI zaro = !fado ? !(!yber) : 'z; - assign #T_TRI cawo = !fado ? !(!dewu) : 'z; - assign #T_TRI byme = !fado ? !(!cana) : 'z; - assign #T_TRI coho = !fado ? !(!dysy) : 'z; - assign #T_TRI gate = !fado ? !(!fofo) : 'z; - assign #T_TRI zetu = !furo ? !(!ygus) : 'z; - assign #T_TRI zece = !furo ? !(!ysok) : 'z; - assign #T_TRI zave = !furo ? !(!yzep) : 'z; - assign #T_TRI woko = !furo ? !(!wyte) : 'z; - assign #T_TRI zumu = !furo ? !(!zony) : 'z; - assign #T_TRI zedy = !furo ? !(!ywak) : 'z; - assign #T_TRI gofo = !furo ? !(!fyhy) : 'z; - assign #T_TRI wehe = !furo ? !(!gyho) : 'z; - assign #T_TRI ajal = !furo ? !(!bozu) : 'z; - assign #T_TRI buky = !furo ? !(!cufo) : 'z; + assign cyke = !xupy; + assign wuda = !cyke; + assign weza_o = !buza ? !(!xecu) : 'z; + assign wuco_o = !buza ? !(!yduf) : 'z; + assign wyda_o = !buza ? !(!xobe) : 'z; + assign zysu_o = !buza ? !(!zuze) : 'z; + assign wyse_o = !buza ? !(!xedy) : 'z; + assign wuzy_o = !buza ? !(!xadu) : 'z; + assign wenu_o = !fepo ? !gysa : 'z; + assign cucu_o = !fepo ? !dege : 'z; + assign cega_o = !fepo ? !dabu : 'z; + assign cuca_o = !fepo ? !daby : 'z; + assign adyb = !deny ? !(!axuv) : 'z; + assign apob = !deny ? !(!bada) : 'z; + assign apyv = !deny ? !(!apev) : 'z; + assign afen = !deny ? !(!bado) : 'z; + assign akyh = !deny ? !(!bexy) : 'z; + assign apoc = !deny ? !(!byhe) : 'z; + assign bujy = !deny ? !(!afym) : 'z; + assign boso = !deny ? !(!azap) : 'z; + assign ahac = !deny ? !(!afut) : 'z; + assign bazu = !deny ? !(!afyx) : 'z; + assign wocy = !xyme ? !(!gecu) : 'z; + assign elyc = !xyme ? !(!foxy) : 'z; + assign wabo = !xyme ? !(!gohu) : 'z; + assign ezoc = !xyme ? !(!fogo) : 'z; + assign wywy = !xyme ? !(!gacy) : 'z; + assign wato = !xyme ? !(!gabo) : 'z; + assign zudo = !xyme ? !(!zube) : 'z; + assign ybuk = !xyme ? !(!zumy) : 'z; + assign zyto = !xyme ? !(!zexo) : 'z; + assign ykoz = !xyme ? !(!zafu) : 'z; + assign waja = !gowo ? !(!xynu) : 'z; + assign woxy = !gowo ? !(!xege) : 'z; + assign xyre = !gowo ? !(!xabo) : 'z; + assign weru = !gowo ? !(!wanu) : 'z; + assign wepy = !gowo ? !(!xefe) : 'z; + assign wuxu = !gowo ? !(!xave) : 'z; + assign bydo = !gowo ? !(!cumu) : 'z; + assign buce = !gowo ? !(!capo) : 'z; + assign bove = !gowo ? !(!cono) : 'z; + assign bevy = !gowo ? !(!caju) : 'z; + assign evyt = !gugy ? !(!fuzo) : 'z; + assign waba = !gugy ? !(!gesy) : 'z; + assign etad = !gugy ? !(!fysu) : 'z; + assign elep = !gugy ? !(!fefa) : 'z; + assign wygo = !gugy ? !(!gyno) : 'z; + assign wako = !gugy ? !(!gule) : 'z; + assign wana = !gugy ? !(!xygo) : 'z; + assign waxe = !gugy ? !(!xyna) : 'z; + assign wabu = !gugy ? !(!xaku) : 'z; + assign ypoz = !gugy ? !(!ygum) : 'z; + assign bemo = !dydo ? !(!cajy) : 'z; + assign cyby = !dydo ? !(!cuza) : 'z; + assign bety = !dydo ? !(!coma) : 'z; + assign cegy = !dydo ? !(!cufa) : 'z; + assign celu = !dydo ? !(!cebo) : 'z; + assign cubo = !dydo ? !(!cadu) : 'z; + assign befe = !dydo ? !(!abug) : 'z; + assign byro = !dydo ? !(!ames) : 'z; + assign baco = !dydo ? !(!abop) : 'z; + assign ahum = !dydo ? !(!arof) : 'z; + assign dalo = !gygy ? !(!ekap) : 'z; + assign daly = !gygy ? !(!etav) : 'z; + assign duza = !gygy ? !(!ebex) : 'z; + assign waga = !gygy ? !(!goru) : 'z; + assign dyny = !gygy ? !(!etym) : 'z; + assign dobo = !gygy ? !(!ekop) : 'z; + assign awat = !gygy ? !(!aned) : 'z; + assign bace = !gygy ? !(!acep) : 'z; + assign bodu = !gygy ? !(!abux) : 'z; + assign buja = !gygy ? !(!abeg) : 'z; + assign dezu = !gyma ? !(!dafu) : 'z; + assign efud = !gyma ? !(!deba) : 'z; + assign dony = !gyma ? !(!duha) : 'z; + assign dowa = !gyma ? !(!duny) : 'z; + assign dygo = !gyma ? !(!dese) : 'z; + assign enap = !gyma ? !(!devy) : 'z; + assign zypo = !gyma ? !(!zury) : 'z; + assign zexe = !gyma ? !(!zuro) : 'z; + assign yjem = !gyma ? !(!zene) : 'z; + assign ywav = !gyma ? !(!zylu) : 'z; + assign axec = !fame ? !(!boxa) : 'z; + assign cyro = !fame ? !(!buna) : 'z; + assign cuvu = !fame ? !(!bulu) : 'z; + assign apon = !fame ? !(!beca) : 'z; + assign afoz = !fame ? !(!byhu) : 'z; + assign cube = !fame ? !(!buhe) : 'z; + assign zaby = !fame ? !(!ykuk) : 'z; + assign zuke = !fame ? !(!ylov) : 'z; + assign wuxe = !fame ? !(!xazy) : 'z; + assign were = !fame ? !(!xosy) : 'z; + assign yhal = !fado ? !(!xufo) : 'z; + assign yrad = !fado ? !(!xute) : 'z; + assign xyra = !fado ? !(!xotu) : 'z; + assign ynev = !fado ? !(!xyfe) : 'z; + assign zojy = !fado ? !(!yzor) : 'z; + assign zaro = !fado ? !(!yber) : 'z; + assign cawo = !fado ? !(!dewu) : 'z; + assign byme = !fado ? !(!cana) : 'z; + assign coho = !fado ? !(!dysy) : 'z; + assign gate = !fado ? !(!fofo) : 'z; + assign zetu = !furo ? !(!ygus) : 'z; + assign zece = !furo ? !(!ysok) : 'z; + assign zave = !furo ? !(!yzep) : 'z; + assign woko = !furo ? !(!wyte) : 'z; + assign zumu = !furo ? !(!zony) : 'z; + assign zedy = !furo ? !(!ywak) : 'z; + assign gofo = !furo ? !(!fyhy) : 'z; + assign wehe = !furo ? !(!gyho) : 'z; + assign ajal = !furo ? !(!bozu) : 'z; + assign buky = !furo ? !(!cufo) : 'z; assign weza_tri = weza_o; assign wuco_tri = wuco_o; assign wyda_tri = wyda_o; diff --git a/dmg_cpu_b/pages/p31_sprite_x_matchers.sv b/dmg_cpu_b/pages/p31_sprite_x_matchers.sv index 7ab679d..e896746 100644 --- a/dmg_cpu_b/pages/p31_sprite_x_matchers.sv +++ b/dmg_cpu_b/pages/p31_sprite_x_matchers.sv @@ -132,123 +132,123 @@ module sprite_x_matchers( drlatch latch_fyty(!cacu, gamy, zocy, fyty); drlatch latch_fuby(!cacu, gamy, ypur, fuby); drlatch latch_goxu(!cacu, gamy, yvok, goxu); - assign #T_INV xega = !cota; - assign #T_INV cose = !(!gomo); - assign #T_INV arop = !(!baxo); - assign #T_INV xatu = !(!yzos); - assign #T_INV bady = !(!depo); - assign #T_INV zago = !(!ylor); - assign #T_INV zocy = !(!zyty); - assign #T_INV ypur = !(!zyve); - assign #T_INV yvok = !(!zezy); - assign #T_TRIB xaca = !oam_a_cpu_nrd ? !xyky : 'z; - assign #T_TRIB xagu = !oam_a_cpu_nrd ? !yrum : 'z; - assign #T_TRIB xepu = !oam_a_cpu_nrd ? !ysex : 'z; - assign #T_TRIB xygu = !oam_a_cpu_nrd ? !yvel : 'z; - assign #T_TRIB xuna = !oam_a_cpu_nrd ? !wyno : 'z; - assign #T_TRIB deve = !oam_a_cpu_nrd ? !cyra : 'z; - assign #T_TRIB zeha = !oam_a_cpu_nrd ? !zuve : 'z; - assign #T_TRIB fyra = !oam_a_cpu_nrd ? !eced : 'z; - assign #T_XOR woju = welo != nh[4]; - assign #T_XOR yfun = xuny != nh[5]; - assign #T_XOR wyza = wote != nh[6]; - assign #T_XOR ypuk = xako != nh[7]; - assign #T_XOR zogy = xepe != nh[0]; - assign #T_XOR zeba = ylah != nh[1]; - assign #T_XOR zaha = zola != nh[2]; - assign #T_XOR zoky = zulu != nh[3]; - assign #T_NOR xeba = !(woju || yfun || wyza || ypuk); - assign #T_NOR zako = !(zogy || zeba || zaha || zoky); - assign #T_XOR yvap = xomy != nh[4]; - assign #T_XOR xeny = wuha != nh[5]; - assign #T_XOR xavu = wyna != nh[6]; - assign #T_XOR xeva = weco != nh[7]; - assign #T_XOR yhok = xoly != nh[0]; - assign #T_XOR ycah = xyba != nh[1]; - assign #T_XOR ydaj = xabe != nh[2]; - assign #T_XOR yvuz = xeka != nh[3]; - assign #T_NOR ywos = !(yvap || xeny || xavu || xeva); - assign #T_NOR zure = !(yhok || ycah || ydaj || yvuz); - assign #T_XOR ejot = fazu != nh[4]; - assign #T_XOR esaj = faxe != nh[5]; - assign #T_XOR ducu = exuk != nh[6]; - assign #T_XOR ewud = fede != nh[7]; - assign #T_XOR duse = eraz != nh[0]; - assign #T_XOR dagu = epum != nh[1]; - assign #T_XOR dyze = erol != nh[2]; - assign #T_XOR deso = ehyn != nh[3]; - assign #T_NOR daje = !(ejot || esaj || ducu || ewud); - assign #T_NOR cyco = !(duse || dagu || dyze || deso); - assign #T_XOR cola = dake != nh[4]; - assign #T_XOR boba = ceso != nh[5]; - assign #T_XOR colu = dyfu != nh[6]; - assign #T_XOR bahu = cusy != nh[7]; - assign #T_XOR edym = dany != nh[0]; - assign #T_XOR emyb = duko != nh[1]; - assign #T_XOR ebef = desu != nh[2]; - assign #T_XOR ewok = dazo != nh[3]; - assign #T_NOR cyvy = !(cola || boba || colu || bahu); - assign #T_NOR ewam = !(edym || emyb || ebef || ewok); - assign #T_XOR zare = zoly != nh[6]; - assign #T_XOR zemu = zogo != nh[5]; - assign #T_XOR zygo = zecu != nh[4]; - assign #T_XOR zuzy = zesa != nh[7]; - assign #T_XOR xosu = ycol != nh[0]; - assign #T_XOR zuvu = yrac != nh[1]; - assign #T_XOR xuco = ymem != nh[2]; - assign #T_XOR zulo = yvag != nh[3]; - assign #T_NOR ywap = !(zare || zemu || zygo || zuzy); - assign #T_NOR ydot = !(xosu || zuvu || xuco || zulo); - assign #T_XOR zyku = ybed != nh[4]; - assign #T_XOR zypu = zala != nh[5]; - assign #T_XOR xaha = wyde != nh[6]; - assign #T_XOR zefe = xepa != nh[7]; - assign #T_XOR xeju = wedu != nh[0]; - assign #T_XOR zate = ygaj != nh[1]; - assign #T_XOR zaku = zyjo != nh[2]; - assign #T_XOR ybox = xury != nh[3]; - assign #T_NOR ykok = !(zyku || zypu || xaha || zefe); - assign #T_NOR ynaz = !(xeju || zate || zaku || ybox); - assign #T_XOR duze = ezuf != nh[4]; - assign #T_XOR daga = enad != nh[5]; - assign #T_XOR dawu = ebow != nh[6]; - assign #T_XOR ejaw = fyca != nh[7]; - assign #T_XOR goho = gavy != nh[0]; - assign #T_XOR gasu = gypu != nh[1]; - assign #T_XOR gabu = gady != nh[2]; - assign #T_XOR gafe = gaza != nh[3]; - assign #T_NOR dama = !(duze || daga || dawu || ejaw); - assign #T_NOR feha = !(goho || gasu || gabu || gafe); - assign #T_XOR zywu = ypod != nh[4]; - assign #T_XOR zuza = yrop != nh[5]; - assign #T_XOR zejo = ynep != nh[6]; - assign #T_XOR zeda = yzof != nh[7]; - assign #T_XOR ymam = xuvy != nh[0]; - assign #T_XOR ytyp = xere != nh[1]; - assign #T_XOR yfop = xuzo != nh[2]; - assign #T_XOR yvac = xexa != nh[3]; - assign #T_NOR ytub = !(zywu || zuza || zejo || zeda); - assign #T_NOR ylev = !(ymam || ytyp || yfop || yvac); - assign #T_XOR bazy = cywe != nh[4]; - assign #T_XOR cyle = dyby != nh[5]; - assign #T_XOR ceva = dury != nh[6]; - assign #T_XOR bumy = cuvy != nh[7]; - assign #T_XOR guzo = fusa != nh[0]; - assign #T_XOR gola = faxa != nh[1]; - assign #T_XOR geve = fozy != nh[2]; - assign #T_XOR gude = fesy != nh[3]; - assign #T_NOR cogy = !(bazy || cyle || ceva || bumy); - assign #T_NOR fyma = !(guzo || gola || geve || gude); - assign #T_XOR ceko = duhy != nh[4]; - assign #T_XOR dety = ejuf != nh[5]; - assign #T_XOR dozo = enor != nh[6]; - assign #T_XOR cony = depy != nh[7]; - assign #T_XOR fuzu = foka != nh[0]; - assign #T_XOR feso = fyty != nh[1]; - assign #T_XOR foky = fuby != nh[2]; - assign #T_XOR fyva = goxu != nh[3]; - assign #T_NOR cehu = !(ceko || dety || dozo || cony); - assign #T_NOR ekes = !(fuzu || feso || foky || fyva); + assign xega = !cota; + assign cose = !(!gomo); + assign arop = !(!baxo); + assign xatu = !(!yzos); + assign bady = !(!depo); + assign zago = !(!ylor); + assign zocy = !(!zyty); + assign ypur = !(!zyve); + assign yvok = !(!zezy); + assign xaca = !oam_a_cpu_nrd ? !xyky : 'z; + assign xagu = !oam_a_cpu_nrd ? !yrum : 'z; + assign xepu = !oam_a_cpu_nrd ? !ysex : 'z; + assign xygu = !oam_a_cpu_nrd ? !yvel : 'z; + assign xuna = !oam_a_cpu_nrd ? !wyno : 'z; + assign deve = !oam_a_cpu_nrd ? !cyra : 'z; + assign zeha = !oam_a_cpu_nrd ? !zuve : 'z; + assign fyra = !oam_a_cpu_nrd ? !eced : 'z; + assign woju = welo != nh[4]; + assign yfun = xuny != nh[5]; + assign wyza = wote != nh[6]; + assign ypuk = xako != nh[7]; + assign zogy = xepe != nh[0]; + assign zeba = ylah != nh[1]; + assign zaha = zola != nh[2]; + assign zoky = zulu != nh[3]; + assign xeba = !(woju || yfun || wyza || ypuk); + assign zako = !(zogy || zeba || zaha || zoky); + assign yvap = xomy != nh[4]; + assign xeny = wuha != nh[5]; + assign xavu = wyna != nh[6]; + assign xeva = weco != nh[7]; + assign yhok = xoly != nh[0]; + assign ycah = xyba != nh[1]; + assign ydaj = xabe != nh[2]; + assign yvuz = xeka != nh[3]; + assign ywos = !(yvap || xeny || xavu || xeva); + assign zure = !(yhok || ycah || ydaj || yvuz); + assign ejot = fazu != nh[4]; + assign esaj = faxe != nh[5]; + assign ducu = exuk != nh[6]; + assign ewud = fede != nh[7]; + assign duse = eraz != nh[0]; + assign dagu = epum != nh[1]; + assign dyze = erol != nh[2]; + assign deso = ehyn != nh[3]; + assign daje = !(ejot || esaj || ducu || ewud); + assign cyco = !(duse || dagu || dyze || deso); + assign cola = dake != nh[4]; + assign boba = ceso != nh[5]; + assign colu = dyfu != nh[6]; + assign bahu = cusy != nh[7]; + assign edym = dany != nh[0]; + assign emyb = duko != nh[1]; + assign ebef = desu != nh[2]; + assign ewok = dazo != nh[3]; + assign cyvy = !(cola || boba || colu || bahu); + assign ewam = !(edym || emyb || ebef || ewok); + assign zare = zoly != nh[6]; + assign zemu = zogo != nh[5]; + assign zygo = zecu != nh[4]; + assign zuzy = zesa != nh[7]; + assign xosu = ycol != nh[0]; + assign zuvu = yrac != nh[1]; + assign xuco = ymem != nh[2]; + assign zulo = yvag != nh[3]; + assign ywap = !(zare || zemu || zygo || zuzy); + assign ydot = !(xosu || zuvu || xuco || zulo); + assign zyku = ybed != nh[4]; + assign zypu = zala != nh[5]; + assign xaha = wyde != nh[6]; + assign zefe = xepa != nh[7]; + assign xeju = wedu != nh[0]; + assign zate = ygaj != nh[1]; + assign zaku = zyjo != nh[2]; + assign ybox = xury != nh[3]; + assign ykok = !(zyku || zypu || xaha || zefe); + assign ynaz = !(xeju || zate || zaku || ybox); + assign duze = ezuf != nh[4]; + assign daga = enad != nh[5]; + assign dawu = ebow != nh[6]; + assign ejaw = fyca != nh[7]; + assign goho = gavy != nh[0]; + assign gasu = gypu != nh[1]; + assign gabu = gady != nh[2]; + assign gafe = gaza != nh[3]; + assign dama = !(duze || daga || dawu || ejaw); + assign feha = !(goho || gasu || gabu || gafe); + assign zywu = ypod != nh[4]; + assign zuza = yrop != nh[5]; + assign zejo = ynep != nh[6]; + assign zeda = yzof != nh[7]; + assign ymam = xuvy != nh[0]; + assign ytyp = xere != nh[1]; + assign yfop = xuzo != nh[2]; + assign yvac = xexa != nh[3]; + assign ytub = !(zywu || zuza || zejo || zeda); + assign ylev = !(ymam || ytyp || yfop || yvac); + assign bazy = cywe != nh[4]; + assign cyle = dyby != nh[5]; + assign ceva = dury != nh[6]; + assign bumy = cuvy != nh[7]; + assign guzo = fusa != nh[0]; + assign gola = faxa != nh[1]; + assign geve = fozy != nh[2]; + assign gude = fesy != nh[3]; + assign cogy = !(bazy || cyle || ceva || bumy); + assign fyma = !(guzo || gola || geve || gude); + assign ceko = duhy != nh[4]; + assign dety = ejuf != nh[5]; + assign dozo = enor != nh[6]; + assign cony = depy != nh[7]; + assign fuzu = foka != nh[0]; + assign feso = fyty != nh[1]; + assign foky = fuby != nh[2]; + assign fyva = goxu != nh[3]; + assign cehu = !(ceko || dety || dozo || cony); + assign ekes = !(fuzu || feso || foky || fyva); assign ngomo = !gomo; assign nbaxo = !baxo; assign nyzos = !yzos; diff --git a/dmg_cpu_b/pages/p32_bg_pixel_shifter.sv b/dmg_cpu_b/pages/p32_bg_pixel_shifter.sv index c6e4eeb..b2dbfd2 100644 --- a/dmg_cpu_b/pages/p32_bg_pixel_shifter.sv +++ b/dmg_cpu_b/pages/p32_bg_pixel_shifter.sv @@ -32,61 +32,61 @@ module bg_pixel_shifter( dffr_a dffr_poxa(labu, '1, md[3], poxa); dffr_a dffr_poju(labu, '1, md[5], poju); dffr_a dffr_pyju(labu, '1, md[7], pyju); - assign #T_INV leso = !mofu; - assign #T_INV luve = !leso; - assign #T_INV labu = !luve; - assign #T_INV mete = !nydy; - assign #T_INV loma = !mete; - assign #T_INV loze = !nyxu; - assign #T_INV luxa = !nyxu; - assign #T_INV tosa = !rawu; - assign #T_INV luhe = !legu; - assign #T_INV tyce = !pyzo; - assign #T_INV leke = !muku; - assign #T_INV ryga = !pulo; - assign #T_INV lala = !megu; - assign #T_INV rapu = !powy; - assign #T_INV neze = !nasa; - assign #T_NAND seja = !(tosa && luxa); - assign #T_NAND tuxe = !(luxa && rawu); - assign #T_NAND loty = !(luhe && loze); - assign #T_NAND laky = !(loze && legu); - assign #T_NAND sure = !(tyce && luxa); - assign #T_NAND ruce = !(luxa && pyzo); - assign #T_NAND lutu = !(leke && loze); - assign #T_NAND loto = !(loze && muku); - assign #T_NAND suca = !(ryga && luxa); - assign #T_NAND ruto = !(luxa && pulo); - assign #T_NAND mosy = !(lala && loze); - assign #T_NAND myvy = !(loze && megu); - assign #T_NAND supu = !(rapu && luxa); - assign #T_NAND rajo = !(luxa && powy); - assign #T_NAND nyha = !(neze && loze); - assign #T_NAND nute = !(loze && nasa); - assign #T_INV ruco = !pozo; - assign #T_INV noly = !nudu; - assign #T_INV revy = !poxa; - assign #T_INV lomy = !luzo; - assign #T_INV ryle = !poju; - assign #T_INV loxa = !myjy; - assign #T_INV soja = !pyju; - assign #T_INV nobo = !nefo; - assign #T_NAND seno = !(ruco && luxa); - assign #T_NAND soly = !(luxa && pozo); - assign #T_NAND nexa = !(noly && loze); - assign #T_NAND nyxo = !(loze && nudu); - assign #T_NAND sebo = !(revy && luxa); - assign #T_NAND ryja = !(luxa && poxa); - assign #T_NAND luja = !(lomy && loze); - assign #T_NAND lydu = !(loze && luzo); - assign #T_NAND sywe = !(ryle && luxa); - assign #T_NAND raja = !(luxa && poju); - assign #T_NAND leru = !(loxa && loze); - assign #T_NAND lodo = !(loze && myjy); - assign #T_NAND ryjy = !(soja && luxa); - assign #T_NAND raga = !(luxa && pyju); - assign #T_NAND nady = !(nobo && loze); - assign #T_NAND naja = !(loze && nefo); + assign leso = !mofu; + assign luve = !leso; + assign labu = !luve; + assign mete = !nydy; + assign loma = !mete; + assign loze = !nyxu; + assign luxa = !nyxu; + assign tosa = !rawu; + assign luhe = !legu; + assign tyce = !pyzo; + assign leke = !muku; + assign ryga = !pulo; + assign lala = !megu; + assign rapu = !powy; + assign neze = !nasa; + assign seja = !(tosa && luxa); + assign tuxe = !(luxa && rawu); + assign loty = !(luhe && loze); + assign laky = !(loze && legu); + assign sure = !(tyce && luxa); + assign ruce = !(luxa && pyzo); + assign lutu = !(leke && loze); + assign loto = !(loze && muku); + assign suca = !(ryga && luxa); + assign ruto = !(luxa && pulo); + assign mosy = !(lala && loze); + assign myvy = !(loze && megu); + assign supu = !(rapu && luxa); + assign rajo = !(luxa && powy); + assign nyha = !(neze && loze); + assign nute = !(loze && nasa); + assign ruco = !pozo; + assign noly = !nudu; + assign revy = !poxa; + assign lomy = !luzo; + assign ryle = !poju; + assign loxa = !myjy; + assign soja = !pyju; + assign nobo = !nefo; + assign seno = !(ruco && luxa); + assign soly = !(luxa && pozo); + assign nexa = !(noly && loze); + assign nyxo = !(loze && nudu); + assign sebo = !(revy && luxa); + assign ryja = !(luxa && poxa); + assign luja = !(lomy && loze); + assign lydu = !(loze && luzo); + assign sywe = !(ryle && luxa); + assign raja = !(luxa && poju); + assign leru = !(loxa && loze); + assign lodo = !(loze && myjy); + assign ryjy = !(soja && luxa); + assign raga = !(luxa && pyju); + assign nady = !(nobo && loze); + assign naja = !(loze && nefo); logic tomy, taca, sady, rysa, sobo, setu, ralu, sohu; logic myde, nozo, moju, macu, nepo, modu, neda, pybo; diff --git a/dmg_cpu_b/pages/p33_sprite_pixel_shifter.sv b/dmg_cpu_b/pages/p33_sprite_pixel_shifter.sv index acc05db..3edc027 100644 --- a/dmg_cpu_b/pages/p33_sprite_pixel_shifter.sv +++ b/dmg_cpu_b/pages/p33_sprite_pixel_shifter.sv @@ -33,62 +33,118 @@ module sprite_pixel_shifter( dlatch_a latch_sega(!xado, puly, sega); dlatch_a latch_rama(!puco, pawe, rama); dlatch_a latch_semo(!xado, pawe, semo); - assign #T_MUX pobe = xono ? md[4] : md[3]; - assign #T_MUX pacy = xono ? md[3] : md[4]; - assign #T_MUX pono = xono ? md[5] : md[2]; - assign #T_MUX pugu = xono ? md[2] : md[5]; - assign #T_MUX pute = xono ? md[7] : md[0]; - assign #T_MUX puly = xono ? md[0] : md[7]; - assign #T_MUX pelo = xono ? md[6] : md[1]; - assign #T_MUX pawe = xono ? md[1] : md[6]; - assign #T_INV lubo = !pudu; - assign #T_INV solo = !ramu; - assign #T_INV lumo = !mytu; - assign #T_INV lase = !mofo; - assign #T_INV loza = !pefo; - assign #T_INV rata = !rewo; - assign #T_INV nuca = !peba; - assign #T_INV sybo = !roka; - assign #T_NAND lufy = !(lubo && roby); - assign #T_NAND mame = !(pudu && roby); - assign #T_NAND rehu = !(solo && roby); - assign #T_NAND rano = !(ramu && roby); - assign #T_NAND majo = !(lumo && lyku); - assign #T_NAND myxa = !(mytu && lyku); - assign #T_NAND lyde = !(lase && lyku); - assign #T_NAND lela = !(mofo && lyku); - assign #T_NAND mofy = !(loza && lesy); - assign #T_NAND mezu = !(pefo && lesy); - assign #T_NAND pyzu = !(rata && lesy); - assign #T_NAND pabe = !(rewo && lesy); - assign #T_NAND mada = !(nuca && lota); - assign #T_NAND myto = !(peba && lota); - assign #T_NAND ruca = !(sybo && lota); - assign #T_NAND rusy = !(roka && lota); - assign #T_INV voby = !sele; - assign #T_INV wery = !saja; - assign #T_INV wura = !suny; - assign #T_INV wyco = !suto; - assign #T_INV selu = !rydu; - assign #T_INV wamy = !sega; - assign #T_INV sery = !rama; - assign #T_INV sulu = !semo; - assign #T_NAND waxo = !(voby && tyta); - assign #T_NAND tyga = !(sele && tyta); - assign #T_NAND xato = !(wery && tyta); - assign #T_NAND vexu = !(saja && tyta); - assign #T_NAND xexu = !(wura && tyco); - assign #T_NAND vaby = !(suny && tyco); - assign #T_NAND xole = !(wyco && tyco); - assign #T_NAND vume = !(suto && tyco); - assign #T_NAND tula = !(selu && xovu); - assign #T_NAND teso = !(rydu && xovu); - assign #T_NAND xyve = !(wamy && xovu); - assign #T_NAND vune = !(sega && xovu); - assign #T_NAND taby = !(sery && soka); - assign #T_NAND tapo = !(rama && soka); - assign #T_NAND tupe = !(sulu && soka); - assign #T_NAND tuxa = !(semo && soka); + assign pobe = xono ? md[4] : md[3]; + assign pacy = xono ? md[3] : md[4]; + assign pono = xono ? md[5] : md[2]; + assign pugu = xono ? md[2] : md[5]; + assign pute = xono ? md[7] : md[0]; + assign puly = xono ? md[0] : md[7]; + assign pelo = xono ? md[6] : md[1]; + assign pawe = xono ? md[1] : md[6]; + assign lubo = !pudu; + assign solo = !ramu; + assign lumo = !mytu; + assign lase = !mofo; + assign loza = !pefo; + assign rata = !rewo; + assign nuca = !peba; + assign sybo = !roka; + assign lufy = !(lubo && roby); + assign mame = !(pudu && roby); + assign rehu = !(solo && roby); + assign rano = !(ramu && roby); + assign majo = !(lumo && lyku); + assign myxa = !(mytu && lyku); + assign lyde = !(lase && lyku); + assign lela = !(mofo && lyku); + assign mofy = !(loza && lesy); + assign mezu = !(pefo && lesy); + assign pyzu = !(rata && lesy); + assign pabe = !(rewo && lesy); + assign mada = !(nuca && lota); + assign myto = !(peba && lota); + assign ruca = !(sybo && lota); + assign rusy = !(roka && lota); + assign voby = !sele; + assign wery = !saja; + assign wura = !suny; + assign wyco = !suto; + assign selu = !rydu; + assign wamy = !sega; + assign sery = !rama; + assign sulu = !semo; + assign waxo = !(voby && tyta); + assign tyga = !(sele && tyta); + assign xato = !(wery && tyta); + assign vexu = !(saja && tyta); + assign xexu = !(wura && tyco); + assign vaby = !(suny && tyco); + assign xole = !(wyco && tyco); + assign vume = !(suto && tyco); + assign tula = !(selu && xovu); + assign teso = !(rydu && xovu); + assign xyve = !(wamy && xovu); + assign vune = !(sega && xovu); + assign taby = !(sery && soka); + assign tapo = !(rama && soka); + assign tupe = !(sulu && soka); + assign tuxa = !(semo && soka); + assign pobe = xono ? md[4] : md[3]; + assign pacy = xono ? md[3] : md[4]; + assign pono = xono ? md[5] : md[2]; + assign pugu = xono ? md[2] : md[5]; + assign pute = xono ? md[7] : md[0]; + assign puly = xono ? md[0] : md[7]; + assign pelo = xono ? md[6] : md[1]; + assign pawe = xono ? md[1] : md[6]; + assign lubo = !pudu; + assign solo = !ramu; + assign lumo = !mytu; + assign lase = !mofo; + assign loza = !pefo; + assign rata = !rewo; + assign nuca = !peba; + assign sybo = !roka; + assign lufy = !(lubo && roby); + assign mame = !(pudu && roby); + assign rehu = !(solo && roby); + assign rano = !(ramu && roby); + assign majo = !(lumo && lyku); + assign myxa = !(mytu && lyku); + assign lyde = !(lase && lyku); + assign lela = !(mofo && lyku); + assign mofy = !(loza && lesy); + assign mezu = !(pefo && lesy); + assign pyzu = !(rata && lesy); + assign pabe = !(rewo && lesy); + assign mada = !(nuca && lota); + assign myto = !(peba && lota); + assign ruca = !(sybo && lota); + assign rusy = !(roka && lota); + assign voby = !sele; + assign wery = !saja; + assign wura = !suny; + assign wyco = !suto; + assign selu = !rydu; + assign wamy = !sega; + assign sery = !sery; + assign sulu = !semo; + assign waxo = !(voby && tyta); + assign tyga = !(sele && tyta); + assign xato = !(wery && tyta); + assign vexu = !(saja && tyta); + assign xexu = !(wura && tyco); + assign vaby = !(suny && tyco); + assign xole = !(wyco && tyco); + assign vume = !(suto && tyco); + assign tula = !(selu && xovu); + assign teso = !(rydu && xovu); + assign xyve = !(wamy && xovu); + assign vune = !(sega && xovu); + assign taby = !(sery && soka); + assign tapo = !(rama && soka); + assign tupe = !(sulu && soka); + assign tuxa = !(semo && soka); logic nuro, maso, lefe, lesu, wyho, wora, vafo, wufy; logic nylu, pefu, naty, pyjo, vare, weba, vanu, vupy; diff --git a/dmg_cpu_b/pages/p34_sprite_palette_shifter.sv b/dmg_cpu_b/pages/p34_sprite_palette_shifter.sv index 4f2b3e2..07943d5 100644 --- a/dmg_cpu_b/pages/p34_sprite_palette_shifter.sv +++ b/dmg_cpu_b/pages/p34_sprite_palette_shifter.sv @@ -24,49 +24,49 @@ module sprite_palette_shifter( dffsr dffsr_nuke(clkpipe, mene, pazo, palu, nuke); dffsr dffsr_moda(clkpipe, luke, lowa, nuke, moda); dffsr dffsr_lyme(clkpipe, lamy, lunu, moda, lyme); - assign #T_OR mefu = xefy || spr_pix_a[0] || spr_pix_b[0]; - assign #T_OR meve = xefy || spr_pix_a[1] || spr_pix_b[1]; - assign #T_OR myzo = xefy || spr_pix_a[2] || spr_pix_b[2]; - assign #T_OR ruda = xefy || spr_pix_a[3] || spr_pix_b[3]; - assign #T_OR voto = xefy || spr_pix_a[4] || spr_pix_b[4]; - assign #T_OR vysa = xefy || spr_pix_a[5] || spr_pix_b[5]; - assign #T_OR tory = xefy || spr_pix_a[6] || spr_pix_b[6]; - assign #T_OR wope = xefy || spr_pix_a[7] || spr_pix_b[7]; - assign #T_INV lesy = !mefu; - assign #T_INV lota = !meve; - assign #T_INV lyku = !myzo; - assign #T_INV roby = !ruda; - assign #T_INV tyta = !voto; - assign #T_INV tyco = !vysa; - assign #T_INV soka = !tory; - assign #T_INV xovu = !wope; - assign #T_INV sypy = !ngomo; - assign #T_INV totu = !ngomo; - assign #T_INV naro = !ngomo; - assign #T_INV wexy = !ngomo; - assign #T_INV ryzy = !ngomo; - assign #T_INV ryfe = !ngomo; - assign #T_INV lady = !ngomo; - assign #T_INV lafy = !ngomo; - assign #T_NAND pume = !(ngomo && lesy); - assign #T_NAND suco = !(sypy && lesy); - assign #T_NAND soro = !(ngomo && lota); - assign #T_NAND tafa = !(totu && lota); - assign #T_NAND pamo = !(ngomo && lyku); - assign #T_NAND pyzy = !(naro && lyku); - assign #T_NAND suky = !(ngomo && roby); - assign #T_NAND towa = !(wexy && roby); - assign #T_NAND rora = !(ngomo && tyta); - assign #T_NAND rudu = !(ryzy && tyta); - assign #T_NAND mene = !(ngomo && tyco); - assign #T_NAND pazo = !(ryfe && tyco); - assign #T_NAND luke = !(ngomo && soka); - assign #T_NAND lowa = !(lady && soka); - assign #T_NAND lamy = !(ngomo && xovu); - assign #T_NAND lunu = !(lafy && xovu); - assign #T_INV lome = !lyme; - assign #T_NAND lafu = !(lome && nbgpixel); - assign #T_NAND leka = !(lyme && nbgpixel); + assign mefu = xefy || spr_pix_a[0] || spr_pix_b[0]; + assign meve = xefy || spr_pix_a[1] || spr_pix_b[1]; + assign myzo = xefy || spr_pix_a[2] || spr_pix_b[2]; + assign ruda = xefy || spr_pix_a[3] || spr_pix_b[3]; + assign voto = xefy || spr_pix_a[4] || spr_pix_b[4]; + assign vysa = xefy || spr_pix_a[5] || spr_pix_b[5]; + assign tory = xefy || spr_pix_a[6] || spr_pix_b[6]; + assign wope = xefy || spr_pix_a[7] || spr_pix_b[7]; + assign lesy = !mefu; + assign lota = !meve; + assign lyku = !myzo; + assign roby = !ruda; + assign tyta = !voto; + assign tyco = !vysa; + assign soka = !tory; + assign xovu = !wope; + assign sypy = !ngomo; + assign totu = !ngomo; + assign naro = !ngomo; + assign wexy = !ngomo; + assign ryzy = !ngomo; + assign ryfe = !ngomo; + assign lady = !ngomo; + assign lafy = !ngomo; + assign pume = !(ngomo && lesy); + assign suco = !(sypy && lesy); + assign soro = !(ngomo && lota); + assign tafa = !(totu && lota); + assign pamo = !(ngomo && lyku); + assign pyzy = !(naro && lyku); + assign suky = !(ngomo && roby); + assign towa = !(wexy && roby); + assign rora = !(ngomo && tyta); + assign rudu = !(ryzy && tyta); + assign mene = !(ngomo && tyco); + assign pazo = !(ryfe && tyco); + assign luke = !(ngomo && soka); + assign lowa = !(lady && soka); + assign lamy = !(ngomo && xovu); + assign lunu = !(lafy && xovu); + assign lome = !lyme; + assign lafu = !(lome && nbgpixel); + assign leka = !(lyme && nbgpixel); assign nobp0pixel = lafu; assign nobp1pixel = leka; diff --git a/dmg_cpu_b/pages/p35_pixel_mux.sv b/dmg_cpu_b/pages/p35_pixel_mux.sv index 913e9da..826db8f 100644 --- a/dmg_cpu_b/pages/p35_pixel_mux.sv +++ b/dmg_cpu_b/pages/p35_pixel_mux.sv @@ -15,51 +15,51 @@ module pixel_mux( logic wufu, waly, moka, mufa, nura, nelo, paty, pero, ravo, remy; logic lyle, lozo, mexa, luku, maby, soba, vyco, ledo, lyky, lopu, laru; logic muve, nupo, nale, nypo, nuxo, numa, pobu; - assign #T_AND woxa = ff40_d1 && spr_pix_a[7]; - assign #T_AND xula = ff40_d1 && spr_pix_b[7]; - assign #T_AND tade = ff40_d0 && bg_pix_b_7; - assign #T_AND rajy = ff40_d0 && bg_pix_a_7; - assign #T_INV wele = !xula; - assign #T_INV vumu = !woxa; - assign #T_INV lava = !nobp0pixel; - assign #T_INV wolo = !wele; - assign #T_INV wyru = !vumu; - assign #T_NOR nuly = !(woxa || xula); - assign #T_AND ruta = tade && vava; - assign #T_AND ryfu = rajy && vava; - assign #T_NOR poka = !(nuly || ruta || ryfu); - assign #T_AND vyro = wyru && wolo && lava; - assign #T_AND vata = wyru && wele && lava; - assign #T_AND volo = vumu && wolo && lava; - assign #T_AND vugo = vumu && wele && lava; - assign #T_AO wufu = (obp0_d[7] && vyro) || (obp0_d[5] && vata) || (obp0_d[3] && volo) || (obp0_d[1] && vugo); - assign #T_AO waly = (vyro && obp0_d[6]) || (vata && obp0_d[4]) || (volo && obp0_d[2]) || (vugo && obp0_d[0]); - assign #T_AO moka = (obp1_d[7] && ledo) || (obp1_d[5] && laru) || (obp1_d[3] && lyky) || (obp1_d[1] && lopu); - assign #T_AO mufa = (ledo && obp1_d[6]) || (laru && obp1_d[4]) || (lyky && obp1_d[2]) || (lopu && obp1_d[0]); - assign #T_AO nura = (bgp_d[7] && nypo) || (bgp_d[5] && numa) || (bgp_d[3] && nuxo) || (bgp_d[1] && pobu); - assign #T_AO nelo = (nypo && bgp_d[6]) || (numa && bgp_d[4]) || (nuxo && bgp_d[2]) || (pobu && bgp_d[0]); - assign #T_OR paty = nura || wufu || moka; - assign #T_OR pero = nelo || waly || mufa; - assign #T_INV ravo = !paty; - assign #T_INV remy = !pero; - assign #T_INV lyle = !maby; - assign #T_INV lozo = !mexa; - assign #T_INV mexa = !woxa; - assign #T_INV luku = !nobp1pixel; - assign #T_INV maby = !xula; - assign #T_INV soba = !rajy; - assign #T_INV vyco = !tade; - assign #T_AND ledo = lozo && lyle && luku; - assign #T_AND lyky = mexa && lyle && luku; - assign #T_AND lopu = mexa && maby && luku; - assign #T_AND laru = lozo && maby && luku; - assign #T_INV muve = !nbgpixel; - assign #T_INV nupo = !soba; - assign #T_INV nale = !vyco; - assign #T_AND nypo = nale && nupo && muve; - assign #T_AND nuxo = vyco && nupo && muve; - assign #T_AND numa = nale && soba && muve; - assign #T_AND pobu = vyco && soba && muve; + assign woxa = ff40_d1 && spr_pix_a[7]; + assign xula = ff40_d1 && spr_pix_b[7]; + assign tade = ff40_d0 && bg_pix_b_7; + assign rajy = ff40_d0 && bg_pix_a_7; + assign wele = !xula; + assign vumu = !woxa; + assign lava = !nobp0pixel; + assign wolo = !wele; + assign wyru = !vumu; + assign nuly = !(woxa || xula); + assign ruta = tade && vava; + assign ryfu = rajy && vava; + assign poka = !(nuly || ruta || ryfu); + assign vyro = wyru && wolo && lava; + assign vata = wyru && wele && lava; + assign volo = vumu && wolo && lava; + assign vugo = vumu && wele && lava; + assign wufu = (obp0_d[7] && vyro) || (obp0_d[5] && vata) || (obp0_d[3] && volo) || (obp0_d[1] && vugo); + assign waly = (vyro && obp0_d[6]) || (vata && obp0_d[4]) || (volo && obp0_d[2]) || (vugo && obp0_d[0]); + assign moka = (obp1_d[7] && ledo) || (obp1_d[5] && laru) || (obp1_d[3] && lyky) || (obp1_d[1] && lopu); + assign mufa = (ledo && obp1_d[6]) || (laru && obp1_d[4]) || (lyky && obp1_d[2]) || (lopu && obp1_d[0]); + assign nura = (bgp_d[7] && nypo) || (bgp_d[5] && numa) || (bgp_d[3] && nuxo) || (bgp_d[1] && pobu); + assign nelo = (nypo && bgp_d[6]) || (numa && bgp_d[4]) || (nuxo && bgp_d[2]) || (pobu && bgp_d[0]); + assign paty = nura || wufu || moka; + assign pero = nelo || waly || mufa; + assign ravo = !paty; + assign remy = !pero; + assign lyle = !maby; + assign lozo = !mexa; + assign mexa = !woxa; + assign luku = !nobp1pixel; + assign maby = !xula; + assign soba = !rajy; + assign vyco = !tade; + assign ledo = lozo && lyle && luku; + assign lyky = mexa && lyle && luku; + assign lopu = mexa && maby && luku; + assign laru = lozo && maby && luku; + assign muve = !nbgpixel; + assign nupo = !soba; + assign nale = !vyco; + assign nypo = nale && nupo && muve; + assign nuxo = vyco && nupo && muve; + assign numa = nale && soba && muve; + assign pobu = vyco && soba && muve; assign nbgpixel = poka; assign nld1 = ravo; assign nld0 = remy; diff --git a/dmg_cpu_b/pages/p36_palettes.sv b/dmg_cpu_b/pages/p36_palettes.sv index c378e56..76bdc76 100644 --- a/dmg_cpu_b/pages/p36_palettes.sv +++ b/dmg_cpu_b/pages/p36_palettes.sv @@ -19,18 +19,18 @@ module palettes( dlatch_a latch_muke(!tepo, d[4], muke); dlatch_a latch_pylu(!tepo, d[2], pylu); dlatch_a latch_pavo(!tepo, d[0], pavo); - assign #T_AND vuso = cpu_rd2 && ff47; - assign #T_AND vely = cpu_wr2 && ff47; - assign #T_INV tepy = !vuso; - assign #T_INV tepo = !vely; - assign #T_TRI lary = !tepy ? !(!mena) : 'z; - assign #T_TRI lyka = !tepy ? !(!moru) : 'z; - assign #T_TRI lobe = !tepy ? !(!maxy) : 'z; - assign #T_TRI paba = !tepy ? !(!nusy) : 'z; - assign #T_TRI lody = !tepy ? !(!mogy) : 'z; - assign #T_TRI lace = !tepy ? !(!muke) : 'z; - assign #T_TRI redo = !tepy ? !(!pylu) : 'z; - assign #T_TRI raro = !tepy ? !(!pavo) : 'z; + assign vuso = cpu_rd2 && ff47; + assign vely = cpu_wr2 && ff47; + assign tepy = !vuso; + assign tepo = !vely; + assign lary = !tepy ? !(!mena) : 'z; + assign lyka = !tepy ? !(!moru) : 'z; + assign lobe = !tepy ? !(!maxy) : 'z; + assign paba = !tepy ? !(!nusy) : 'z; + assign lody = !tepy ? !(!mogy) : 'z; + assign lace = !tepy ? !(!muke) : 'z; + assign redo = !tepy ? !(!pylu) : 'z; + assign raro = !tepy ? !(!pavo) : 'z; assign bgp_d[7] = mena; assign bgp_d[5] = moru; assign bgp_d[3] = maxy; @@ -58,18 +58,18 @@ module palettes( dlatch_a latch_xeru(!xelo, d[4], xeru); dlatch_a latch_xova(!xelo, d[2], xova); dlatch_a latch_xufu(!xelo, d[0], xufu); - assign #T_AND xufy = cpu_rd2 && ff48; - assign #T_AND xoma = cpu_wr2 && ff48; - assign #T_INV xozy = !xufy; - assign #T_INV xelo = !xoma; - assign #T_TRI xawo = !xozy ? !(!xana) : 'z; - assign #T_TRI xobo = !xozy ? !(!xyze) : 'z; - assign #T_TRI xuby = !xozy ? !(!xalo) : 'z; - assign #T_TRI xoke = !xozy ? !(!xuky) : 'z; - assign #T_TRI xaxa = !xozy ? !(!xupo) : 'z; - assign #T_TRI xaju = !xozy ? !(!xeru) : 'z; - assign #T_TRI xuno = !xozy ? !(!xova) : 'z; - assign #T_TRI xary = !xozy ? !(!xufu) : 'z; + assign xufy = cpu_rd2 && ff48; + assign xoma = cpu_wr2 && ff48; + assign xozy = !xufy; + assign xelo = !xoma; + assign xawo = !xozy ? !(!xana) : 'z; + assign xobo = !xozy ? !(!xyze) : 'z; + assign xuby = !xozy ? !(!xalo) : 'z; + assign xoke = !xozy ? !(!xuky) : 'z; + assign xaxa = !xozy ? !(!xupo) : 'z; + assign xaju = !xozy ? !(!xeru) : 'z; + assign xuno = !xozy ? !(!xova) : 'z; + assign xary = !xozy ? !(!xufu) : 'z; assign obp0_d[7] = xana; assign obp0_d[5] = xyze; assign obp0_d[3] = xalo; @@ -97,18 +97,18 @@ module palettes( dlatch_a latch_lune(!leho, d[4], lune); dlatch_a latch_mosa(!leho, d[2], mosa); dlatch_a latch_moxy(!leho, d[0], moxy); - assign #T_AND mumy = cpu_rd2 && ff49; - assign #T_AND myxe = cpu_wr2 && ff49; - assign #T_INV lote = !mumy; - assign #T_INV leho = !myxe; - assign #T_TRI lelu = !lote ? !(!luxo) : 'z; - assign #T_TRI luga = !lote ? !(!lugu) : 'z; - assign #T_TRI lyza = !lote ? !(!lose) : 'z; - assign #T_TRI lepa = !lote ? !(!lawo) : 'z; - assign #T_TRI leba = !lote ? !(!lepu) : 'z; - assign #T_TRI luky = !lote ? !(!lune) : 'z; - assign #T_TRI lode = !lote ? !(!mosa) : 'z; - assign #T_TRI laju = !lote ? !(!moxy) : 'z; + assign mumy = cpu_rd2 && ff49; + assign myxe = cpu_wr2 && ff49; + assign lote = !mumy; + assign leho = !myxe; + assign lelu = !lote ? !(!luxo) : 'z; + assign luga = !lote ? !(!lugu) : 'z; + assign lyza = !lote ? !(!lose) : 'z; + assign lepa = !lote ? !(!lawo) : 'z; + assign leba = !lote ? !(!lepu) : 'z; + assign luky = !lote ? !(!lune) : 'z; + assign lode = !lote ? !(!mosa) : 'z; + assign laju = !lote ? !(!moxy) : 'z; assign obp1_d[7] = luxo; assign obp1_d[5] = lugu; assign obp1_d[3] = lose; diff --git a/dmg_cpu_b/pages/p3_timer.sv b/dmg_cpu_b/pages/p3_timer.sv index a9c750e..f411c05 100644 --- a/dmg_cpu_b/pages/p3_timer.sv +++ b/dmg_cpu_b/pages/p3_timer.sv @@ -15,17 +15,17 @@ module timer( dffr_bp dffr_sabo(sara, nreset2, d[2], sabo); dffr_bp dffr_samy(sara, nreset2, d[1], samy); dffr_bp dffr_sopu(sara, nreset2, d[0], sopu); - assign #T_NAND sara = !(a[0] && a[1] && cpu_wr && ff04_ff07); - assign #T_AND sora = ff04_ff07 && cpu_rd && a[1] && a[0]; - assign #T_INV uvyr = !_65536hz; - assign #T_INV ubot = !_262144hz; - assign #T_TRI supe = sora ? !(!sabo) : 'z; - assign #T_TRI rote = sora ? !(!samy) : 'z; - assign #T_TRI ryla = sora ? !(!sopu) : 'z; - assign #T_MUXI ukap = !(sopu ? _16384hz : uvyr); - assign #T_MUXI teko = !(sopu ? ubot : nff04_d1); - assign #T_MUXI tecy = !(samy ? ukap : teko); - assign #T_NOR sogu = !(tecy || !sabo); + assign sara = !(a[0] && a[1] && cpu_wr && ff04_ff07); + assign sora = ff04_ff07 && cpu_rd && a[1] && a[0]; + assign uvyr = !_65536hz; + assign ubot = !_262144hz; + assign supe = sora ? !(!sabo) : 'z; + assign rote = sora ? !(!samy) : 'z; + assign ryla = sora ? !(!sopu) : 'z; + assign ukap = !(sopu ? _16384hz : uvyr); + assign teko = !(sopu ? ubot : nff04_d1); + assign tecy = !(samy ? ukap : teko); + assign sogu = !(tecy || !sabo); assign d[2] = supe; assign d[1] = rote; assign d[0] = ryla; @@ -42,20 +42,20 @@ module timer( tffd tffd_nuga(peda, mexu, pagu, nuga); dffr_bp dffr_nydu(boga1mhz, mugy, nuga, nydu); dffr_bp dffr_moba(boga1mhz, nreset2, mery, moba); - assign #T_OR muzu = from_cpu5 || tope; - assign #T_INV meke = !int_timer; - assign #T_NAND mexu = !(muzu && nreset2 && meke); - assign #T_AND teda = ff04_ff07 && cpu_rd && tola_na1 && a[0]; - assign #T_INV mugy = !mexu; - assign #T_TRI soku = teda ? !(!rega) : 'z; - assign #T_TRI racy = teda ? !(!povy) : 'z; - assign #T_TRI ravy = teda ? !(!peru) : 'z; - assign #T_TRI sosy = teda ? !(!rate) : 'z; - assign #T_TRI somu = teda ? !(!ruby) : 'z; - assign #T_TRI suro = teda ? !(!rage) : 'z; - assign #T_TRI rowu = teda ? !(!peda) : 'z; - assign #T_TRI puso = teda ? !(!nuga) : 'z; - assign #T_NOR mery = !(!nydu || nuga); + assign muzu = from_cpu5 || tope; + assign meke = !int_timer; + assign mexu = !(muzu && nreset2 && meke); + assign teda = ff04_ff07 && cpu_rd && tola_na1 && a[0]; + assign mugy = !mexu; + assign soku = teda ? !(!rega) : 'z; + assign racy = teda ? !(!povy) : 'z; + assign ravy = teda ? !(!peru) : 'z; + assign sosy = teda ? !(!rate) : 'z; + assign somu = teda ? !(!ruby) : 'z; + assign suro = teda ? !(!rage) : 'z; + assign rowu = teda ? !(!peda) : 'z; + assign puso = teda ? !(!nuga) : 'z; + assign mery = !(!nydu || nuga); assign d[0] = soku; assign d[1] = racy; assign d[2] = ravy; @@ -77,35 +77,35 @@ module timer( dffr_bp dffr_tyru(tyju, nreset2, d[4], tyru); dffr_bp dffr_sufy(tyju, nreset2, d[5], sufy); dffr_bp dffr_tyva(tyju, nreset2, d[3], tyva); - assign #T_INV tovy = !a[0]; - assign #T_AND tuby = ff04_ff07 && cpu_rd && a[1] && tovy; - assign #T_NAND tyju = !(tovy && a[1] && cpu_wr && ff04_ff07); - assign #T_NAND tope = !(a[0] && tola_na1 && cpu_wr && ff04_ff07); - assign #T_INV mulo = !nreset2; - assign #T_TRI reva = tuby ? !(!peto) : 'z; - assign #T_TRI nola = tuby ? !(!muru) : 'z; - assign #T_TRI pyre = tuby ? !(!nyke) : 'z; - assign #T_TRI sapu = tuby ? !(!seta) : 'z; - assign #T_TRI sete = tuby ? !(!sabu) : 'z; - assign #T_TRI supo = tuby ? !(!tyru) : 'z; - assign #T_TRI sotu = tuby ? !(!sufy) : 'z; - assign #T_TRI salu = tuby ? !(!tyva) : 'z; - assign #T_MUXI refu = !(tope ? peto : d[6]); - assign #T_MUXI nyku = !(tope ? muru : d[2]); - assign #T_MUXI petu = !(tope ? nyke : d[1]); - assign #T_MUXI rato = !(tope ? seta : d[7]); - assign #T_MUXI roke = !(tope ? sabu : d[0]); - assign #T_MUXI sala = !(tope ? tyru : d[4]); - assign #T_MUXI syru = !(tope ? sufy : d[5]); - assign #T_MUXI soce = !(tope ? tyva : d[3]); - assign #T_NOR pyma = !(mulo || refu); - assign #T_NOR nada = !(mulo || nyku); - assign #T_NOR nero = !(mulo || petu); - assign #T_NOR pagu = !(mulo || rato); - assign #T_NOR puxy = !(mulo || roke); - assign #T_NOR rolu = !(mulo || sala); - assign #T_NOR rugy = !(mulo || syru); - assign #T_NOR repa = !(mulo || soce); + assign tovy = !a[0]; + assign tuby = ff04_ff07 && cpu_rd && a[1] && tovy; + assign tyju = !(tovy && a[1] && cpu_wr && ff04_ff07); + assign tope = !(a[0] && tola_na1 && cpu_wr && ff04_ff07); + assign mulo = !nreset2; + assign reva = tuby ? !(!peto) : 'z; + assign nola = tuby ? !(!muru) : 'z; + assign pyre = tuby ? !(!nyke) : 'z; + assign sapu = tuby ? !(!seta) : 'z; + assign sete = tuby ? !(!sabu) : 'z; + assign supo = tuby ? !(!tyru) : 'z; + assign sotu = tuby ? !(!sufy) : 'z; + assign salu = tuby ? !(!tyva) : 'z; + assign refu = !(tope ? peto : d[6]); + assign nyku = !(tope ? muru : d[2]); + assign petu = !(tope ? nyke : d[1]); + assign rato = !(tope ? seta : d[7]); + assign roke = !(tope ? sabu : d[0]); + assign sala = !(tope ? tyru : d[4]); + assign syru = !(tope ? sufy : d[5]); + assign soce = !(tope ? tyva : d[3]); + assign pyma = !(mulo || refu); + assign nada = !(mulo || nyku); + assign nero = !(mulo || petu); + assign pagu = !(mulo || rato); + assign puxy = !(mulo || roke); + assign rolu = !(mulo || sala); + assign rugy = !(mulo || syru); + assign repa = !(mulo || soce); assign tovy_na0 = tovy; assign d[6] = reva; assign d[2] = nola; diff --git a/dmg_cpu_b/pages/p4_dma.sv b/dmg_cpu_b/pages/p4_dma.sv index b951e4b..207465b 100644 --- a/dmg_cpu_b/pages/p4_dma.sv +++ b/dmg_cpu_b/pages/p4_dma.sv @@ -17,39 +17,39 @@ module dma( dffr_bp dffr_maka(clk1, nreset6, caty, maka); dffr_bp dffr_luvy(phi_out, nreset6, lupa, luvy); nor_srlatch latch_lyxe(lavy, loko, lyxe, nlyxe); - assign #T_INV decy = !from_cpu5; - assign #T_INV caty = !decy; - assign #T_NOR naxy = !(maka || phi_out); - assign #T_AND powu = matu && naxy; - assign #T_AO wyja = (amab && cpu_wr2) || powu; - assign #T_AND molu = ff46 && cpu_rd2; - assign #T_INV nygo = !molu; - assign #T_INV pusy = !nygo; - assign #T_AND lavy = cpu_wr2 && ff46; - assign #T_INV loru = !lavy; - assign #T_NOR lupa = !(lavy || nlyxe); - assign #T_INV ahoc = !vram_to_oam; - assign #T_NAND loko = !(nreset6 && !lene); - assign #T_INV lapa = !loko; - assign #T_AND meta = phi_out && loky; + assign decy = !from_cpu5; + assign caty = !decy; + assign naxy = !(maka || phi_out); + assign powu = matu && naxy; + assign wyja = (amab && cpu_wr2) || powu; + assign molu = ff46 && cpu_rd2; + assign nygo = !molu; + assign pusy = !nygo; + assign lavy = cpu_wr2 && ff46; + assign loru = !lavy; + assign lupa = !(lavy || nlyxe); + assign ahoc = !vram_to_oam; + assign loko = !(nreset6 && !lene); + assign lapa = !loko; + assign meta = phi_out && loky; logic mopa, navo, nolo, myte, lene, lara, loky, matu, mory, luma, logo, duga, lebu, muda, muho, lufa; dffr_bp dffr_myte(mopa, lapa, nolo, myte); dffr_bp dffr_lene(mopa, nreset6, luvy, lene); dffr_bp dffr_matu(phi_out, nreset6, loky, matu); - assign #T_INV mopa = !phi_out; - assign #T_NAND navo = !(dma_a[0] && dma_a[1] && dma_a[2] && dma_a[3] && dma_a[4] && dma_a[7]); - assign #T_INV nolo = !navo; - assign #T_NAND lara = !(loky && !myte && nreset6); - assign #T_NAND loky = !(lara && !lene); - assign #T_NAND mory = !(matu && logo); - assign #T_INV luma = !mory; - assign #T_INV logo = !muda; - assign #T_INV duga = !matu; - assign #T_INV lebu = !dma_a[15]; - assign #T_NOR muda = !(dma_a[13] || dma_a[14] || lebu); - assign #T_NAND muho = !(matu && muda); - assign #T_INV lufa = !muho; + assign mopa = !phi_out; + assign navo = !(dma_a[0] && dma_a[1] && dma_a[2] && dma_a[3] && dma_a[4] && dma_a[7]); + assign nolo = !navo; + assign lara = !(loky && !myte && nreset6); + assign loky = !(lara && !lene); + assign mory = !(matu && logo); + assign luma = !mory; + assign logo = !muda; + assign duga = !matu; + assign lebu = !dma_a[15]; + assign muda = !(dma_a[13] || dma_a[14] || lebu); + assign muho = !(matu && muda); + assign lufa = !muho; assign mopa_nphi = mopa; assign dma_run = matu; assign dma_addr_ext = luma; @@ -66,19 +66,19 @@ module dma( dlatch_a latch_nydo(!loru, d[3], nydo); dlatch_a latch_poku(!loru, d[6], poku); dlatch_a latch_maru(!loru, d[7], maru); - assign #T_TRI poly = pusy ? !(!nafa) : 'z; - assign #T_TRI pare = pusy ? !(!nygy) : 'z; - assign #T_TRI rema = pusy ? !(!para) : 'z; - assign #T_TRI rofo = pusy ? !(!pyne) : 'z; - assign #T_TRI raly = pusy ? !(!pula) : 'z; - assign #T_TRI pane = pusy ? !(!nydo) : 'z; - assign #T_TRI resu = pusy ? !(!poku) : 'z; - assign #T_TRI nuvy = pusy ? !(!maru) : 'z; - assign #T_TRI evax = !ahoc ? !nafa : 'z; - assign #T_TRI exyf = !ahoc ? !nygy : 'z; - assign #T_TRI eraf = !ahoc ? !para : 'z; - assign #T_TRI duve = !ahoc ? !pyne : 'z; - assign #T_TRI fusy = !ahoc ? !nydo : 'z; + assign poly = pusy ? !(!nafa) : 'z; + assign pare = pusy ? !(!nygy) : 'z; + assign rema = pusy ? !(!para) : 'z; + assign rofo = pusy ? !(!pyne) : 'z; + assign raly = pusy ? !(!pula) : 'z; + assign pane = pusy ? !(!nydo) : 'z; + assign resu = pusy ? !(!poku) : 'z; + assign nuvy = pusy ? !(!maru) : 'z; + assign evax = !ahoc ? !nafa : 'z; + assign exyf = !ahoc ? !nygy : 'z; + assign eraf = !ahoc ? !para : 'z; + assign duve = !ahoc ? !pyne : 'z; + assign fusy = !ahoc ? !nydo : 'z; assign d[0] = poly; assign d[4] = pare; assign d[2] = rema; @@ -110,14 +110,14 @@ module dma( dffr_bp dffr_pylo(!nyko, lapa, !pylo, pylo); dffr_bp dffr_nuto(!pylo, lapa, !nuto, nuto); dffr_bp dffr_mugu(!nuto, lapa, !mugu, mugu); - assign #T_TRI ecal = !ahoc ? !naky : 'z; - assign #T_TRI egez = !ahoc ? !pyro : 'z; - assign #T_TRI fuhe = !ahoc ? !nefy : 'z; - assign #T_TRI fyzy = !ahoc ? !muty : 'z; - assign #T_TRI damu = !ahoc ? !nyko : 'z; - assign #T_TRI dava = !ahoc ? !pylo : 'z; - assign #T_TRI eteg = !ahoc ? !nuto : 'z; - assign #T_TRI erew = !ahoc ? !mugu : 'z; + assign ecal = !ahoc ? !naky : 'z; + assign egez = !ahoc ? !pyro : 'z; + assign fuhe = !ahoc ? !nefy : 'z; + assign fyzy = !ahoc ? !muty : 'z; + assign damu = !ahoc ? !nyko : 'z; + assign dava = !ahoc ? !pylo : 'z; + assign eteg = !ahoc ? !nuto : 'z; + assign erew = !ahoc ? !mugu : 'z; assign dma_a[0] = naky; assign dma_a[1] = pyro; assign dma_a[2] = nefy; diff --git a/dmg_cpu_b/pages/p5_joypad_io.sv b/dmg_cpu_b/pages/p5_joypad_io.sv index 2aae8c4..ee6aaa8 100644 --- a/dmg_cpu_b/pages/p5_joypad_io.sv +++ b/dmg_cpu_b/pages/p5_joypad_io.sv @@ -38,28 +38,28 @@ module joypad_io( dlatch_b latch_keja(byzo, p12_c, keja); dlatch_b latch_kevu(byzo, p10_c, kevu); dlatch_b latch_kapa(byzo, p11_c, kapa); - assign #T_INV jeva = !ff60_d0; - assign #T_NAND kore = !(keru && ff60_d0); - assign #T_NOR kywe = !(jeva || keru); - assign #T_MUXI kena = !(ff60_d0 ? kuko : ser_out); - assign #T_NAND kory = !(kyme && ff60_d0); - assign #T_NOR kale = !(kyme || kura); - assign #T_NAND kyhu = !(ff60_d0 && jale); - assign #T_NOR kasy = !(jale || kura); - assign #T_INV byzo = !ff00rd; - assign #T_TRI jeku = !byzo ? !kolo : 'z; - assign #T_TRI kuve = !byzo ? !keja : 'z; - assign #T_TRI kema = !byzo ? !kevu : 'z; - assign #T_TRI kuro = !byzo ? !kapa : 'z; - assign #T_OR karu = kura || !kely; - assign #T_TRI koce = !byzo ? !(!kely) : 'z; - assign #T_TRI cudy = !byzo ? !(!cofy) : 'z; - assign #T_OR cela = !cofy || kura; - assign #T_INV kura = !ff60_d0; - assign #T_NAND kole = !(jute && ff60_d0); - assign #T_NOR kybu = !(jute || kura); - assign #T_NAND kyto = !(kecy && ff60_d0); - assign #T_NOR kabu = !(kecy || kura); + assign jeva = !ff60_d0; + assign kore = !(keru && ff60_d0); + assign kywe = !(jeva || keru); + assign kena = !(ff60_d0 ? kuko : ser_out); + assign kory = !(kyme && ff60_d0); + assign kale = !(kyme || kura); + assign kyhu = !(ff60_d0 && jale); + assign kasy = !(jale || kura); + assign byzo = !ff00rd; + assign jeku = !byzo ? !kolo : 'z; + assign kuve = !byzo ? !keja : 'z; + assign kema = !byzo ? !kevu : 'z; + assign kuro = !byzo ? !kapa : 'z; + assign karu = kura || !kely; + assign koce = !byzo ? !(!kely) : 'z; + assign cudy = !byzo ? !(!cofy) : 'z; + assign cela = !cofy || kura; + assign kura = !ff60_d0; + assign kole = !(jute && ff60_d0); + assign kybu = !(jute || kura); + assign kyto = !(kecy && ff60_d0); + assign kabu = !(kecy || kura); assign sin_a = kore; assign sin_d = kywe; assign nsout = kena; @@ -83,18 +83,18 @@ module joypad_io( assign p11_d = kabu; logic axyn, adyr, apys, afop, anoc, ajec, arar, benu, akaj, asuz, ataj, beda; - assign #T_INV axyn = !bedo; - assign #T_INV adyr = !axyn; - assign #T_NOR apys = !(t1_nt2 || adyr); - assign #T_INV afop = !apys; - assign #T_TRI anoc = !afop ? !0 : 'z; - assign #T_TRI ajec = !afop ? !0 : 'z; - assign #T_TRI arar = !afop ? !0 : 'z; - assign #T_TRI benu = !afop ? !0 : 'z; - assign #T_TRI akaj = !afop ? !0 : 'z; - assign #T_TRI asuz = !afop ? !0 : 'z; - assign #T_TRI ataj = !afop ? !0 : 'z; - assign #T_TRI beda = !afop ? !0 : 'z; + assign axyn = !bedo; + assign adyr = !axyn; + assign apys = !(t1_nt2 || adyr); + assign afop = !apys; + assign anoc = !afop ? !0 : 'z; + assign ajec = !afop ? !0 : 'z; + assign arar = !afop ? !0 : 'z; + assign benu = !afop ? !0 : 'z; + assign akaj = !afop ? !0 : 'z; + assign asuz = !afop ? !0 : 'z; + assign ataj = !afop ? !0 : 'z; + assign beda = !afop ? !0 : 'z; assign d[0] = anoc; assign d[2] = ajec; assign d[6] = arar; diff --git a/dmg_cpu_b/pages/p6_serial_link.sv b/dmg_cpu_b/pages/p6_serial_link.sv index 701207f..4bb0654 100644 --- a/dmg_cpu_b/pages/p6_serial_link.sv +++ b/dmg_cpu_b/pages/p6_serial_link.sv @@ -22,19 +22,19 @@ module serial_link( dffr_bp dffr_cylo(!cafa, caro, !cylo, cylo); dffr_bp dffr_cyde(!cylo, caro, !cyde, cyde); dffr_bp dffr_caly(!cyde, caro, !caly, caly); - assign #T_NAND uwam = !(tovy_na0 && a[1] && cpu_wr && sano); - assign #T_AND ucom = sano && cpu_rd && a[1] && tovy_na0; - assign #T_MUXI cave = !(culy ? coty : sck_in); - assign #T_OR dawa = cave || !etaf; - assign #T_TRI eluv = ucom ? !(!etaf) : 'z; - assign #T_TRI core = ucom ? !(!culy) : 'z; - assign #T_AND caro = uwam && nreset2; - assign #T_NAND kexu = !(dawa && sck_dir); - assign #T_INV jago = !sck_dir; - assign #T_INV edyl = !dawa; - assign #T_NOR kujo = !(jago || dawa); - assign #T_INV coba = !caly; - assign #T_AND caby = coba && nreset2; + assign uwam = !(tovy_na0 && a[1] && cpu_wr && sano); + assign ucom = sano && cpu_rd && a[1] && tovy_na0; + assign cave = !(culy ? coty : sck_in); + assign dawa = cave || !etaf; + assign eluv = ucom ? !(!etaf) : 'z; + assign core = ucom ? !(!culy) : 'z; + assign caro = uwam && nreset2; + assign kexu = !(dawa && sck_dir); + assign jago = !sck_dir; + assign edyl = !dawa; + assign kujo = !(jago || dawa); + assign coba = !caly; + assign caby = coba && nreset2; assign _8192hz = coty; assign sck_dir = culy; assign d[7] = eluv; @@ -56,40 +56,40 @@ module serial_link( dffsr dffsr_erod(epyt, edel, efak, ejab, erod); dffsr dffsr_eder(epyt, efef, eguv, erod, eder); dffr_bp dffr_elys(nser_tick, nreset2, eder, elys); - assign #T_NOR sare = !(a[7] || a[6] || a[5] || a[4] || a[3]); - assign #T_INV sefy = !a[2]; - assign #T_AND sano = sefy && sare && ffxx; - assign #T_NAND urys = !(sano && cpu_wr && tola_na1 && a[0]); - assign #T_INV daku = !urys; - assign #T_INV epyt = !nser_tick; - assign #T_INV deho = !epyt; - assign #T_INV dawe = !deho; - assign #T_INV cage = !sin_in; - assign #T_AND ufeg = sano && cpu_rd && tola_na1 && a[0]; - assign #T_OA cohy = (urys || d[0]) && nreset2; - assign #T_OA dumo = (urys || d[1]) && nreset2; - assign #T_OA dybo = (urys || d[2]) && nreset2; - assign #T_OA daju = (urys || d[3]) && nreset2; - assign #T_OA dyly = (urys || d[4]) && nreset2; - assign #T_OA ehuj = (urys || d[5]) && nreset2; - assign #T_OA efak = (urys || d[6]) && nreset2; - assign #T_OA eguv = (urys || d[7]) && nreset2; - assign #T_NAND cufu = !(d[0] && daku); - assign #T_NAND docu = !(d[1] && daku); - assign #T_NAND dela = !(d[2] && daku); - assign #T_NAND dyge = !(d[3] && daku); - assign #T_NAND dola = !(d[4] && daku); - assign #T_NAND elok = !(d[5] && daku); - assign #T_NAND edel = !(d[6] && daku); - assign #T_NAND efef = !(d[7] && daku); - assign #T_TRI cugy = ufeg ? !(!cuba) : 'z; - assign #T_TRI dude = ufeg ? !(!degu) : 'z; - assign #T_TRI detu = ufeg ? !(!dyra) : 'z; - assign #T_TRI daso = ufeg ? !(!dojo) : 'z; - assign #T_TRI dame = ufeg ? !(!dovu) : 'z; - assign #T_TRI evok = ufeg ? !(!ejab) : 'z; - assign #T_TRI efab = ufeg ? !(!erod) : 'z; - assign #T_TRI etak = ufeg ? !(!eder) : 'z; + assign sare = !(a[7] || a[6] || a[5] || a[4] || a[3]); + assign sefy = !a[2]; + assign sano = sefy && sare && ffxx; + assign urys = !(sano && cpu_wr && tola_na1 && a[0]); + assign daku = !urys; + assign epyt = !nser_tick; + assign deho = !epyt; + assign dawe = !deho; + assign cage = !sin_in; + assign ufeg = sano && cpu_rd && tola_na1 && a[0]; + assign cohy = (urys || d[0]) && nreset2; + assign dumo = (urys || d[1]) && nreset2; + assign dybo = (urys || d[2]) && nreset2; + assign daju = (urys || d[3]) && nreset2; + assign dyly = (urys || d[4]) && nreset2; + assign ehuj = (urys || d[5]) && nreset2; + assign efak = (urys || d[6]) && nreset2; + assign eguv = (urys || d[7]) && nreset2; + assign cufu = !(d[0] && daku); + assign docu = !(d[1] && daku); + assign dela = !(d[2] && daku); + assign dyge = !(d[3] && daku); + assign dola = !(d[4] && daku); + assign elok = !(d[5] && daku); + assign edel = !(d[6] && daku); + assign efef = !(d[7] && daku); + assign cugy = ufeg ? !(!cuba) : 'z; + assign dude = ufeg ? !(!degu) : 'z; + assign detu = ufeg ? !(!dyra) : 'z; + assign daso = ufeg ? !(!dojo) : 'z; + assign dame = ufeg ? !(!dovu) : 'z; + assign evok = ufeg ? !(!ejab) : 'z; + assign efab = ufeg ? !(!erod) : 'z; + assign etak = ufeg ? !(!eder) : 'z; assign a00_07 = sare; assign d[0] = cugy; assign d[1] = dude; diff --git a/dmg_cpu_b/pages/p7_sys_decode.sv b/dmg_cpu_b/pages/p7_sys_decode.sv index 8cdceb8..2bb4541 100644 --- a/dmg_cpu_b/pages/p7_sys_decode.sv +++ b/dmg_cpu_b/pages/p7_sys_decode.sv @@ -22,25 +22,25 @@ module sys_decode( ); logic ubet, uvar, upoj, unor, umut; - assign #T_INV ubet = !nt1; - assign #T_INV uvar = !nt2; - assign #T_NAND upoj = !(ubet && uvar && reset); - assign #T_AND unor = nt2 && ubet; - assign #T_AND umut = uvar && nt1; + assign ubet = !nt1; + assign uvar = !nt2; + assign upoj = !(ubet && uvar && reset); + assign unor = nt2 && ubet; + assign umut = uvar && nt1; assign t1t2_nrst = upoj; assign t1_nt2 = unor; assign nt1_t2 = umut; logic ubal, ujyv, lexy, tapu, tedo, dyky, ajas, cupa, asot, pin_nc; - assign #T_MUXI ubal = !(t1_nt2 ? wr_in : cpu_wr_sync); - assign #T_MUXI ujyv = !(t1_nt2 ? rd_b : cpu_raw_rd); - assign #T_INV lexy = !from_cpu6; - assign #T_INV tapu = !ubal; - assign #T_INV tedo = !ujyv; - assign #T_INV dyky = !tapu; - assign #T_INV ajas = !tedo; - assign #T_INV cupa = !dyky; - assign #T_INV asot = !ajas; + assign ubal = !(t1_nt2 ? wr_in : cpu_wr_sync); + assign ujyv = !(t1_nt2 ? rd_b : cpu_raw_rd); + assign lexy = !from_cpu6; + assign tapu = !ubal; + assign tedo = !ujyv; + assign dyky = !tapu; + assign ajas = !tedo; + assign cupa = !dyky; + assign asot = !ajas; assign pin_nc = lexy; assign cpu_wr = tapu; assign cpu_wr2 = cupa; @@ -48,11 +48,11 @@ module sys_decode( assign cpu_rd2 = asot; logic ryfo, semy, sapa, rolo, refa; - assign #T_AND ryfo = a[2] && a00_07 && ffxx; - assign #T_NOR semy = !(a[7] || a[6] || a[5] || a[4]); - assign #T_AND sapa = a[0] && a[1] && a[2] && a[3]; - assign #T_NAND rolo = !(semy && sapa && ffxx && cpu_rd); - assign #T_NAND refa = !(semy && sapa && ffxx && cpu_wr); + assign ryfo = a[2] && a00_07 && ffxx; + assign semy = !(a[7] || a[6] || a[5] || a[4]); + assign sapa = a[0] && a[1] && a[2] && a[3]; + assign rolo = !(semy && sapa && ffxx && cpu_rd); + assign refa = !(semy && sapa && ffxx && cpu_wr); assign ff04_ff07 = ryfo; assign nff0f_rd = rolo; assign nff0f_wr = refa; @@ -61,26 +61,26 @@ module sys_decode( logic zete, zefu, zyro, zapa, bootrom_na7, bootrom_na6, bootrom_na3, bootrom_na2; logic bootrom_na5_na4, bootrom_na5_a4, bootrom_a5_na4, bootrom_a5_a4; logic bootrom_na1_na0, bootrom_na1_a0, bootrom_a1_na0, bootrom_a1_a0; - assign #T_INV zyra = !a[7]; - assign #T_INV zage = !a[6]; - assign #T_INV zabu = !a[3]; - assign #T_INV zoke = !a[2]; - assign #T_INV zera = !a[5]; - assign #T_INV zufy = !a[4]; - assign #T_AND zyky = zera && zufy; - assign #T_AND zyga = zera && a[4]; - assign #T_AND zovy = a[5] && zufy; - assign #T_AND zuko = a[5] && a[4]; - assign #T_INV zuvy = !a[1]; - assign #T_INV zyba = !a[0]; - assign #T_AND zole = zuvy && zyba; - assign #T_AND zaje = zuvy && a[0]; - assign #T_AND zubu = zyba && a[1]; - assign #T_AND zapy = a[1] && a[0]; - assign #T_INV zete = !zole; - assign #T_INV zefu = !zaje; - assign #T_INV zyro = !zubu; - assign #T_INV zapa = !zapy; + assign zyra = !a[7]; + assign zage = !a[6]; + assign zabu = !a[3]; + assign zoke = !a[2]; + assign zera = !a[5]; + assign zufy = !a[4]; + assign zyky = zera && zufy; + assign zyga = zera && a[4]; + assign zovy = a[5] && zufy; + assign zuko = a[5] && a[4]; + assign zuvy = !a[1]; + assign zyba = !a[0]; + assign zole = zuvy && zyba; + assign zaje = zuvy && a[0]; + assign zubu = zyba && a[1]; + assign zapy = a[1] && a[0]; + assign zete = !zole; + assign zefu = !zaje; + assign zyro = !zubu; + assign zapa = !zapy; assign bootrom_na7 = zyra; assign bootrom_na6 = zage; assign bootrom_na3 = zabu; @@ -95,23 +95,23 @@ module sys_decode( assign bootrom_a1_a0 = zapa; logic apet, aper, amut, buro; - assign #T_OR apet = t1_nt2 || nt1_t2; - assign #T_NAND aper = !(apet && a[5] && a[6] && cpu_wr && anap); + assign apet = t1_nt2 || nt1_t2; + assign aper = !(apet && a[5] && a[6] && cpu_wr && anap); dffr_bp dffr_amut(aper, nreset2, d[1], amut); dffr_bp dffr_buro(aper, nreset2, d[0], buro); assign ff60_d1 = amut; assign ff60_d0 = buro; logic leco, raru, rowe, ryke, ryne, rase, rejy, reka, romy; - assign #T_NOR leco = !(bedo || t1_nt2); - assign #T_TRI raru = leco ? !0 : 'z; - assign #T_TRI rowe = leco ? !0 : 'z; - assign #T_TRI ryke = leco ? !0 : 'z; - assign #T_TRI ryne = leco ? !0 : 'z; - assign #T_TRI rase = leco ? !0 : 'z; - assign #T_TRI rejy = leco ? !0 : 'z; - assign #T_TRI reka = leco ? !0 : 'z; - assign #T_TRI romy = leco ? !0 : 'z; + assign leco = !(bedo || t1_nt2); + assign raru = leco ? !0 : 'z; + assign rowe = leco ? !0 : 'z; + assign ryke = leco ? !0 : 'z; + assign ryne = leco ? !0 : 'z; + assign rase = leco ? !0 : 'z; + assign rejy = leco ? !0 : 'z; + assign reka = leco ? !0 : 'z; + assign romy = leco ? !0 : 'z; assign d[7] = raru; assign d[5] = rowe; assign d[6] = ryke; @@ -122,42 +122,42 @@ module sys_decode( assign d[0] = romy; logic wale, woly, wuta; - assign #T_NAND wale = !(a[0] && a[1] && a[2] && a[3] && a[4] && a[5] && a[6]); - assign #T_NAND woly = !(wale && a[7] && ffxx); - assign #T_INV wuta = !woly; + assign wale = !(a[0] && a[1] && a[2] && a[3] && a[4] && a[5] && a[6]); + assign woly = !(wale && a[7] && ffxx); + assign wuta = !woly; assign hram_cs = wuta; logic tona, syke, bako, tuna, rycu, rope, soha; - assign #T_INV tona = !a[8]; - assign #T_NAND tuna = !(a[15] && a[14] && a[13] && a[12] && a[11] && a[10] && a[9]); - assign #T_NOR syke = !(tona || tuna); - assign #T_INV bako = !syke; - assign #T_INV rycu = !tuna; - assign #T_INV soha = !ffxx; - assign #T_NAND rope = !(rycu && soha); - assign #T_INV saro = !rope; + assign tona = !a[8]; + assign tuna = !(a[15] && a[14] && a[13] && a[12] && a[11] && a[10] && a[9]); + assign syke = !(tona || tuna); + assign bako = !syke; + assign rycu = !tuna; + assign soha = !ffxx; + assign rope = !(rycu && soha); + assign saro = !rope; assign ffxx = syke; assign nffxx = bako; assign nfexxffxx = tuna; logic tyro, tufa, texe, sato, tuge, tepu, sypu, tera, yaza, yula, tulo, zoro, zadu, zufa, zado, zery; dffr_bp dffr_tepu(tuge, nreset2, sato, tepu); - assign #T_NOR tyro = !(a[7] || a[5] || a[3] || a[2] || a[1] || a[0]); - assign #T_AND tufa = a[4] && a[6]; - assign #T_AND texe = cpu_rd && ffxx && tufa && tyro; - assign #T_OR sato = d[0] || tepu; - assign #T_NAND tuge = !(tyro && tufa && ffxx && cpu_wr); - assign #T_TRI sypu = texe ? !(!tepu) : 'z; - assign #T_INV tera = !tepu; - assign #T_INV yaza = !nt1_t2; - assign #T_AND tutu = tera && tulo; - assign #T_AND yula = yaza && tutu && cpu_rd; - assign #T_NOR tulo = !(a[15] || a[14] || a[13] || a[12] || a[11] || a[10] || a[9] || a[8]); - assign #T_NOR zoro = !(a[15] || a[14] || a[13] || a[12]); - assign #T_NOR zadu = !(a[11] || a[10] || a[9] || a[8]); - assign #T_AND zufa = zoro && zadu; - assign #T_NAND zado = !(yula && zufa); - assign #T_INV zery = !zado; + assign tyro = !(a[7] || a[5] || a[3] || a[2] || a[1] || a[0]); + assign tufa = a[4] && a[6]; + assign texe = cpu_rd && ffxx && tufa && tyro; + assign sato = d[0] || tepu; + assign tuge = !(tyro && tufa && ffxx && cpu_wr); + assign sypu = texe ? !(!tepu) : 'z; + assign tera = !tepu; + assign yaza = !nt1_t2; + assign tutu = tera && tulo; + assign yula = yaza && tutu && cpu_rd; + assign tulo = !(a[15] || a[14] || a[13] || a[12] || a[11] || a[10] || a[9] || a[8]); + assign zoro = !(a[15] || a[14] || a[13] || a[12]); + assign zadu = !(a[11] || a[10] || a[9] || a[8]); + assign zufa = zoro && zadu; + assign zado = !(yula && zufa); + assign zery = !zado; assign boot_cs = zery; endmodule diff --git a/dmg_cpu_b/pages/p8_ext_cpu_busses.sv b/dmg_cpu_b/pages/p8_ext_cpu_busses.sv index d92f11f..48d6258 100644 --- a/dmg_cpu_b/pages/p8_ext_cpu_busses.sv +++ b/dmg_cpu_b/pages/p8_ext_cpu_busses.sv @@ -21,19 +21,19 @@ module ext_cpu_busses( ); logic sogy, tuma, tynu, toza, soby, sepy, ryca, raza, syzu, tyho, tazy, rulo, suze; - assign #T_INV sogy = !a[14]; - assign #T_AND tuma = a[13] && sogy && a[15]; - assign #T_AO tynu = (a[15] && a[14]) || tuma; - assign #T_AND toza = tynu && abuz && nfexxffxx; - assign #T_NOR soby = !(a[15] || tutu); - assign #T_NAND sepy = !(abuz && soby); - assign #T_INV ryca = !t1_nt2; - assign #T_INV raza = a_c[15]; - assign #T_TRIB syzu = !ryca ? raza : 'z; - assign #T_MUX tyho = dma_addr_ext ? dma_a[15] : toza; - assign #T_MUX tazy = dma_addr_ext ? dma_a[15] : sepy; - assign #T_NOR rulo = !(t1_nt2 || tazy); - assign #T_NAND suze = !(tazy && ryca); + assign sogy = !a[14]; + assign tuma = a[13] && sogy && a[15]; + assign tynu = (a[15] && a[14]) || tuma; + assign toza = tynu && abuz && nfexxffxx; + assign soby = !(a[15] || tutu); + assign sepy = !(abuz && soby); + assign ryca = !t1_nt2; + assign raza = a_c[15]; + assign syzu = !ryca ? raza : 'z; + assign tyho = dma_addr_ext ? dma_a[15] : toza; + assign tazy = dma_addr_ext ? dma_a[15] : sepy; + assign rulo = !(t1_nt2 || tazy); + assign suze = !(tazy && ryca); assign cs_out = tyho; assign a_d[15] = rulo; assign a_a[15] = suze; @@ -48,28 +48,28 @@ module ext_cpu_busses( dlatch_b latch_pate(mate, a[10], pate); dlatch_b latch_lysa(mate, a[9], lysa); dlatch_b latch_luno(mate, a[8], luno); - assign #T_INV tova = !t1_nt2; - assign #T_MUX pege = dma_addr_ext ? dma_a[14] : nyre; - assign #T_MUX muce = dma_addr_ext ? dma_a[13] : lonu; - assign #T_MUX mojy = dma_addr_ext ? dma_a[12] : lobu; - assign #T_MUX male = dma_addr_ext ? dma_a[11] : lumy; - assign #T_MUX pamy = dma_addr_ext ? dma_a[10] : pate; - assign #T_MUX masu = dma_addr_ext ? dma_a[9] : lysa; - assign #T_MUX mano = dma_addr_ext ? dma_a[8] : luno; - assign #T_NOR pahy = !(t1_nt2 || pege); - assign #T_NAND puhe = !(pege && tova); - assign #T_NOR leva = !(t1_nt2 || muce); - assign #T_NAND labe = !(muce && tova); - assign #T_NOR loso = !(t1_nt2 || mojy); - assign #T_NAND luce = !(mojy && tova); - assign #T_NOR lyny = !(t1_nt2 || male); - assign #T_NAND lepy = !(male && tova); - assign #T_NOR rore = !(t1_nt2 || pamy); - assign #T_NAND roxu = !(pamy && tova); - assign #T_NOR meny = !(t1_nt2 || masu); - assign #T_NAND mune = !(masu && tova); - assign #T_NOR mego = !(t1_nt2 || mano); - assign #T_NAND myny = !(mano && tova); + assign tova = !t1_nt2; + assign pege = dma_addr_ext ? dma_a[14] : nyre; + assign muce = dma_addr_ext ? dma_a[13] : lonu; + assign mojy = dma_addr_ext ? dma_a[12] : lobu; + assign male = dma_addr_ext ? dma_a[11] : lumy; + assign pamy = dma_addr_ext ? dma_a[10] : pate; + assign masu = dma_addr_ext ? dma_a[9] : lysa; + assign mano = dma_addr_ext ? dma_a[8] : luno; + assign pahy = !(t1_nt2 || pege); + assign puhe = !(pege && tova); + assign leva = !(t1_nt2 || muce); + assign labe = !(muce && tova); + assign loso = !(t1_nt2 || mojy); + assign luce = !(mojy && tova); + assign lyny = !(t1_nt2 || male); + assign lepy = !(male && tova); + assign rore = !(t1_nt2 || pamy); + assign roxu = !(pamy && tova); + assign meny = !(t1_nt2 || masu); + assign mune = !(masu && tova); + assign mego = !(t1_nt2 || mano); + assign myny = !(mano && tova); assign net01 = tova; assign a_d[14] = pahy; assign a_a[14] = puhe; @@ -96,30 +96,30 @@ module ext_cpu_busses( dlatch_b latch_alyr(mate, a[2], alyr); dlatch_b latch_apur(mate, a[1], apur); dlatch_b latch_alor(mate, a[0], alor); - assign #T_MUX asur = dma_addr_ext ? dma_a[7] : arym; - assign #T_MUX atyr = dma_addr_ext ? dma_a[6] : aros; - assign #T_MUX atov = dma_addr_ext ? dma_a[5] : atev; - assign #T_MUX atem = dma_addr_ext ? dma_a[4] : avys; - assign #T_MUX amer = dma_addr_ext ? dma_a[3] : aret; - assign #T_MUX apok = dma_addr_ext ? dma_a[2] : alyr; - assign #T_MUX atol = dma_addr_ext ? dma_a[1] : apur; - assign #T_MUX amet = dma_addr_ext ? dma_a[0] : alor; - assign #T_NOR colo = !(t1_nt2 || asur); - assign #T_NAND defy = !(net01 && asur); - assign #T_NOR cyka = !(t1_nt2 || atyr); - assign #T_NAND cepu = !(net01 && atyr); - assign #T_NOR ajav = !(t1_nt2 || atov); - assign #T_NAND badu = !(net01 && atov); - assign #T_NOR bevo = !(t1_nt2 || atem); - assign #T_NAND byla = !(net01 && atem); - assign #T_NOR bola = !(t1_nt2 || amer); - assign #T_NAND boty = !(net01 && amer); - assign #T_NOR bajo = !(t1_nt2 || apok); - assign #T_NAND boku = !(net01 && apok); - assign #T_NOR cotu = !(t1_nt2 || atol); - assign #T_NAND caba = !(net01 && atol); - assign #T_NOR koty = !(t1_nt2 || amet); - assign #T_NAND kupo = !(net01 && amet); + assign asur = dma_addr_ext ? dma_a[7] : arym; + assign atyr = dma_addr_ext ? dma_a[6] : aros; + assign atov = dma_addr_ext ? dma_a[5] : atev; + assign atem = dma_addr_ext ? dma_a[4] : avys; + assign amer = dma_addr_ext ? dma_a[3] : aret; + assign apok = dma_addr_ext ? dma_a[2] : alyr; + assign atol = dma_addr_ext ? dma_a[1] : apur; + assign amet = dma_addr_ext ? dma_a[0] : alor; + assign colo = !(t1_nt2 || asur); + assign defy = !(net01 && asur); + assign cyka = !(t1_nt2 || atyr); + assign cepu = !(net01 && atyr); + assign ajav = !(t1_nt2 || atov); + assign badu = !(net01 && atov); + assign bevo = !(t1_nt2 || atem); + assign byla = !(net01 && atem); + assign bola = !(t1_nt2 || amer); + assign boty = !(net01 && amer); + assign bajo = !(t1_nt2 || apok); + assign boku = !(net01 && apok); + assign cotu = !(t1_nt2 || atol); + assign caba = !(net01 && atol); + assign koty = !(t1_nt2 || amet); + assign kupo = !(net01 && amet); assign a_d[7] = colo; assign a_a[7] = defy; assign a_d[6] = cyka; @@ -138,50 +138,50 @@ module ext_cpu_busses( assign a_a[0] = kupo; logic tola, mule, loxo, lasy, mate, sore, tevy, levo, lagu; - assign #T_INV tola = !a[1]; - assign #T_INV mule = !nt1_t2; - assign #T_AO loxo = (mule && texo) || nt1_t2; - assign #T_INV lasy = !loxo; - assign #T_INV mate = !lasy; - assign #T_INV sore = !a[15]; - assign #T_OR tevy = a[13] || a[14] || sore; - assign #T_AND texo = from_cpu4 && tevy; - assign #T_INV levo = !texo; - assign #T_AO lagu = (cpu_raw_rd && levo) || from_cpu3; + assign tola = !a[1]; + assign mule = !nt1_t2; + assign loxo = (mule && texo) || nt1_t2; + assign lasy = !loxo; + assign mate = !lasy; + assign sore = !a[15]; + assign tevy = a[13] || a[14] || sore; + assign texo = from_cpu4 && tevy; + assign levo = !texo; + assign lagu = (cpu_raw_rd && levo) || from_cpu3; assign tola_na1 = tola; logic moca, mexo, lywe, nevy, moty, puva, tymu, usuf, uver, ugac, urun; - assign #T_NOR moca = !(texo || nt1_t2); - assign #T_INV mexo = !cpu_wr_sync; - assign #T_INV lywe = !lagu; - assign #T_OR nevy = mexo || moca; - assign #T_OR moty = moca || lywe; - assign #T_OR puva = nevy || dma_addr_ext; - assign #T_NOR tymu = !(dma_addr_ext || moty); - assign #T_NOR usuf = !(t1_nt2 || puva); - assign #T_NAND uver = !(puva && net01); - assign #T_NAND ugac = !(net01 && tymu); - assign #T_NOR urun = !(tymu || t1_nt2); + assign moca = !(texo || nt1_t2); + assign mexo = !cpu_wr_sync; + assign lywe = !lagu; + assign nevy = mexo || moca; + assign moty = moca || lywe; + assign puva = nevy || dma_addr_ext; + assign tymu = !(dma_addr_ext || moty); + assign usuf = !(t1_nt2 || puva); + assign uver = !(puva && net01); + assign ugac = !(net01 && tymu); + assign urun = !(tymu || t1_nt2); assign wr_c = usuf; assign wr_a = uver; assign rd_a = ugac; assign rd_c = urun; logic base, afec, buxu, camu, cygu, cogo, kova, anar, azuv, akan, byxe, byne, byna, kejo; - assign #T_INV base = !a_c[3]; - assign #T_INV afec = !a_c[4]; - assign #T_INV buxu = !a_c[2]; - assign #T_INV camu = !a_c[1]; - assign #T_INV cygu = !a_c[6]; - assign #T_INV cogo = !a_c[7]; - assign #T_INV kova = !a_c[0]; - assign #T_TRIB anar = !net01 ? base : 'z; - assign #T_TRIB azuv = !net01 ? afec : 'z; - assign #T_TRIB akan = !net01 ? buxu : 'z; - assign #T_TRIB byxe = !net01 ? camu : 'z; - assign #T_TRIB byne = !net01 ? cygu : 'z; - assign #T_TRIB byna = !net01 ? cogo : 'z; - assign #T_TRIB kejo = !net01 ? kova : 'z; + assign base = !a_c[3]; + assign afec = !a_c[4]; + assign buxu = !a_c[2]; + assign camu = !a_c[1]; + assign cygu = !a_c[6]; + assign cogo = !a_c[7]; + assign kova = !a_c[0]; + assign anar = !net01 ? base : 'z; + assign azuv = !net01 ? afec : 'z; + assign akan = !net01 ? buxu : 'z; + assign byxe = !net01 ? camu : 'z; + assign byne = !net01 ? cygu : 'z; + assign byna = !net01 ? cogo : 'z; + assign kejo = !net01 ? kova : 'z; assign a[3] = anar; assign a[4] = azuv; assign a[2] = akan; @@ -191,22 +191,22 @@ module ext_cpu_busses( assign a[0] = kejo; logic lahe, lura, mujy, pevo, mady, nena, sura, abup, lyna, lefy, lofa, nefe, lora, mapu, rala, ajov; - assign #T_INV lahe = !a_c[12]; - assign #T_INV lura = !a_c[13]; - assign #T_INV mujy = !a_c[8]; - assign #T_INV pevo = !a_c[14]; - assign #T_INV mady = !a_c[11]; - assign #T_INV nena = !a_c[9]; - assign #T_INV sura = !a_c[10]; - assign #T_INV abup = !a_c[5]; - assign #T_TRIB lyna = !net01 ? lahe : 'z; - assign #T_TRIB lefy = !net01 ? lura : 'z; - assign #T_TRIB lofa = !net01 ? mujy : 'z; - assign #T_TRIB nefe = !net01 ? pevo : 'z; - assign #T_TRIB lora = !net01 ? mady : 'z; - assign #T_TRIB mapu = !net01 ? nena : 'z; - assign #T_TRIB rala = !net01 ? sura : 'z; - assign #T_TRIB ajov = !net01 ? abup : 'z; + assign lahe = !a_c[12]; + assign lura = !a_c[13]; + assign mujy = !a_c[8]; + assign pevo = !a_c[14]; + assign mady = !a_c[11]; + assign nena = !a_c[9]; + assign sura = !a_c[10]; + assign abup = !a_c[5]; + assign lyna = !net01 ? lahe : 'z; + assign lefy = !net01 ? lura : 'z; + assign lofa = !net01 ? mujy : 'z; + assign nefe = !net01 ? pevo : 'z; + assign lora = !net01 ? mady : 'z; + assign mapu = !net01 ? nena : 'z; + assign rala = !net01 ? sura : 'z; + assign ajov = !net01 ? abup : 'z; assign a[12] = lyna; assign a[13] = lefy; assign a[8] = lofa; @@ -217,17 +217,17 @@ module ext_cpu_busses( assign a[5] = ajov; logic redu, rogy, ryda, rune, resy, rypu, suly, seze, tamu; - assign #T_INV redu = !cpu_rd; - assign #T_MUX roru = t1_nt2 ? redu : moty; - assign #T_INV lula = !roru; - assign #T_NOR rogy = !(roru || d[6]); - assign #T_NOR ryda = !(roru || d[7]); - assign #T_NOR rune = !(roru || d[0]); - assign #T_NOR resy = !(roru || d[4]); - assign #T_NOR rypu = !(roru || d[1]); - assign #T_NOR suly = !(roru || d[2]); - assign #T_NOR seze = !(roru || d[3]); - assign #T_NOR tamu = !(roru || d[5]); + assign redu = !cpu_rd; + assign roru = t1_nt2 ? redu : moty; + assign lula = !roru; + assign rogy = !(roru || d[6]); + assign ryda = !(roru || d[7]); + assign rune = !(roru || d[0]); + assign resy = !(roru || d[4]); + assign rypu = !(roru || d[1]); + assign suly = !(roru || d[2]); + assign seze = !(roru || d[3]); + assign tamu = !(roru || d[5]); assign d_d[6] = rogy; assign d_d[7] = ryda; assign d_d[0] = rune; @@ -247,15 +247,15 @@ module ext_cpu_busses( dlatch_b latch_rupa(lavo, d_in[6], rupa); dlatch_b latch_sago(lavo, d_in[5], sago); dlatch_b latch_sazy(lavo, d_in[7], sazy); - assign #T_NAND lavo = !(cpu_raw_rd && texo && from_cpu5); - assign #T_TRI tepe = !lavo ? !sody : 'z; - assign #T_TRI tavo = !lavo ? !selo : 'z; - assign #T_TRI ruvo = !lavo ? !rony : 'z; - assign #T_TRI ryma = !lavo ? !soma : 'z; - assign #T_TRI ryko = !lavo ? !raxy : 'z; - assign #T_TRI sevu = !lavo ? !rupa : 'z; - assign #T_TRI safo = !lavo ? !sago : 'z; - assign #T_TRI taju = !lavo ? !sazy : 'z; + assign lavo = !(cpu_raw_rd && texo && from_cpu5); + assign tepe = !lavo ? !sody : 'z; + assign tavo = !lavo ? !selo : 'z; + assign ruvo = !lavo ? !rony : 'z; + assign ryma = !lavo ? !soma : 'z; + assign ryko = !lavo ? !raxy : 'z; + assign sevu = !lavo ? !rupa : 'z; + assign safo = !lavo ? !sago : 'z; + assign taju = !lavo ? !sazy : 'z; assign d[4] = tepe; assign d[3] = tavo; assign d[1] = ruvo; diff --git a/dmg_cpu_b/pages/p9_apu_control.sv b/dmg_cpu_b/pages/p9_apu_control.sv index 5e08cc3..e64352e 100644 --- a/dmg_cpu_b/pages/p9_apu_control.sv +++ b/dmg_cpu_b/pages/p9_apu_control.sv @@ -28,19 +28,19 @@ module apu_control( logic ajer, bata, calo, dyfa, najer_2mhz; dffr_bp dffr_ajer(apuv_4mhz, napu_reset3, !ajer, ajer); dffr_bp dffr_calo(bata, napu_reset, !calo, calo); - assign #T_INV bata = !ajer_2mhz; - assign #T_INV dyfa = !(!calo); + assign bata = !ajer_2mhz; + assign dyfa = !(!calo); assign ajer_2mhz = ajer; assign najer_2mhz = !ajer; assign dyfa_1mhz = dyfa; logic dapa, afat, agur, atyv, kame, cepo, napu_reset3; - assign #T_INV dapa = !apu_reset; - assign #T_INV afat = !apu_reset; - assign #T_INV agur = !apu_reset; - assign #T_INV atyv = !apu_reset; - assign #T_INV kame = !apu_reset; - assign #T_INV cepo = !apu_reset; + assign dapa = !apu_reset; + assign afat = !apu_reset; + assign agur = !apu_reset; + assign atyv = !apu_reset; + assign kame = !apu_reset; + assign cepo = !apu_reset; assign napu_reset4 = dapa; assign napu_reset2 = afat; assign napu_reset = agur; @@ -54,24 +54,24 @@ module apu_control( dffr_bp dffr_bowy(bopy, kepy, d[5], bowy); dffr_bp dffr_baza(najer_2mhz, napu_reset3, bowy, baza); drlatch latch_fero(etuc, kepy, efop, fero); - assign #T_INV kydu = !ncpu_rd; - assign #T_NAND jure = !(kydu && ff26); - assign #T_NAND hawu = !(ff26 && apu_wr); - assign #T_NAND bopy = !(apu_wr && ff26); - assign #T_INV kepy = !jyro; - assign #T_INV hapo = !nreset2; - assign #T_INV gufo = !hapo; - assign #T_OR jyro = hapo || !hada; - assign #T_TRI hope = !jure ? !(!hada) : 'z; - assign #T_INV kuby = !jyro; - assign #T_INV keba = !kuby; - assign #T_MUX cely = net03 ? baza : byfe_128hz; - assign #T_INV cone = !cely; - assign #T_INV cate = !cone; - assign #T_AND etuc = apu_wr && ff26; - assign #T_AND efop = d[4] && t1_nt2; - assign #T_INV foku = !etuc; - assign #T_INV edek = !(!fero); + assign kydu = !ncpu_rd; + assign jure = !(kydu && ff26); + assign hawu = !(ff26 && apu_wr); + assign bopy = !(apu_wr && ff26); + assign kepy = !jyro; + assign hapo = !nreset2; + assign gufo = !hapo; + assign jyro = hapo || !hada; + assign hope = !jure ? !(!hada) : 'z; + assign kuby = !jyro; + assign keba = !kuby; + assign cely = net03 ? baza : byfe_128hz; + assign cone = !cely; + assign cate = !cone; + assign etuc = apu_wr && ff26; + assign efop = d[4] && t1_nt2; + assign foku = !etuc; + assign edek = !(!fero); assign apu_reset = keba; assign fero_q = fero; assign net03 = edek; @@ -88,23 +88,23 @@ module apu_control( drlatch latch_ager(bowe, kepy, d[2], ager); drlatch latch_byga(bowe, kepy, d[1], byga); drlatch latch_apeg(bowe, kepy, d[0], apeg); - assign #T_INV aguz = !cpu_rd; - assign #T_INV byma = !ff24; - assign #T_NOR befu = !(aguz || byma); - assign #T_INV adak = !befu; - assign #T_NAND bosu = !(ff24 && apu_wr); - assign #T_INV baxy = !bosu; - assign #T_INV bubu = !baxy; - assign #T_INV bowe = !bosu; - assign #T_INV ataf = !bowe; - assign #T_TRI atum = !adak ? !(!bedu) : 'z; - assign #T_TRI bocy = !adak ? !(!cozu) : 'z; - assign #T_TRI arux = !adak ? !(!bumo) : 'z; - assign #T_TRI amad = !adak ? !(!byre) : 'z; - assign #T_TRI axem = !adak ? !(!apos) : 'z; - assign #T_TRI avud = !adak ? !(!ager) : 'z; - assign #T_TRI awed = !adak ? !(!byga) : 'z; - assign #T_TRI akod = !adak ? !(!apeg) : 'z; + assign aguz = !cpu_rd; + assign byma = !ff24; + assign befu = !(aguz || byma); + assign adak = !befu; + assign bosu = !(ff24 && apu_wr); + assign baxy = !bosu; + assign bubu = !baxy; + assign bowe = !bosu; + assign ataf = !bowe; + assign atum = !adak ? !(!bedu) : 'z; + assign bocy = !adak ? !(!cozu) : 'z; + assign arux = !adak ? !(!bumo) : 'z; + assign amad = !adak ? !(!byre) : 'z; + assign axem = !adak ? !(!apos) : 'z; + assign avud = !adak ? !(!ager) : 'z; + assign awed = !adak ? !(!byga) : 'z; + assign akod = !adak ? !(!apeg) : 'z; assign ncpu_rd = aguz; assign d[7] = atum; assign d[6] = bocy; @@ -134,20 +134,20 @@ module apu_control( drlatch latch_befo(byfa, kepy, d[6], befo); drlatch latch_bume(byfa, kepy, d[4], bume); drlatch latch_bofa(byfa, kepy, d[5], bofa); - assign #T_INV gepa = !ff25; - assign #T_NOR hefa = !(ncpu_rd || gepa); - assign #T_INV gumu = !hefa; - assign #T_NAND bupo = !(ff25 && apu_wr); - assign #T_INV bono = !bupo; - assign #T_INV byfa = !bupo; - assign #T_TRI capu = !gumu ? !(!bogu) : 'z; - assign #T_TRI caga = !gumu ? !(!bafo) : 'z; - assign #T_TRI boca = !gumu ? !(!atuf) : 'z; - assign #T_TRI buzu = !gumu ? !(!anev) : 'z; - assign #T_TRI cere = !gumu ? !(!bepu) : 'z; - assign #T_TRI cada = !gumu ? !(!befo) : 'z; - assign #T_TRI cavu = !gumu ? !(!bume) : 'z; - assign #T_TRI cudu = !gumu ? !(!bofa) : 'z; + assign gepa = !ff25; + assign hefa = !(ncpu_rd || gepa); + assign gumu = !hefa; + assign bupo = !(ff25 && apu_wr); + assign bono = !bupo; + assign byfa = !bupo; + assign capu = !gumu ? !(!bogu) : 'z; + assign caga = !gumu ? !(!bafo) : 'z; + assign boca = !gumu ? !(!atuf) : 'z; + assign buzu = !gumu ? !(!anev) : 'z; + assign cere = !gumu ? !(!bepu) : 'z; + assign cada = !gumu ? !(!befo) : 'z; + assign cavu = !gumu ? !(!bume) : 'z; + assign cudu = !gumu ? !(!bofa) : 'z; assign rmixer[1] = bogu; assign rmixer[2] = bafo; assign rmixer[3] = atuf; @@ -166,18 +166,18 @@ module apu_control( assign d[5] = cudu; logic ceto, kazo, curu, dole, kamu, duru, fewa, coto, koge, efus, fate; - assign #T_INV ceto = !ncpu_rd; - assign #T_INV kazo = !ncpu_rd; - assign #T_INV curu = !ncpu_rd; - assign #T_INV gaxo = !ncpu_rd; - assign #T_NAND dole = !(ff26 && ceto); - assign #T_NAND kamu = !(ff26 && kazo); - assign #T_NAND duru = !(ff26 && curu); - assign #T_NAND fewa = !(ff26 && gaxo); - assign #T_TRI coto = !dole ? !nch1_active : 'z; - assign #T_TRI koge = !dole ? !nch4_active : 'z; - assign #T_TRI efus = !dole ? !nch2_active : 'z; - assign #T_TRI fate = !dole ? !nch3_active : 'z; + assign ceto = !ncpu_rd; + assign kazo = !ncpu_rd; + assign curu = !ncpu_rd; + assign gaxo = !ncpu_rd; + assign dole = !(ff26 && ceto); + assign kamu = !(ff26 && kazo); + assign duru = !(ff26 && curu); + assign fewa = !(ff26 && gaxo); + assign coto = !dole ? !nch1_active : 'z; + assign koge = !dole ? !nch4_active : 'z; + assign efus = !dole ? !nch2_active : 'z; + assign fate = !dole ? !nch3_active : 'z; assign d[0] = coto; assign d[3] = koge; assign d[1] = efus; diff --git a/dmg_cpu_b_gameboy.sv b/dmg_cpu_b_gameboy.sv index 142d565..322accb 100644 --- a/dmg_cpu_b_gameboy.sv +++ b/dmg_cpu_b_gameboy.sv @@ -1,11 +1,12 @@ `default_nettype none +`timescale 1ns/1ps module dmg_cpu_b_gameboy; import snd_dump::write_header; import snd_dump::write_bit4_as_int8; import snd_dump::write_real_as_int16; - vid_dump vdump(.*, .t(test.sample_idx)); + vid_dump vdump(.*, .t(sample_idx)); /* Clock (crystal) pins */ logic xi, xo; @@ -171,57 +172,6 @@ module dmg_cpu_b_gameboy; end endcase - initial begin - string rom_file; - int f, _; - byte mbc_type, ram_size; - - has_rom = 0; - has_ram = 0; - has_mbc1 = 0; - has_mbc5 = 0; - - rom_file = ""; - _ = $value$plusargs("ROM=%s", rom_file); - - f = 0; - if (rom_file != "") begin - f = $fopen(rom_file, "rb"); - if (!f) - $error("Failed to open cartridge ROM file %s for reading.", rom_file); - end - if (f) begin - _ = $fread(cart_rom, f); - $fclose(f); - has_rom = 1; - end - - if (has_rom) begin - mbc_type = cart_rom['h147]; - ram_size = cart_rom['h149]; - - unique case (mbc_type) - 'h00, 'h08, 'h09: ; - 'h01, 'h02, 'h03: has_mbc1 = 1; - 'h05, 'h06: $error("MBC2 not supported yet."); - 'h0b, 'h0c, 'h0d: $error("MMM01 not supported yet."); - 'h0f, 'h10, 'h11, - 'h12, 'h13: $error("MBC3 not supported yet."); - 'h19, 'h1a, 'h1b, - 'h1c, 'h1d, 'h1e: has_mbc5 = 1; - 'h20: $error("MBC6 not supported yet."); - 'h22: $error("MBC7 not supported yet."); - 'hfc: $error("MAC-GBD not supported yet."); - 'hfd: $error("TAMA5 not supported yet."); - 'hfe: $error("HuC3 not supported yet."); - 'hff: $error("HuC1 not supported yet."); - default: $error("Unsupported MBC type."); - endcase - - has_ram = |ram_size; - end - end - logic clk; logic reset, areset; logic ncyc; @@ -261,30 +211,46 @@ module dmg_cpu_b_gameboy; * otherwise it collides with 0xff driven on the right side of page 5. */ assign cpu_drv_d = cpu_raw_wr && cpu_clkin_t3 && !cpu_clkin_t2; - always @(posedge cpu_clkin_t3) if (rd && !cpu_in_t12 && !cpu_in_t13) begin :read_cycle + bit read_cycle; + + always @(posedge cpu_clkin_t3) if (rd && !cpu_in_t12 && !cpu_in_t13) begin: read_cycle_ + read_cycle <= 1; cpu_a_out <= adr; cpu_raw_rd <= 1; - @(posedge cpu_clkin_t2); + + @(posedge cpu_clkin_t2, negedge read_cycle); + if (read_cycle == 1) disable read_cycle_; + cpu_raw_rd <= 0; if (!cpu_in_r4 && !cpu_in_r5) /* Higher address byte is supposed to go low after external memory access */ cpu_a_out[15:8] <= 0; end - always @(posedge cpu_clkin_t3) if (wr && !cpu_in_t12 && !cpu_in_t13) begin :write_cycle + bit write_cycle; + + always @(posedge cpu_clkin_t3) if (wr && !cpu_in_t12 && !cpu_in_t13) begin: write_cycle_ + write_cycle <= 1; cpu_a_out <= adr; cpu_d_out <= '1; cpu_raw_wr <= 1; - @(posedge cpu_clkin_t5); + + @(posedge cpu_clkin_t5, negedge write_cycle); + if (write_cycle == 0) disable write_cycle_; + cpu_d_out <= dout; - @(posedge cpu_clkin_t2); + + @(posedge cpu_clkin_t2, negedge write_cycle); + if (write_cycle == 0) disable write_cycle_; + cpu_raw_wr <= 0; if (!cpu_in_r4 && !cpu_in_r5) /* Higher address byte is supposed to go low after external memory access */ cpu_a_out[15:8] <= 0; end always @(posedge cpu_clkin_t10, posedge cpu_in_t12, posedge cpu_in_t13) if (cpu_in_t12 || cpu_in_t13) begin - disable read_cycle; - disable write_cycle; + read_cycle <= 0; + write_cycle <= 0; + cpu_raw_rd <= 0; cpu_raw_wr <= 0; cpu_a_out <= 0; @@ -310,119 +276,184 @@ module dmg_cpu_b_gameboy; cpu_irq7_ack <= iack[7]; end - program test; - int sample_idx; + int sample_idx; + bit tick_tick; + bit video_dump; - initial begin - string dumpfile, ch_file, snd_file, vid_file; - string time_str, prev_time_str; - real sim_seconds; - int _; - int fch[1:4]; - int fmix, fvid; - int sim_mcycs; - bit dump_channels, dump_sound, dump_video; + initial begin + string rom_file; + int f, _; + byte mbc_type, ram_size; - dumpfile = ""; - _ = $value$plusargs("DUMPFILE=%s", dumpfile); + string dumpfile, ch_file, snd_file, vid_file; + string time_str, prev_time_str; + real sim_seconds; + int fch[1:4]; + int fmix, fvid; + int sim_mcycs; + bit dump_channels, dump_sound, dump_video; - ch_file = ""; - _ = $value$plusargs("CH_FILE=%s", ch_file); - dump_channels = ch_file != ""; + $display("DMG: Starting up..."); - snd_file = ""; - _ = $value$plusargs("SND_FILE=%s", snd_file); - dump_sound = snd_file != ""; + has_rom = 0; + has_ram = 0; + has_mbc1 = 0; + has_mbc5 = 0; - vid_file = ""; - _ = $value$plusargs("VID_FILE=%s", vid_file); - dump_video = vid_file != ""; + rom_file = ""; + _ = $value$plusargs("ROM=%s", rom_file); - sim_seconds = 6.0; /* Enough time for the boot ROM */ - _ = $value$plusargs("SECS=%f", sim_seconds); + f = 0; + if (rom_file != "") begin + f = $fopen(rom_file, "rb"); + if (!f) + $error("Failed to open cartridge ROM file %s for reading.", rom_file); + end + if (f) begin + _ = $fread(cart_rom, f); + $fclose(f); + has_rom = 1; + end - sim_mcycs = $rtoi(sim_seconds * 1048576.0); + if (has_rom) begin + mbc_type = cart_rom['h147]; + ram_size = cart_rom['h149]; - $dumpfile(dumpfile); - $dumpvars(0, dmg_cpu_b_gameboy); + unique case (mbc_type) + 'h00, 'h08, 'h09: ; + 'h01, 'h02, 'h03: has_mbc1 = 1; + 'h05, 'h06: $error("MBC2 not supported yet."); + 'h0b, 'h0c, 'h0d: $error("MMM01 not supported yet."); + 'h0f, 'h10, 'h11, + 'h12, 'h13: $error("MBC3 not supported yet."); + 'h19, 'h1a, 'h1b, + 'h1c, 'h1d, 'h1e: has_mbc5 = 1; + 'h20: $error("MBC6 not supported yet."); + 'h22: $error("MBC7 not supported yet."); + 'hfc: $error("MAC-GBD not supported yet."); + 'hfd: $error("TAMA5 not supported yet."); + 'hfe: $error("HuC3 not supported yet."); + 'hff: $error("HuC1 not supported yet."); + default: $error("Unsupported MBC type."); + endcase - if (dump_channels) for (int i = 1; i <= 4; i++) begin - string filename; - $sformat(filename, ch_file, i); - fch[i] = $fopen(filename, "wb"); - write_header(fch[i], 65536, 1, 0); - end - if (dump_sound) begin - fmix = $fopen(snd_file, "wb"); - write_header(fmix, 65536, 2, 1); - end - if (dump_video) - fvid = $fopen(vid_file, "wb"); + has_ram = |ram_size; + end - sample_idx = 0; + dumpfile = ""; + _ = $value$plusargs("DUMPFILE=%s", dumpfile); - xi = 0; - nrst = 0; + ch_file = ""; + _ = $value$plusargs("CH_FILE=%s", ch_file); + dump_channels = ch_file != ""; - clk = 0; + snd_file = ""; + _ = $value$plusargs("SND_FILE=%s", snd_file); + dump_sound = snd_file != ""; - cpu_out_t1 = 0; - cpu_xo_ena = 1; + vid_file = ""; + _ = $value$plusargs("VID_FILE=%s", vid_file); + dump_video = vid_file != ""; - cyc(64); - nrst = 1; + sim_seconds = 6.0; /* Enough time for the boot ROM */ + _ = $value$plusargs("SECS=%f", sim_seconds); - fork - begin :tick_tick - forever begin - cyc(64); - if (dump_channels) begin - write_bit4_as_int8(fch[1], dmg.ch1_out); - write_bit4_as_int8(fch[2], dmg.ch2_out); - write_bit4_as_int8(fch[3], dmg.wave_dac_d); - write_bit4_as_int8(fch[4], dmg.ch4_out); - end - if (dump_sound) begin - write_real_as_int16(fmix, lout); - write_real_as_int16(fmix, rout); - end - sample_idx++; + $display("loaded args"); + + sim_mcycs = $rtoi(sim_seconds * 1048576.0); + + $dumpfile(dumpfile); + $dumpvars(0, dmg_cpu_b_gameboy); + + $display("dump file setup"); + + if (dump_channels) for (int i = 1; i <= 4; i++) begin + string filename; + $sformat(filename, ch_file, i); + fch[i] = $fopen(filename, "wb"); + write_header(fch[i], 65536, 1, 0); + end + if (dump_sound) begin + fmix = $fopen(snd_file, "wb"); + write_header(fmix, 65536, 2, 1); + end + if (dump_video) + fvid = $fopen(vid_file, "wb"); + + sample_idx = 0; + + xi = 0; + nrst = 0; + + clk = 0; + + cpu_out_t1 = 0; + cpu_xo_ena = 1; + + $display("starting cyc"); + + cyc(64); + nrst = 1; + + tick_tick = 1; + video_dump = 1; + + $display("begin fork"); + + fork + begin + $display("tick_tick"); + while (tick_tick) begin + cyc(64); + if (dump_channels) begin + write_bit4_as_int8(fch[1], dmg.ch1_out); + write_bit4_as_int8(fch[2], dmg.ch2_out); + write_bit4_as_int8(fch[3], dmg.wave_dac_d); + write_bit4_as_int8(fch[4], dmg.ch4_out); + end + if (dump_sound) begin + write_real_as_int16(fmix, lout); + write_real_as_int16(fmix, rout); end + sample_idx++; end + end - if (dump_video) begin :video_dump - vdump.video_dump_loop(fvid); - end + if (dump_video) begin + $display("video_dump"); + vdump.video_dump_loop(fvid, video_dump); + $display("video dump ended"); + end - begin - @(negedge reset); - $sformat(time_str, "%.1f", $itor(sim_mcycs) / 1048576.0); - $display("System reset done -- will simulate %s seconds", time_str); - $fflush(32'h8000_0001); - prev_time_str = time_str; - - while (sim_mcycs) begin - sim_mcycs--; - if (sim_mcycs % 131072) begin - $sformat(time_str, "%.1f", $itor(sim_mcycs) / 1048576.0); - if (time_str != prev_time_str && time_str != "0.0") begin - $display("%s seconds remaining", time_str); - $fflush(32'h8000_0001); - prev_time_str = time_str; - end + begin + $display("Waiting reset..."); + @(negedge reset); + $sformat(time_str, "%.1f", $itor(sim_mcycs) / 1048576.0); + $display("System reset done -- will simulate %s seconds", time_str); + $fflush(32'h8000_0001); + prev_time_str = time_str; + + while (sim_mcycs) begin + sim_mcycs--; + if (sim_mcycs % 131072) begin + $sformat(time_str, "%.1f", $itor(sim_mcycs) / 1048576.0); + if (time_str != prev_time_str && time_str != "0.0") begin + $display("%s seconds remaining", time_str); + $fflush(32'h8000_0001); + prev_time_str = time_str; end - @(posedge cpu_clkin_t9); - @(posedge cpu_clkin_t10); end - - disable tick_tick; - disable video_dump; + @(posedge cpu_clkin_t9); + @(posedge cpu_clkin_t10); end - join - $finish; - end - endprogram + tick_tick = 0; + video_dump = 0; + end + join + + $finish; + end /* HALT/EI/DI instruction test code */ /* diff --git a/sm83/sm83_alu.sv b/sm83/sm83_alu.sv index 42e7625..cea3c1a 100644 --- a/sm83/sm83_alu.sv +++ b/sm83/sm83_alu.sv @@ -97,7 +97,7 @@ module sm83_alu word_t shifted; /* shift_l and shift_r must not be set at the same time */ - assume property (!shift_l || !shift_r); + // assume property (!shift_l || !shift_r); always_comb unique casez ({ shift_l, shift_r }) 'b 00: shifted = din; /* no shift */ 'b ?1: shifted = { shift_in, din[WORD_SIZE-1:1] }; /* right shift */ @@ -115,7 +115,7 @@ module sm83_alu word_t bus; /* only one of *_oe can be set at the same time */ - assume property ($onehot0({ result_oe, shift_oe, op_a_oe, bs_oe })); + // assume property ($onehot0({ result_oe, shift_oe, op_a_oe, bs_oe })); always_comb unique casez ({ result_oe, shift_oe, op_a_oe, bs_oe }) 'b 1???: bus = result; 'b ?1??: bus = shifted; @@ -129,7 +129,7 @@ module sm83_alu endcase /* only one of load_a* can be set at the same time */ - assume property ($onehot0({ load_a, load_a_zero })); + // assume property ($onehot0({ load_a, load_a_zero })); always_ff @(negedge clk) if (load_a || load_a_zero) unique case (1) load_a: op_a <= bus; load_a_zero: op_a <= 0; @@ -137,7 +137,7 @@ module sm83_alu initial op_a = 0; /* only one of load_b* can be set at the same time */ - assume property ($onehot0({ load_b, load_b_zero })); + // assume property ($onehot0({ load_b, load_b_zero })); always_ff @(negedge clk) if (load_b || load_b_zero) unique case (1) load_b: op_b <= bus; load_b_zero: op_b <= 0; diff --git a/sm83/sm83_alu_flags.sv b/sm83/sm83_alu_flags.sv index bc53f17..28b52f9 100644 --- a/sm83/sm83_alu_flags.sv +++ b/sm83/sm83_alu_flags.sv @@ -58,7 +58,7 @@ module sm83_alu_flags( assign dout[3:0] = 0; always_ff @(posedge clk) if (zero_we) begin - assume (flags_bus != flags_alu); + // assume (flags_bus != flags_alu); if (zero_clr) zero <= 0; else unique case (1) @@ -68,7 +68,7 @@ module sm83_alu_flags( end always_ff @(posedge clk) if (neg_we) begin - assume (neg_clr || neg_set || flags_bus != flags_alu); + // assume (neg_clr || neg_set || flags_bus != flags_alu); if (neg_clr) neg <= 0; else if (neg_set) @@ -82,7 +82,7 @@ module sm83_alu_flags( logic hc_reg, sec_c_reg; function automatic logic write_carry(int bitnum); - assume (flags_bus != flags_alu); + // assume (flags_bus != flags_alu); unique case (1) flags_bus: write_carry = din[bitnum]; flags_alu: write_carry = carry_in; @@ -96,7 +96,7 @@ module sm83_alu_flags( endcase initial sec_c_reg = 0; - assert property (!carry_we || !sec_carry_we); + // assert property (!carry_we || !sec_carry_we); always_ff @(posedge clk) if (half_carry_we) hc_reg <= write_carry(H); always_ff @(posedge clk) if (daa_carry_we) daa_carry <= write_carry(H); diff --git a/sm83/sm83_int.sv b/sm83/sm83_int.sv index 262da92..f4e2d9a 100644 --- a/sm83/sm83_int.sv +++ b/sm83/sm83_int.sv @@ -29,7 +29,7 @@ module sm83_int( end always_ff @(posedge clk) begin - assert(!ctl_update_int || !t2); + // assert(!ctl_update_int || !t2); if (reset) intr_entry <= 0; else if (ctl_update_int) diff --git a/sm83/sm83_io.sv b/sm83/sm83_io.sv index 9f01e08..286fdb5 100644 --- a/sm83/sm83_io.sv +++ b/sm83/sm83_io.sv @@ -34,10 +34,10 @@ module sm83_io( always_ff @(posedge clk) begin /* read or write sequence should only be triggered right before next cycle */ - assume (t4 || !mread); - assume (t4 || !mwrite); + // assume (t4 || !mread); + // assume (t4 || !mwrite); /* only one sequence can be triggered at a time */ - assume (!mread || !mwrite); + // assume (!mread || !mwrite); if (reset) begin rd <= 0; @@ -87,7 +87,7 @@ module sm83_io( word_t opcode_r; always_ff @(posedge clk) begin /* instruction register should only be written during a read at T4 */ - assume ((t4 && rd) || !ctl_ir_we || ctl_zero_data_oe); + // assume ((t4 && rd) || !ctl_ir_we || ctl_zero_data_oe); if (reset) begin opcode_r <= 0; bank_cb <= 0; @@ -104,16 +104,16 @@ module sm83_io( initial opcode_r = 0; /* Don't run into illegal instructions */ - assume property (bank_cb || opcode != 'hd3); - assume property (bank_cb || opcode != 'hdb); - assume property (bank_cb || opcode != 'hdd); - assume property (bank_cb || opcode != 'he3); - assume property (bank_cb || opcode != 'he4); - assume property (bank_cb || opcode != 'heb); - assume property (bank_cb || opcode != 'hec); - assume property (bank_cb || opcode != 'hed); - assume property (bank_cb || opcode != 'hf4); - assume property (bank_cb || opcode != 'hfc); - assume property (bank_cb || opcode != 'hfd); + // assume property (bank_cb || opcode != 'hd3); + // assume property (bank_cb || opcode != 'hdb); + // assume property (bank_cb || opcode != 'hdd); + // assume property (bank_cb || opcode != 'he3); + // assume property (bank_cb || opcode != 'he4); + // assume property (bank_cb || opcode != 'heb); + // assume property (bank_cb || opcode != 'hec); + // assume property (bank_cb || opcode != 'hed); + // assume property (bank_cb || opcode != 'hf4); + // assume property (bank_cb || opcode != 'hfc); + // assume property (bank_cb || opcode != 'hfd); endmodule diff --git a/sm83/sm83_sequencer.sv b/sm83/sm83_sequencer.sv index 4a0d4f9..c360970 100644 --- a/sm83/sm83_sequencer.sv +++ b/sm83/sm83_sequencer.sv @@ -16,7 +16,7 @@ module sm83_sequencer( always_ff @(posedge clk) begin /* set_m1 should only be set on t4 */ - assume (t4 || !set_m1); + // assume (t4 || !set_m1); if (t4) { m1, m2, m3, m4, m5, m6 } <= { 1'b0, m1, m2, m3, m4, m5 }; @@ -24,8 +24,8 @@ module sm83_sequencer( { m1, m2, m3, m4, m5, m6 } <= 'b100000; end - assume property ($onehot({ m1, m2, m3, m4, m5, m6 })); - assume property ($onehot({ t1, t2, t3, t4 }) || reset); + // assume property ($onehot({ m1, m2, m3, m4, m5, m6 })); + // assume property ($onehot({ t1, t2, t3, t4 }) || reset); initial { m1, m2, m3, m4, m5, m6 } = 'b100000; initial { t1, t2, t3, t4 } = 'b1000; diff --git a/vid_dump.sv b/vid_dump.sv index a567df9..113580a 100644 --- a/vid_dump.sv +++ b/vid_dump.sv @@ -6,85 +6,118 @@ module vid_dump( input logic ld0, ld1 ); - task automatic video_dump_loop(input int f); + task automatic video_dump_loop(input int f, input bit is_running); bit [1:0] line[0:159]; int pxidx, lineidx; bit dis; + bit cancel_fork; + pxidx = 0; lineidx = 0; dis = 1; - forever fork :video_event - begin - @(posedge s); - lineidx = 0; - /* Vertical sync: - * 4 byte little endian timestamp + "V" */ - $fwrite(f, "%c%c%c%cV", t[7:0], t[15:8], t[23:16], t[31:24]); - disable video_event; - end - - begin - @(negedge cp); - if (pxidx < 160) /* Still space in line buffer? */ - line[pxidx] = { ld1, ld0 }; - if (pxidx < 161) - pxidx++; - if (st) /* Horizontal sync active at pixel clock edge? */ - pxidx = 0; - disable video_event; - end - - begin :video_latch - int j; - byte pxout; - @(posedge cpl); - if (pxidx < 160) /* Still space in line buffer? */ - line[pxidx] = { ld1, ld0 }; - if (pxidx < 161) - pxidx++; - if (dis || lineidx >= 144) - disable video_event; - /* Latch line: - * 4 byte little endian timestamp + "L" + 40 bytes pixel data - * or - * 4 byte little endian timestamp + "l" + 40 bytes pixel data - * depending on current direction */ - if (fr) - $fwrite(f, "%c%c%c%cL", t[7:0], t[15:8], t[23:16], t[31:24]); - else - $fwrite(f, "%c%c%c%cl", t[7:0], t[15:8], t[23:16], t[31:24]); - j = 0; - pxout = 0; - for (int i = 0; i < 160; i++) begin - if (pxidx) - pxout = (pxout & ~(3 << ((i & 3) * 2))) | (line[j] << ((i & 3) * 2)); - j++; - if (j >= pxidx) /* Repeat available pixels if less than 160 are in buffer */ - j = 0; - if (&i[1:0]) - $fwrite(f, "%c", pxout); + while (is_running) begin + cancel_fork = 0; + fork + begin : vert_sync + @(posedge s, posedge cancel_fork); + + if (cancel_fork) begin + disable vert_sync; + end + + $display("vertical sync"); + lineidx = 0; + /* Vertical sync: + * 4 byte little endian timestamp + "V" */ + $fwrite(f, "%c%c%c%cV", t[7:0], t[15:8], t[23:16], t[31:24]); + cancel_fork = 1; + end + + begin : horz_sync + @(negedge cp, posedge cancel_fork); + + if (cancel_fork) begin + disable horz_sync; + end + + $display("horizontal sync"); + if (pxidx < 160) /* Still space in line buffer? */ + line[pxidx] = { ld1, ld0 }; + if (pxidx < 161) + pxidx++; + if (st) /* Horizontal sync active at pixel clock edge? */ + pxidx = 0; + cancel_fork = 1; end - lineidx++; - disable video_event; - end - - begin - @(negedge cpl); - if (!cpg && !dis) begin - /* Disable display: - * 4 byte little endian timestamp + "D" */ - $fwrite(f, "%c%c%c%cD", t[7:0], t[15:8], t[23:16], t[31:24]); - dis = 1; - end else if (cpg && dis) begin - /* Enable display: - * 4 byte little endian timestamp + "E" */ - $fwrite(f, "%c%c%c%cE", t[7:0], t[15:8], t[23:16], t[31:24]); - dis = 0; + + begin :video_latch + int j; + byte pxout; + @(posedge cpl, posedge cancel_fork); + + if (cancel_fork) begin + disable video_latch; + end + + // $display("latch line"); + if (pxidx < 160) /* Still space in line buffer? */ + line[pxidx] = { ld1, ld0 }; + if (pxidx < 161) + pxidx++; + if (dis || lineidx >= 144) begin + cancel_fork = 1; + disable video_latch; + end + $display("write line"); + /* Latch line: + * 4 byte little endian timestamp + "L" + 40 bytes pixel data + * or + * 4 byte little endian timestamp + "l" + 40 bytes pixel data + * depending on current direction */ + if (fr) + $fwrite(f, "%c%c%c%cL", t[7:0], t[15:8], t[23:16], t[31:24]); + else + $fwrite(f, "%c%c%c%cl", t[7:0], t[15:8], t[23:16], t[31:24]); + j = 0; + pxout = 0; + for (int i = 0; i < 160; i++) begin + if (pxidx) + pxout = (pxout & ~(3 << ((i & 3) * 2))) | (line[j] << ((i & 3) * 2)); + j++; + if (j >= pxidx) /* Repeat available pixels if less than 160 are in buffer */ + j = 0; + if (&i[1:0]) + $fwrite(f, "%c", pxout); + end + lineidx++; + cancel_fork = 1; + end + + begin : display_enabled; + @(negedge cpl, posedge cancel_fork); + + if (cancel_fork) begin + disable display_enabled; + end + + if (!cpg && !dis) begin + $display("disable display"); + /* Disable display: + * 4 byte little endian timestamp + "D" */ + $fwrite(f, "%c%c%c%cD", t[7:0], t[15:8], t[23:16], t[31:24]); + dis = 1; + end else if (cpg && dis) begin + $display("enable display"); + /* Enable display: + * 4 byte little endian timestamp + "E" */ + $fwrite(f, "%c%c%c%cE", t[7:0], t[15:8], t[23:16], t[31:24]); + dis = 0; + end end - end - join + join + end endtask endmodule