v0.17.0#330

Merged

soronpo merged 78 commits intomainfrom

Jan 30, 2026

Commits on Nov 16, 2025

fix possible alignment difference in printing by preventing alignment from being run twice, and also invalidate app caching if alignment option is changed
Oron Port
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fix: printing with color should be set according to the option
Oron Port
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Commits on Nov 17, 2025

add 3.8 nightly resolver
Oron Port
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update scallop to v5.3.0
Oron Port
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Commits on Nov 18, 2025

fix coloring of comments that internally may be affected by other coloring mechanisms
Oron Port
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Add missing cast from DFInt32 to UInt
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fix named selection for min/max functions
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range selection UInt/SInt
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support `.extend` and `.truncate` tags in index upper-bound checks
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fix printing of vector upper bounds with `applyBrackets` to make sure proper operator precdence is applied
Oron Port
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Commits on Nov 19, 2025

fix dfhdl_defs helper constant extend macros when there is nothing to extend (removed synth warning in Vivado)
Oron Port
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Commits on Nov 20, 2025

silent verilator warnings
Oron Port
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proper verilator silencing
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fix bad signed conversion of DFInt32 numbers
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fix verilog selection is generalized to any function
Oron Port
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fix codeString tests to show unintended errors
Oron Port
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Commits on Nov 21, 2025

dangling output position changed to the port declaration
Oron Port
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fix: reduce redundant creation `clog2` creations
Oron Port
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Commits on Nov 22, 2025

fix and improve unreachable member referencing
Oron Port
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Commits on Nov 23, 2025

fix via connection with hierarchical parameters
Oron Port
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Commits on Nov 26, 2025

generalize vendor ip concept
Oron Port
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Commits on Nov 28, 2025

add ip generation support to Vivado
Oron Port
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fix publishing license for platform module
Oron Port
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Commits on Dec 2, 2025

refactor DFApp to allow manual run
Oron Port
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Commits on Dec 3, 2025

fix compiletime information during manual DFApp run
Oron Port
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support single value decimal string interpolation
Oron Port
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fix vendor library naming in printing
Oron Port
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aligned column printing of csList
Oron Port
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Commits on Dec 4, 2025

special case anonymous constant decimal negation
Oron Port
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add support for `abs` absolute value function
Oron Port
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Commits on Dec 5, 2025

add `signbit` to SInt
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fix global parameter context access during constant parameter value extraction
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fix min/max vhdl and verilog printing
Oron Port
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Commits on Dec 6, 2025

simplify literals with parametric width in verilog
Oron Port
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systemverilog does not have `$abs` for integers
Oron Port
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add `unsigned` conversion and improve `signed` conversion
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propagate DFError in TextOut
Oron Port
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improve signed verilog literals, bit extension and truncation
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add direct bit/bool to uint/sint conversions and collapse composed conversions from bit/bool
Oron Port
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Commits on Dec 7, 2025

Add `untilAbs` and `toAbs` to SInt
Oron Port
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fix paramterized-width vhdl literals
Oron Port
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Commits on Dec 8, 2025

fix comparison with boolean select wrapper
Oron Port
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Commits on Dec 9, 2025

really fix boolean select comparison
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improve ShowType for `all(...)`
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update to recent platforms
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fix vhdl greater or equals operator printing
Oron Port
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Commits on Dec 12, 2025

added commented out different behavior for modulu operation
Oron Port
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fix verilator globals warning suppression
Oron Port
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Commits on Dec 13, 2025

fix sint->uint conversion
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remove redundant naming under system verilog
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allow disabling error trapping during elaboration to present full exception trace
Oron Port
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simplify fold basic add/sub constant operations
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Commits on Dec 25, 2025

Commits on Jan 14, 2026

update to Scala 3.8.0 and other dependencies
Oron Port
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expand selection operation support
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change `: @unchecked` to `.runtimeChecked`
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Commits on Jan 16, 2026

refactor comparison ops to use ExactOp mechanism.
Oron Port
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Commits on Jan 17, 2026

commit missing runtimeChecked change
Oron Port
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continue refactoring of comparison ops and dependent typing
Oron Port
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Commits on Jan 18, 2026

remove ugly `& String` problem in bits string interpolation extraction
Oron Port
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no longer need compare workaround after last commit
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Commits on Jan 19, 2026

finally fixed `DFXInt` comparisons with `DFHDL Int`.
Oron Port
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refactored logic operations
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refactor shift and power operations to use the new exact mechanism
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refactor carry operations
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handle Scala 3.8.0 deprecation warnings
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Commits on Jan 21, 2026

fix sanity check to handle any kind of empty member in reference checking
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fix `getMembersOf` to always use the owner for flattened recursion
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Commits on Jan 29, 2026

implement concatenation logic for Patch.Add configurations: After and ReplaceWithFirst
Oron Port
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avoid anyval errors
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add DropRTWaits stage
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workaround https://github.com/verilator/verilator/issues/6893
Oron Port
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Commits on Jan 30, 2026