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@Doppl-r Overall well-written, just need more descriptiveness and formatting fixes.
| | I2CDR (data register) | 000 | R/W 0x00 | Holds the data for transmission or recently received data bytes. | | ||
| | I2CCR (Control Register) | 001 | R/W 0x00 | Enables I2C, sets Master/Slave mode, and handles Start/Stop generation. | | ||
| | I2CSR (Status Register) | 010 | R/W 0x00 | Indicates Bus Busy, Arbitration Lost, Address Match, and RX/TX Status | | ||
| | I2CBR (Baud Rate) | 011 | R/W 0x02 | Sets the clock frequency for the SCL line based on the system clock. | |
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Baud Rate, although applicable here, is a specific terminology for UART since it uses asynchronous clock signals. To prevent confusion, please use a different name like suggested below:
| | I2CBR (Baud Rate) | 011 | R/W 0x02 | Sets the clock frequency for the SCL line based on the system clock. | | |
| | I2CCD (Clock Divider) | 011 | R/W 0x02 | Sets the clock frequency for the SCL line based on the system clock. | |
| Clock Modes: Supports standard mode, 100kbps, fast-mode, 400kbps, and sometimes a high-speed mode (3.4 Mbps). For addressing it supports a standard 7-bit addressing or extended 10-bit addressing mode for identifying slaves. Multi-Master; includes built in collision detection and arbitration logic of two masters attempt to control the bus simultaneously. Pull-yps; an open-drain protocol the physical lines (SDA/SCL) require external pull-up resigstors to function. | ||
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| Behavior & Timing: | ||
| Timing is governmed by the SCL signal. Data on the SDA line must be stable while SCL is high. Transitions on SDA while SCL is high are reserved for Start and Stop conditions. |
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Possibly provide a brief description of what a data transfer would look like in I2C for members
| Timing is governmed by the SCL signal. Data on the SDA line must be stable while SCL is high. Transitions on SDA while SCL is high are reserved for Start and Stop conditions. | ||
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| Errors & Dependencies: | ||
| Errors: Managed via irq_o. Common errors are; arbitatrion lost, NACK (No acknowledge from slave) And bus overrun. |
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Provide one-line descriptions of errors and their causes
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Pretty good here too, just need a little more descriptiveness and formatting fixes. Again, please split parameter and signal tables and add heading formatting (+ bullet points if you'd like)
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Created and added I2C Module brief for IO