Fix Byt CB Bootup on SeaBIOS when using coreboot #10
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Change-Id: I9e7537181fed24ce8136e1d16db514bc3cc7070d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm> Change-Id: I449f4c6f4abcf3d8dcea12f62ca19215098dd29d
Change-Id: Ia95041edfd731dc115826788f3090e10a2f48fb4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: Ida586141a21d3179ffeebaa0ed6cb5bd5c740c22 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
If an updated EC firmware image is present in CBFS, compare to existing and update if needed. Switch to EC-RW firmware unless software sync fails. Change-Id: I08ab4255e6515a69a5bc7929765c062a9bbea404 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: I7f16f17273b4687ada653c3c160879e048f34b4a Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Recent changes to allow for dynamic detection of keyboard backlight broke functionality on older/legacy devices, particularly under Windows. Until a better solution found, revert to previous behavior. Change-Id: I30fcffb1cde0310660f1b6f97f55203d14586268 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
This reverts commit 55a9722.
Several devices had issues with fan control on cold boot and/or on S3 resume, so ensure auto control enabled on devices which have a fan. Devices without a fan will simply return an unsupported error. Change-Id: I08a8562531f8af0c71230477d0221d536443f096 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
The ME needs to be visible for proper operation in Windows/OSX Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: I7b6b09da1a3fdc34ef43789c699f7fd22b4b655b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Add _HID to parent SIO device so Windows can find the PS2K, and remove _ADR since they cannot coexist. Change-Id: I772ceef1b439cfd4e2740e53362bee9d494fb36d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
use same default fan speed, fan control as other IT8772 devices Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: I971795becfb05fb42921ff6f40a20892f4f5654a Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: Ic164244eceb52221653bd60f7217f9a09e38c1b6 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: Ie4268b4de5779ee148699c7bef8c700a99816f1e Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: Ic6e4b8b2385538eaf87082d98e8c26e9b64eb858 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
The ME needs to be visible for proper operation in Windows/OSX Change-Id: Ief4ac90f9506b8ed1075a7d2cbc23ce5868daa1f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
update lynxpoint's XHCI init using soc/broadwell as a model. fixes operation under Windows Change-Id: I02c880cb114edc0725533fec58e0d9f2790745e4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
The Acer C720(P) has been designed to have a LTE modem on a NGFF connector. Unfortunately the final revision of this chromebook doesn't have the connector populated, for this reason on coreboot this functionality is not present. Adding back this feature is not easy, but not impossible. This is a first path to: - Enable the USB port on the SIM tray. (USB MrChromebox#5) - Enable the PCIE_2 to provide a full working M.2 connector. The NGFF connector have the following features: - USB 2.0 - UIM - PCIE 1x On the mainboard there are a few component that are not populated some of those can be easily soldered (Like the NGFF connector) others can be added as daughter board. Most of the work must be done on the Power Gate. Like bypass capacitors. Looks like that all the 10K pullups and 0Ohm links are present in the board. The SIM tray socket is not populated, the part no. is unknown for that reason I have made a custom board with all the required components. This NGFF may be used to add more storage to the chromebook. Change-Id: I9c8392cc1ac7b78ba6f41b04f9457f1580f5aacd Signed-off-by: Nicolò Veronese <nicveronese@gmail.com>
Change-Id: Ie33c0635f4ab983f9831fd8a064f13db75f890cb Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: Idc74df3574aa8b1e6cc089e17f5502e5ba79ba6c
the EC Serial port on auron and slippy is non-functional, so prevent it from being visible to the OS. Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: If14d8f6a8d6069ce5aaf385d7963ec99f545cd1f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
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This patch helps fix the internal eMMC card when booting from it with the MrChromebox custom coreboot distro. If this patch isn't applied, the OS cannot boot off of it, and if you boot from USB, then you will get spamming errors in dmesg. This also doesn't show on Windows PE if you do not apply this, and it will be very slow to boot, or to even use. Note that this SMM variable is currently only in the MrChromebox coreboot distro at the moment, and is used by his EDK2 distro as well. Also the line added in this patch should not be added to CBFS booting, so we can assume that the next payload woll do the same thing, like if we chainload SeaBIOS to EDK2. Also this is a dirty patch and should not be sent to mainline SeaBIOS and people hope for it to be removed with a coreboot fix anyways, when it isn't needed in EDK2 as well to boot or use. Tested only on GOOGLE Enguarde at the moment. MrChromebox = Matt DeVillier
Byt = Intel Bay Trail
CB = ChromeBook (and other Chrome OS Devices like Chromebox)