feat(difftest): support DiffPhyRegState and DiffArchRenameTable #714
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klin02
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When applying DiffTest with Palladium/FPGA, the probe of ArchReg will double Regfile areas due to multi reads from register. This change support replace multi-read ports with Preg and RenameTable. Note numPregs may be larger than 256, need to adjust addr width of renameTable later.
Filter writebacks in Preprocess and get_commit_data from phyRegs.
This change add config lazyArchUpdate for Preprocess. When enabled, Preg and Rename will be extracted to archReg and commitData in software; otherwise (by default) they will be replaced in hardware.
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NutShell PR: OSCPU/NutShell#242 |
Anzooooo
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poemonsense
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| return | ||
| #ifdef CONFIG_DIFFTEST_INTWRITEBACK | ||
| dut->wb_int[dut->commit[i].wpdest].data; | ||
| #else |
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This #else is wrong. When both Int and Arch are defined, they should exist both.
See https://github.com/OpenXiangShan/difftest/actions/runs/19317148467/job/55250795228
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This commit introduces DiffPhyRegState and DiffArchRenameTable as new Difftest
interfaces. A new option
softArchUpdateis also added (disabled by default).By default, Difftest replaces PhyReg and RenameTable with ArchReg and CommitData
(WriteBack results) on the hardware side to keep backward compatibility.
When
softArchUpdateis enabled, this substitution is deferred to the software side,reducing hardware area overhead by avoiding extra read ports in the register files.