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feat: 65c02 emulator#199

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patricksurry wants to merge 12 commits intoSamCoVT:master-64tassfrom
patricksurry:65c02-emulator
Open

feat: 65c02 emulator#199
patricksurry wants to merge 12 commits intoSamCoVT:master-64tassfrom
patricksurry:65c02-emulator

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@patricksurry
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This is some example TaliForth code that implements an instruction-level 65c02 emulator.

For some 6502 disassembly stuff I'm playing with I wanted some simple logic equations that described each opcode which I could use to reason about which registers or data locations were affected by a given instruction stream.

I realized that Forth would be a nice clean way to express that which was also testable. I got slightly carried away and ended up writing this full 65c02 emulator in TaliForth. As a demonstration it successfully emulates the assembled version of its own UM* word, as well as passing a large suite of tests.

@SamCoVT
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SamCoVT commented Jan 21, 2026

This looks good - let me know once you like it and I will merge it.

@patricksurry
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yup, this should also be good - i added to the forum thread confirming that Klaus' test suite passes. Not exactly speedy though 😅

@patricksurry
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on second thought I might fool with a couple of simple optimizations so if you want to hold off merging that's fine.

it looks like inlined consts and some native support for bit-twiddling would make a huge difference (lots of shenanigans to maintain flags). do you have any favored syntax for bit twiddling, like test/set/clear a bit, or replace a masked set of bits in a cell?

@SamCoVT
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SamCoVT commented Jan 22, 2026

That sounds fine - I'll hold off on this one for now. I don't have any preferred syntax for bit twiddling - I usually just AND/OR/XOR with masks.

Klaus' test suite takes a long time even on real hardware. If you got that to pass, then you should be in very good shape logic-wise.

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2 participants