My name is Vasiliy Matrenin. I do R&D π¬π» in the field of CPU technologies
I live in Moscow, Russia. You can also see my curriculum vitae
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πΌ Junior/Middle Engineer | Huawei (2022 - Present)
β«οΈ R&D in the field of CPU technologies
β«οΈ Implemented data processing/generation tools
β«οΈ Participated in future directions discussions
β«οΈ Managed small team (3 people)
β«οΈ Mentored 2 junior devs -
π Summer intern | Intel (2021.07 - 2021.08)
β«οΈ Investigated possibilities for Intel IPP data compression algos integration
β«οΈ Optimized Intel IPP data compression algos
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π Bachelors degree in Applied Mathematics & Physics
MIPT, Moscow (2020 - 2024)
β«οΈ Thesis: Synthetic execution traces generation for testing
β«οΈ Relevant Courses:C/C++,CPUs Arch,CPUs micro-Arch,CPUs Functional Simulation,HDL,OS,LLVM,PLs VMs,STM32 -
π Master student in Applied Mathematics & Physics
MIPT, Moscow (2024 - Present)
β«οΈ Relevant Courses:Advanced C++,XPUs micro-Arch,JIT & AOT,PLs Design,Python
| Project | Description | Technologies |
|---|---|---|
| Sim 2023 | Functional RISC-V simulator | C++ |
| LLVM practice | LLVM practice repo | C++ LLVM Flex+Bison |
| JIT & AOT | JIT & AOT practice | C++ Graphs |
- π₯ CPU: Arch, Simulation, Co-design
- πΎ Data structs & Algos
- π» C++: Latest standards, Conferences
- π€ ML: For compilers & Big data


