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1. 8bit_CPU 8bit_CPU Public

   A modular 8-bit CPU designed in Verilog for the BASYS3 FPGA. Features a 16-bit instruction format, 8-bit data path, and components including an ALU, FSM, Decoder, Register File, and Data Memory. Bu…

   Verilog 3

2. Unsigned-8x8_Wallace_Tree Unsigned-8x8_Wallace_Tree Public

   Structural 8-bit Wallace Tree multiplier written in Verilog and tested on Vivado for Zynq-7000. Features full partial-product generation, multi-level compressor tree, final addition stage, and a ti…

   Verilog