Incoming MASc Comp Eng @ University of Toronto,
Formerly FPGA Arch Eng Intern @ Microchip, Electronics Engineer @ University of Toronto Hyperloop Team (UTHT)
- Toronto, Ontario, Canada
- www.linkedin.com/in/angusjhwu
Highlights
- Pro
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RISC-Vibe-v1
RISC-Vibe-v1 PublicVibecoding a RISC-V processor and seeing how far Anthropic Claude takes it.
SystemVerilog
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