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save(g128 MTL 270Gflops bug on g32) add UT for gemv
Co-authored-by: Meng, Hengyu <hengyu.meng@intel.com>
Co-authored-by: Meng, Hengyu <hengyu.meng@intel.com>
enable 2d payload on Xe2
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DDEle
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Jul 29, 2024
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DDEle
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If the config numbers of Xe2 and XeHpc are identical, maybe we can just add an alias instead of a complete class. A new class of config will add an additional of roughly 1/3 of the compilation/linkage workload while an alias is free.
BTW, what's the status of this PR?
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| template <> | ||
| struct load_store_attr_t<msg_type::block_2d, gpu_arch::XeHpc> { | ||
| /// HW limitation checks https://gfxspecs.intel.com/Predator/Home/Index/55490 |
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There are multiple places with the gfxspecs link. I think they are helpful for internal developers. If they violate any company policies, they should be removed all at once in a separate PR.
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feature or bug fix or documentation or others
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Issues: xxx
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