added Zynq7000, MPSoC patches

README.md

@@ -2,21 +2,21 @@
 This is the MathWorks Yocto layer to make it easier to interface MATLAB(R)/Simulink(TM) SoC Blockset software feature set with AMD-Xilinx FPGA SoC hardware platforms (like AMD-Xilinx Zynq-7000, Xilinx ZynqMPSoC, Xilinx ZynqRFSoC, Xilinx Versal).
 
 ### Dependencies
-This layer is added on top of the [PetaLinux BSPs provided by AMD-Xilinx](https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2347204609/2022.1+Release).
+This layer is added on top of the [PetaLinux BSPs provided by AMD-Xilinx](https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2654765057/2023.1+Release).
 
 
 ### Using the meta-mathworks Layer
-PetaLinux ecosystem of Linux build system can be used to generate a new Embedded Linux image for use with the AMD-Xilinx FPGA SoC platforms. PetaLinux is a wrapper around the Yocto tools to make the configuration of the Embedded Linux image easier. For more information about the PetaLinux SDK refer to [PetaLinux User Guide](https://www.xilinx.com/support/documentation/sw_manuals/xilinx2022_1/ug1144-petalinux-tools-reference-guide.pdf) or [PetaLinux Wiki] (https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842250/PetaLinux).
+PetaLinux ecosystem of Linux build system can be used to generate a new Embedded Linux image for use with the AMD-Xilinx FPGA SoC platforms. PetaLinux is a wrapper around the Yocto tools to make the configuration of the Embedded Linux image easier. For more information about the PetaLinux SDK refer to [PetaLinux User Guide](https://docs.amd.com/r/2023.1-English/ug1144-petalinux-tools-reference-guide/Overview) or  [PetaLinux Wiki](https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842250/PetaLinux).
 
-This layer supports PetaLinux 2022.1 version of PetaLinux tools.
+This layer supports PetaLinux 2023.1 version of PetaLinux tools.
 
 To build a PetaLinux project using the MathWorks yocto layer, you need a Linux computer or a Virtual Machine running Ubuntu where you have downloaded and already installed [PetaLinux software](https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842250/PetaLinux).
 
 Open a Linux terminal and run following commands:
 
 ```bash
 source <path-to-petalinux-installation-root>/settings.sh
-git clone https://github.com/mathworks/meta-mathworks -b petalinux-2022.1
+git clone https://github.com/mathworks/meta-mathworks -b petalinux-2023.1
 petalinux-create -t project --template <PLATFORM> --name <PROJECT_NAME>
   Here <PLATFORM> can be any one of:
     * zynqMP (for Xilinx Zynq UltraScale+ MPSoC platform)
@@ -26,7 +26,7 @@ petalinux-create -t project --template <PLATFORM> --name <PROJECT_NAME>
 petalinux-config --get-hw-description=<path to XSA file>
   Here XSA, Xilinx Software Architecture, file is obtained by exporting the Vivado project for embedded software development.
 ```
-Alternatively, you can use a [pre-built PetaLinux BSP file](https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2347204609/2022.1+Release) for your hardware board to create the project.
+Alternatively, you can use a [pre-built PetaLinux BSP file](https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2654765057/2023.1+Release) for your hardware board to create the project.
 
 ```bash
 petalinux-create -t project -s <full-path-to-the-bsp-file>

recipes-apps/mw-fs-overlay/files/common/fs-overlay/etc/init.d/usb_network

@@ -19,7 +19,10 @@ create_system_files () {
 	then 
 		UDHCPD_CONF=/etc/udhcpd.conf
 		IFAC=/etc/network/interfaces
-		NETMASK=`fw_printenv -n netmask 2> /dev/null || echo 255.255.255.0`
+		NETMASK=`echo $NET_MASK`
+		if [ -z "$NETMASK" ]; then
+			NETMASK="255.255.255.0"
+		fi
 		### Replace /etc/udhcpd.conf ###
 		echo "start $USB_IPADDR_HOST" > $UDHCPD_CONF
 		echo "end $USB_IPADDR_HOST" >> $UDHCPD_CONF

recipes-apps/mw-fs-overlay/files/common/fs-overlay/etc/udev/rules.d/100-mw-drivers.rules

@@ -1,2 +1,8 @@
 # map mwipcore0 to mwipcore for legacy models
- KERNEL=="mwipcore0", SYMLINK+="mwipcore"
+KERNEL=="mwipcore0", SYMLINK+="mwipcore"
+KERNEL=="mwipcore_frame_buffer0", SYMLINK+="mwipcore_frame_buffer"
+KERNEL=="mwipcore_framecapture0", SYMLINK+="mwipcore_framecapture"
+KERNEL=="mwipcore_hdmi_out0", SYMLINK+="mwipcore_hdmi_out"
+KERNEL=="mwipcore_dutbypass0", SYMLINK+="mwipcore_dutbypass"
+KERNEL=="mwipcore_hdmi_in0", SYMLINK+="mwipcore_hdmi_in"
+KERNEL=="mwipcore_tpg0", SYMLINK+="mwipcore_tpg"

recipes-apps/mw-fs-overlay/mw-fs-overlay.bb

@@ -39,7 +39,7 @@ SERVICEUNITS = "sdcard_mount.service usb_network.service \
  inetd.service user_app.service nfs-common.service hostname.service \
  backupSSHKeys.service restoreSSHKeys.service udc.service "
 
-SYSTEMD_SERVICE:${PN} = "${@bb.utils.contains('INIT_MANAGER','systemd','${SERVICEUNITS}','" "',d)}"
+SYSTEMD_SERVICE:${PN} = "${@bb.utils.contains('INIT_MANAGER','systemd','${SERVICEUNITS}','',d)}"
 
 do_install() {
 	chmod -R 0755 ${WORKDIR}/common/fs-overlay/usr/sbin/

recipes-apps/mw-refdesign-dtb/files/CMakeLists.txt

@@ -46,6 +46,7 @@ list(APPEND SUPPORTED_BOARDS
   zc706
   zc702
   zed
+  zcu106_imx
 )
 
 foreach (b IN LISTS SUPPORTED_BOARDS)

recipes-apps/mw-refdesign-dtb/files/common/dts/mw-dlhdl-iio-common.dtsi

@@ -50,8 +50,6 @@
 	compatible = "mathworks,mwipcore-v3.00";
 	#address-cells = <0x1>;
 	#size-cells = <0x0>;
-	linux,phandle = <0x41>;
-	phandle = <0x41>;
 
 	mmrd-channel@0 {
 		reg = <0x0>;

recipes-apps/mw-refdesign-dtb/files/zynq/boards/picozed/dts/base.dtsi

@@ -1,5 +1,6 @@
 /dts-v1/;
 
+#include "zynq.dtsi"
 #include "zynq-picozed.dtsi"
 #include "zynq-mw-common.dtsi"
 

recipes-apps/mw-refdesign-dtb/files/zynq/boards/picozed/dts/visionzynq.dts

@@ -0,0 +1,2 @@
+#include "base.dtsi"
+#include "zynq-mw-visionzynq-common.dtsi"

recipes-apps/mw-refdesign-dtb/files/zynq/boards/picozed/dts/visionzynq_axis.dts

@@ -0,0 +1,3 @@
+#include "base.dtsi"
+#include "zynq-mw-visionzynq-common.dtsi"
+#include "zynq-mw-visionzynq-axis.dtsi"

recipes-apps/mw-refdesign-dtb/files/zynq/boards/picozed/dts/zynq-picozed.dtsi

@@ -1,5 +1,3 @@
-/include/ "zynq.dtsi"
-
 / {
 	model = "Xilinx Zynq PicoZed";
 	memory {
@@ -13,19 +11,28 @@
 	};
 };
 
-&eth {
+&aliases {
+	ethernet1 = &gem1;
+};
+
+&gem1 {
 	status = "okay";
-	phy-handle = <&phy0>;
-	phy-mode = "rgmii-id";
+	phy-handle = <&gmiitorgmii>;
+	phy-mode = "gmii";
+
+	gmiitorgmii: gmiitorgmii@8 {
+		compatible = "xlnx,gmii-to-rgmii-1.0";
+		reg = <0x8>;
+		phy-handle = <&phy1>;
+	};
 
-	phy0: phy@0 {
-		compatible = "marvell,88e1510";
+	phy1: phy@1 {
 		device_type = "ethernet-phy";
-		reg = <0x0>;
-		marvell,reg-init=<3 16 0xff00 0x1e 3 17 0xfff0 0x0a>;
+		reg = <0x1>;
+		marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;
 	};
 };
-
+	
 &sdhci1 {
 	status = "okay";
 	/* SD1 is onnected to a non-removable eMMC flash device */
@@ -75,4 +82,4 @@
 			reg = <0xC00000 0x400000>;
 		};
 	};
-};
+};

recipes-apps/mw-refdesign-dtb/files/zynq/boards/picozed/dts/zynq.dtsi

@@ -0,0 +1,32 @@
+
+#include "zynq-7000.dtsi"
+
+/ {
+	interrupt-parent = <&intc>;
+
+	aliases: aliases {
+		ethernet0 = &gem0;
+		serial0 = &uart1;
+	};
+};
+
+&gem0 {
+	status = "okay";
+};
+
+&clkc {
+	ps-clk-frequency = <33333333>;
+};
+
+&usb0 {
+	status = "okay";
+	dr_mode = "host"; /* This breaks OTG mode */
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&sdhci0 {
+	status = "okay";
+};

recipes-apps/mw-refdesign-dtb/files/zynq/boards/zed/dts/base.dtsi

@@ -1,6 +1,13 @@
 #include "zynq-zed.dts"
 #include "zynq-mw-common.dtsi"
 #include "zynq-mw-axilite-common.dtsi"
+
+/ {
+        chosen {
+                bootargs = "earlycon root=/dev/ram rw cma=128M";
+        };
+};
+
 &mwipcore0 {
 	reg = <0x400D0000 0xffff>;
 };

recipes-apps/mw-refdesign-dtb/files/zynq/dts/zynq-adi-mw-axistream-iio-common.dtsi

@@ -3,10 +3,10 @@
 
 &axi4stream_mm2s {
 	reg = <0x40020000 0x10000>;
-	interrupts = <0x0 0x1d 0x0>;
+	interrupts = <0x0 0x1d 0x04>;
 };
 &axi4stream_s2mm {
 	reg = <0x40030000 0x10000>;
-	interrupts = <0x0 0x1e 0x0>;
+	interrupts = <0x0 0x1e 0x04>;
 };
 

recipes-apps/mw-refdesign-dtb/files/zynq/dts/zynq-mw-ad9361.dtsi

@@ -9,9 +9,12 @@
 
 &fpga_axi {
 	/delete-node/ mwipcore@43c00000;
+	/delete-node/ dma@43000000;
     cf_ad9361_dac_core_0: cf-ad9361-dds-core-lpc@79024000 {
         /* Mute DDS by default */
         adi,axi-dds-default-scale = <0>;
+	adi,axi-dds-rate = <0x01>;
+	adi,axi-dds-1-rf-channel;
     };
 };
 

recipes-apps/mw-refdesign-dtb/files/zynq/dts/zynq-mw-dlhdl-iio-common.dtsi

@@ -1,14 +1,14 @@
 &fpga_axi {
-		mwipcore_ddr0: mwipcore_ddr@0 {
-			compatible = "mathworks,mwipcore-v2.00";
-			reg = <0x40010000 0x10000>;
-		};
+                mwipcore_dl0: mwipcore_dl@0 {
+                        compatible = "mathworks,mwipcore-v2.00";
+                        reg = <0x44A00000 0x10000>;
+                };
 };
 
 &fpga_axi {
-		mwipcore_dl0: mwipcore_dl@0 {
+		mwipcore_ddr0: mwipcore_ddr@0 {
 			compatible = "mathworks,mwipcore-v2.00";
-			reg = <0x44A00000 0x10000>;
+			reg = <0x40010000 0x10000>;
 		};
 };
 

recipes-apps/mw-refdesign-dtb/files/zynq/dts/zynq-mw-fmcomms5.dtsi

@@ -9,9 +9,12 @@
 
 &fpga_axi {
 	/delete-node/ mwipcore@43c00000;
+	/delete-node/ dma@43000000;
     cf_ad9361_dac_core_0: cf-ad9361-dds-core-lpc@79024000 {
         /* Mute DDS by default */
         adi,axi-dds-default-scale = <0>;
+	adi,axi-dds-rate = <0x01>;
+	adi,axi-dds-1-rf-channel;
     };
 
     cf_ad9361_dac_core_1: cf-ad9361-dds-core-B@79044000 {

recipes-apps/mw-refdesign-dtb/files/zynq/dts/zynq-mw-hdmicam-common.dtsi

@@ -13,7 +13,7 @@
 			reg = <1>;
 
 			adv7511@39 {
-				compatible = "adv7511-media";
+				compatible = "adv7511-v4l2";
 				reg = <0x39>;
 				powerdown-gpio = <&pca9534 4 GPIO_ACTIVE_HIGH>;
 				edid-addr = <0x3F>;

recipes-apps/mw-refdesign-dtb/files/zynq/dts/zynq-mw-imageon-common.dtsi

@@ -40,7 +40,7 @@
 			reg = <1>;
 
 			adv7511@39 {
-				compatible = "adv7511-media";
+				compatible = "adv7511-v4l2";
 				reg = <0x39>;
 				powerdown-gpio = <&pca9534 4 GPIO_ACTIVE_HIGH>;
 				edid-addr = <0x3F>;

recipes-apps/mw-refdesign-dtb/files/zynqmp/boards/zcu102/dts/fmcomms2_axis.dts

@@ -1,2 +1,8 @@
 #include "fmcomms2.dts"
 #include "zynqmp-mw-ad9361-axis.dtsi"
+&axi4stream_mm2s{
+	interrupts = <0x00 0x59 0x04>;
+};
+&axi4stream_s2mm{
+	interrupts = <0x00 0x5a 0x04>;
+};

recipes-apps/mw-refdesign-dtb/files/zynqmp/boards/zcu106_imx/base.dtsi

@@ -0,0 +1,6 @@
+#include "zynqmp-zcu106-revA.dts"
+/ {
+        chosen {
+            bootargs = "earlycon root=/dev/ram rw";
+        };
+};

recipes-apps/mw-refdesign-dtb/files/zynqmp/boards/zcu106_imx/imx274/common/li-imx274mipi-fmc.dtsi

@@ -0,0 +1,29 @@
+&i2c1 {
+	i2cswitch@75 {
+		i2c@0 {
+			eeprom@57 { /* HPC0_IIC */
+				compatible = "at,24c64";
+				reg = <0x57>;
+			};
+		};
+	};
+};
+
+&sensor_iic_0 {
+	clocks = <&vid_s_axi_clk>;
+	imx274: sensor@1a{
+		compatible = "sony,imx274";
+		reg = <0x1a>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reset-gpios = <&gpio 90 0>;
+
+		port@0 {
+			reg = <0>;
+
+			sensor_out: endpoint {
+				remote-endpoint = <&mipi_csi_inmipi_csi2_rx_mipi_csi2_rx_subsystem_0>;
+			};
+		};
+	};
+};