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MLK-10463-1 ARM: imx: init ENET RGMII tx clock source #39

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MLK-10463-1 ARM: imx: init ENET RGMII tx clock source #39

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14 changes: 14 additions & 0 deletions arch/arm/mach-imx/mach-imx6q.c
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Original file line number Diff line number Diff line change
Expand Up @@ -76,6 +76,18 @@ static void __init imx6q_enet_phy_init(void)
}
}

static void __init imx6q_enet_clk_sel(void)
{
struct regmap *gpr;

gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
if (!IS_ERR(gpr))
regmap_update_bits(gpr, IOMUXC_GPR5,
IMX6Q_GPR5_ENET_TX_CLK_SEL, IMX6Q_GPR5_ENET_TX_CLK_SEL);
else
pr_err("failed to find fsl,imx6q-iomux-gpr regmap\n");
}

static void __init imx6q_1588_init(void)
{
struct device_node *np;
Expand Down Expand Up @@ -211,6 +223,8 @@ static void __init imx6q_init_machine(void)
imx_get_soc_revision());

imx6q_enet_phy_init();
if (cpu_is_imx6q() && imx_get_soc_revision() >= IMX_CHIP_REVISION_2_0)
imx6q_enet_clk_sel();

of_platform_default_populate(NULL, NULL, NULL);

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1 change: 1 addition & 0 deletions include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
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Original file line number Diff line number Diff line change
Expand Up @@ -240,6 +240,7 @@
#define IMX6Q_GPR4_IPU_RD_CACHE_CTL BIT(0)

#define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
#define IMX6Q_GPR5_ENET_TX_CLK_SEL BIT(9)
#define IMX6Q_GPR5_SATA_SW_PD BIT(10)
#define IMX6Q_GPR5_SATA_SW_RST BIT(11)
#define IMX6Q_GPR5_PRE_PRG_SEL0_MASK (0x3 << 12)
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