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@Lore0599 Lore0599 commented Dec 2, 2025

This PR introduces mechanisms to decouple the AXI read and write wide channels:

HW Changes:

  • floo_vc_arbiter:

    • Multiplane: When floo_nw_router is configured with NumWidePhysChannels = 2 and NumWideVirtChannels = 2, the wide router behaves as two separate routers: one for read streams and one for write streams.
    • Credit-based VC: floo_vc_arbiter can now be implemented using a credit-based approach. This requires proper InputFifo parameterization to sustain full NoC throughput.
    • PreemptValid: This mechanism is based on preempting data on the shared link.
  • floo_nw_chimney: The chimney has been modified to support 2 inputs/outputs wide links. This is needed to decouple read and write streams.

@Lore0599 Lore0599 requested review from colluca and fischeti December 2, 2025 16:42
@Lore0599 Lore0599 changed the title hw: Wide read and Write decoupling hw: Wide read and write decoupling Dec 2, 2025
@Lore0599 Lore0599 force-pushed the lleone/feature-vc branch 2 times, most recently from 56c4ab1 to c0aaa25 Compare December 3, 2025 13:57
@Lore0599 Lore0599 force-pushed the lleone/feature-vc branch 4 times, most recently from 6e00863 to a38af31 Compare December 3, 2025 16:30
@Lore0599 Lore0599 marked this pull request as ready for review December 3, 2025 16:49
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Thanks for the efforts in cleaning this up! I still need to go through the chimney in more detail, but I already have a round of comments. But I think we should be able to merge it eventually.

On general comment I have is that the parametrization of the decoupling feature is not really consistent between chimney and router. Or at least it is not entirely clear to me how to make them compatible. It would maybe be better to create a new enum:

typedef enum logic[1:0] {
    None;
    Vc;
    Phys;
} wide_rw_decouple_e;

and use this throughout the project to calculate the number of physical/virtual channels.

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Not really required, but since this wrapper is a nice playground for backend trials, it could be nice to also include the network interface in it for the local ports.

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I totally agree, but since this will require to make some PnR trials I would move this feature to a different PR

Comment on lines 135 to 141
for (genvar i = 0; i < NumInputs; i++) begin: gen_credit_tied_zero_req
assign floo_req_o[i].credit = '0;
end
// Narrow rsp links never rely on credit based flow
for (genvar i = 0; i < NumOutputs; i++) begin: gen_credit_tied_zero_rsp
assign floo_rsp_o[i].credit = '0;
end
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I would argue that this is already done in the chimney in the packing:

always_comb begin
floo_narrow_aw = '0;
floo_narrow_aw.hdr.rob_req = narrow_aw_rob_req_out;

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The signal floo_narrow_aw enters the module (i_req_wormhole_arbiter)[https://github.com/pulp-platform/FlooNoC/blob/439a2e9b6a37e57225bf042df7d36fa052f9db83/hw/floo_nw_chimney.sv#L1110-L1116].
This arbiter drives only valid, ready, and the data signals, leaving the output credit signal undriven.

For clarity, I can move the tie-off of credit to zero directly into the chimney.

Comment on lines 139 to 144
if (VcImplementation == floo_pkg::VcCreditBased) begin: gen_credit_support
assign credit_o[in][v] = credit_gnt_q[in][v];
assign credit_gnt_d[in][v] = in_valid[in][v] & in_ready[in][v];
`FF(credit_gnt_q[in][v], credit_gnt_d[in][v], 1'b0);
end else begin: gen_no_credit
assign credit_o[in][v] = 1'b1;
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Actually, we could just reuse the ready signal to return the credit, no? This would make the typedefs a bit easier. Because afaik, the ready is not used in credit-based flow control, and the credit is in the end just a delayed ready

@Lore0599 Lore0599 force-pushed the lleone/feature-vc branch 4 times, most recently from 2dc586c to 358a726 Compare December 16, 2025 16:06
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3 participants