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FROMLIST: arm64: dts: qcom: Enable lvds panel-DV215FHM-R01 for lemans…#704

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FROMLIST: arm64: dts: qcom: Enable lvds panel-DV215FHM-R01 for lemans…#704
quic-botlagun wants to merge 28 commits intoqualcomm-linux:tech/all/dt/qcs9100from
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@quic-botlagun quic-botlagun commented Feb 19, 2026

…-evk Mezzanine

LT9211c bridge and lvds panel node.
LT9211c is powered by default with reset gpio connected to 37.

Link: https://lore.kernel.org/lkml/20260219-enable-lvds-lemans-mezzanine-v1-1-9cb2075f7c18@oss.qualcomm.com/

pvgtejas-quic and others added 27 commits December 18, 2025 22:15
Add gpu and gmu nodes for sa8775p chipset. Also, add the speedbin
qfprom node and wire it up with GPU node.

Link: https://lore.kernel.org/r/20251105-a663-gpu-support-v7-2-1bcf7f151125@oss.qualcomm.com
Signed-off-by: Puranam V G Tejaswi <quic_pvgtejas@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Unlike the CPU, the GPU does not throttle its speed automatically when it
reaches high temperatures.

Set up GPU cooling by throttling the GPU speed
when reaching 105°C.

Link: https://lore.kernel.org/r/20251105-a663-gpu-support-v7-3-1bcf7f151125@oss.qualcomm.com
Signed-off-by: Gaurav Kohli <quic_gkohli@quicinc.com>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Enable GPU for lemans-evk platform and provide path for zap
shader.

Link: https://lore.kernel.org/r/20251105-a663-gpu-support-v7-4-1bcf7f151125@oss.qualcomm.com
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Enable GPU on both qcs9100-ride platforms and provide the path
for zap shader.

Link: https://lore.kernel.org/r/20251105-a663-gpu-support-v7-5-1bcf7f151125@oss.qualcomm.com
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Add support for SYSTEM_RESET2 vendor-specific resets
as reboot-modes in the psci node.  Describe the resets:
"bootloader" will cause device to reboot and stop in the
bootloader's fastboot mode.  "edl" will cause device to reboot
into "emergency download mode", which permits loading images via
the Firehose protocol.

Link: https://lore.kernel.org/r/20251109-arm-psci-system_reset2-vendor-reboots-v17-10-46e085bca4cc@oss.qualcomm.com
Signed-off-by: Elliot Berman <elliot.berman@oss.qualcomm.com>
Signed-off-by: Shivendra Pratap <shivendra.pratap@oss.qualcomm.com>
All the Lemans IOT variants boards are using Gunyah hypervisor which
means that, so far, Linux-based OS could only boot in EL1 on those
devices.  However, it is possible for us to boot Linux at EL2 on these
devices [1].

When running under Gunyah, the remote processor firmware IOMMU streams
are controlled by Gunyah. However, without Gunyah, the IOMMU is managed
by the consumer of this DeviceTree. Therefore, describe the firmware
streams for each remote processor.

Add a EL2-specific DT overlay and apply it to Lemans IOT variant
devices to create -el2.dtb for each of them alongside "normal" dtb.

[1]
https://docs.qualcomm.com/bundle/publicresource/topics/80-70020-4/boot-developer-touchpoints.html#uefi

Link: https://lore.kernel.org/r/20251217-kvm_rproc_v9-v9-14-ab7ac03e0ff1@oss.qualcomm.com
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Add edp reference clock for edp phy on lemans chipset.

Link:https://lore.kernel.org/all/20251013104806.6599-4-quic_riteshk@quicinc.com/
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
There's a WCN6855 WiFi/Bluetooth module on an M.2 card. To make
Bluetooth work, we need to define the necessary device tree nodes,
including UART configuration and power supplies.

Since there is no standard M.2 binding in the device tree at present,
the PMU is described using dedicated PMU nodes to represent the
internal regulators required by the module.

The module provides a 3.3V supply, which originates from the
main board’s 12V rail. To represent this power hierarchy in the device
tree, add a fixed 12V regulator node as the DC-IN source and link it
to the 3.3V regulator node.

Link: https://lore.kernel.org/all/20251112071147.1450258-2-wei.deng@oss.qualcomm.com/
Signed-off-by: Wei Deng <wei.deng@oss.qualcomm.com>
Enable ST33HTPM TPM over SPI16 on the LeMans IoT EVK by adding the
required SPI and TPM nodes.

Link: https://lore.kernel.org/all/20251114-enable-tpm-lemans-v1-1-c8d8b580ace7@oss.qualcomm.com/

Signed-off-by: Khalid Faisal Ansari <khalid.ansari@oss.qualcomm.com>
…m SGMII PHY

Describe the additional vdda-0p9-supply for the Qualcomm SGMII PHY.

Link: https://lore.kernel.org/r/20251124-sgmiieth_serdes_regulator-v1-1-73ae8f9cbe2a@oss.qualcomm.com
Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
…ulator

Add the additional 0.9V regulator for the Qualcomm SerDes PHY.

Fixes: 71ee90e ("arm64: dts: qcom: lemans-evk: Enable 2.5G Ethernet interface")
Link: https://lore.kernel.org/r/20251124-sgmiieth_serdes_regulator-v1-2-73ae8f9cbe2a@oss.qualcomm.com
Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
… PHY regulators

Add the additional 0.9V regulators for both of the Qualcomm SerDes PHYs.

Link: https://lore.kernel.org/r/20251124-sgmiieth_serdes_regulator-v1-3-73ae8f9cbe2a@oss.qualcomm.com
Fixes: 5ef26fb ("arm64: dts: qcom: sa8775p-ride: enable the SerDes PHY")
Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
Add cooling-cells property to the CPU nodes to support cpufreq
cooling devices.

Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251215045451.3150894-1-gaurav.kohli@oss.qualcomm.com
Enable cdsp cooling devices and thermal zone cooling map bindings for
both cdsp and cdsp1.

Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251223123227.1317244-6-gaurav.kohli@oss.qualcomm.com
…SB controller

Enable OTG support for primary USB controller on EVK Platform. Add
HD3SS3220 Type-C port controller present between Type-C port and SoC
that provides role switch notifications to controller.

Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20251128102507.3206169-1-krishna.kurapati@oss.qualcomm.com/
…r primary port controller

Rename the hd3ss3220_ instance to improve clarity and simplify usage when
adding a secondary port controller.

Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20251220063537.3639535-4-swati.agarwal@oss.qualcomm.com/
…er in host mode

Enable secondary USB controller in host mode on lemans EVK Platform.

For secondary USB Typec port, there is a genesys USB HUB GL3590 having 4
ports sitting in between SOC and HD3SS3220 Type-C port controller and SS
lines run from the SoC through the hub to the Port controller. Mark the
second USB controller as host only capable.

Add HD3SS3220 Type-C port controller along with Type-c connector for
controlling vbus supply.

Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20251220063537.3639535-5-swati.agarwal@oss.qualcomm.com/
…bypass pwrseq flow

There is a conflict between the current DTS configuration and the
driver behavior for the WCN6855 Bluetooth path. With the PMU node in
place, the driver takes the pwrseq code path unintentionally, which
leads to Bluetooth failing to power up during an on -> off -> on
transition.

To unblock function, temporarily remove the WCN6855 PMU node so that
the driver follows the non-pwrseq path and avoids the unexpected sequence.

This is a TEMPORARY WORKAROUND. Once a proper M.2 binding/solution is
upstreamed, will re-submit both DTS and driver changes aligned with
the M.2 model.

Signed-off-by: Wei Deng <wei.deng@oss.qualcomm.com>
Add Qualcomm Crypto Engine device node for LeMans platform.

QCE and Crypto DMA nodes patch was applied as part of the
commit 7ff3da4 ("arm64: dts: qcom: sa8775p: add QCrypto nodes"),
however was partially reverted by commit 92979f1 ("arm64: dts: qcom:
sa8775p: Partially revert "arm64: dts: qcom: sa8775p: add QCrypto nodes"")
due to compatible-string being miss-matched against schema.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20251224-enable-qualcomm-crypto-engine-for-lemans-v2-1-a707e3d38765@oss.qualcomm.com/
Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>
…uration

We don't need to use zap shader in EL2 as Linux can zap the gpu on
it's own. Lets disable zap-shader for Lemans EL2 configuration.

Link: https://lore.kernel.org/lkml/20260127-talos-el2-overlay-v2-1-b6a2266532c4@oss.qualcomm.com/
Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
The Mezzanine is an hardware expansion add-on board designed
to be stacked on top of Lemans EVK.

It has following peripherals :

- 4x Type A USB ports in host mode.
- TC9563 PCIe switch, which has following three downstream ports (DSP) :
   - 1st DSP connects M.2 E-key connector for connecting WLAN endpoints.
   - 2nd DSP connects M.2 B-key connector for connecting cellular modems.
   - 3rd DSP with support for Dual Ethernet ports.
- eMMC.
- Additional 2.5GbE Ethernet PHY connected to native EMAC with support for
  MAC Address configuration via NVMEM.
- EEPROM.
- LVDS Display.
- 2*mini DP.

Add support for following peripherals :
- TC9563 PCIe Switch.
- Additional 2.5GbE Ethernet Port.
- EEPROM.

Written with inputs from :
    Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet.
    Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe
    Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM.

Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260203193848.123307-2-umang.chheda@oss.qualcomm.com
Add support for IRIS on lemans when Linux host running at EL2.

Signed-off-by: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
…t for Lemans EVK

Enable PCA9538 expander as interrupt controller on Lemans EVK and configure
the corresponding TLMM pins via pinctrl to operate as GPIO inputs with
internal pull-ups.

Link: https://lore.kernel.org/all/20260210125348.2800846-2-swati.agarwal@oss.qualcomm.com/
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
…oller

Enable the tertiary usb controller connected to micro usb port in OTG mode
on Lemans EVK platform.

Link: https://lore.kernel.org/all/20260210125348.2800846-3-swati.agarwal@oss.qualcomm.com/
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
… controller

Add the "wakeup-source" property to the primary port controller node so its
interrupt can wake the system from low‑power states on lemans EVK
platform.

Link: https://lore.kernel.org/all/20260215183325.3836178-3-swati.agarwal@oss.qualcomm.com/
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Add devicetree changes to enable second Mobile Display Subsystem (mdss1),
Display Processing Unit(DPU), Display Port(DP) controllers and eDP PHYs
on the Qualcomm Lemans platform.

Signed-off-by: Mahadevan P <mahadevan.p@oss.qualcomm.com>
Signed-off-by: Mani Chandana Ballary Kuntumalla <quic_mkuntuma@quicinc.com>
Link: https://lore.kernel.org/all/20260217071420.2240380-2-mkuntuma@qti.qualcomm.com/
Signed-off-by: Yash Gupta <quic_ygupt@quicinc.com>
This change enables DP controllers, DPTX0 and DPTX1 alongside
their corresponding PHYs of mdss1 which corresponds to edp2
and edp3.

Signed-off-by: Mani Chandana Ballary Kuntumalla <quic_mkuntuma@quicinc.com>
Link: https://lore.kernel.org/all/20260217071420.2240380-3-mkuntuma@qti.qualcomm.com/
Signed-off-by: Yash Gupta <quic_ygupt@quicinc.com>
@qcomlnxci qcomlnxci requested a review from a team February 19, 2026 14:12
…-evk Mezzanine

LT9211c bridge and lvds panel node.
LT9211c is powered by default with reset gpio connected to 37.

Link: https://lore.kernel.org/lkml/20260219-enable-lvds-lemans-mezzanine-v1-1-9cb2075f7c18@oss.qualcomm.com/
Signed-off-by: Gopi Botlagunta <venkata.botlagunta@oss.qualcomm.com>
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lgtm

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