mce2vga

FPGA MDA/CGA/EGA to VGA Converter

Info about this project can be found here:

Name		Name	Last commit message	Last commit date
Latest commit History 38 Commits
greybox_tmp		greybox_tmp
output_files		output_files
resources		resources
.gitattributes		.gitattributes
.gitignore		.gitignore
LICENSE		LICENSE
MCE2VGA.qpf		MCE2VGA.qpf
PLLJ_PLLSPE_INFO.txt		PLLJ_PLLSPE_INFO.txt
README.md		README.md
cga_genlock.bsf		cga_genlock.bsf
cga_genlock.vhd		cga_genlock.vhd
ctrl_params.bsf		ctrl_params.bsf
ctrl_params.vhd		ctrl_params.vhd
dual_ram_in.bsf		dual_ram_in.bsf
dual_ram_in.vhd		dual_ram_in.vhd
dual_ram_out.bsf		dual_ram_out.bsf
dual_ram_out.vhd		dual_ram_out.vhd
ega_genlock.bsf		ega_genlock.bsf
ega_genlock.vhd		ega_genlock.vhd
hgc_genlock.bsf		hgc_genlock.bsf
hgc_genlock.vhd		hgc_genlock.vhd
mce2vga.cdf		mce2vga.cdf
mce2vga.ipregen.rpt		mce2vga.ipregen.rpt
mce2vga.qsf		mce2vga.qsf
mce2vga.qws		mce2vga.qws
mce2vga.sdc		mce2vga.sdc
mce2vga_assignment_defaults.qdf		mce2vga_assignment_defaults.qdf
mda_genlock.bsf		mda_genlock.bsf
mda_genlock.vhd		mda_genlock.vhd
mda_genlock_inst.v		mda_genlock_inst.v
osd_rom.bsf		osd_rom.bsf
osd_rom.vhd		osd_rom.vhd
pll1.bsf		pll1.bsf
pll1.cmp		pll1.cmp
pll1.ppf		pll1.ppf
pll1.qip		pll1.qip
pll1.vhd		pll1.vhd
pll2.bsf		pll2.bsf
pll2.cmp		pll2.cmp
pll2.ppf		pll2.ppf
pll2.qip		pll2.qip
pll2.vhd		pll2.vhd
ram_in.bsf		ram_in.bsf
ram_in.qip		ram_in.qip
ram_in.v		ram_in.v
ram_in_bb.v		ram_in_bb.v
ram_out.bsf		ram_out.bsf
ram_out.qip		ram_out.qip
ram_out.v		ram_out.v
ram_out_bb.v		ram_out_bb.v
schematic.bdf		schematic.bdf
sram.bsf		sram.bsf
sram.vhd		sram.vhd
sync_level.bsf		sync_level.bsf
sync_level.vhd		sync_level.vhd
vga_video.bsf		vga_video.bsf
vga_video.vhd		vga_video.vhd

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