Author: Martin Schoeberl (martin@jopdesign.com)

This is a minimum build environment to start with Chisel.
The example is a blinking LED in an FPGA - The hardware version of "Hello World"

The Chisel tutorial provides a framework with exercises and a lot
of automation to get started with Chisel examples. However, this
automation makes it hard to see how the individual pieces fit together.
Therefore, this is a try to cut it down to the minimum.

The example project consists of:

   src/main/scala/Hello.scala The source of the hardware description of a blinking LED
   Makefile               drives the build process
   build.sbt              Configuration to download Chisel and for the Chisel project
   verilog/hello_top.v    is a top level file for the FPGA
   quartus/altde0         Altera Quartus project files for the DE0 board
   quartus/altde1         Altera Quartus project files for the DE1 board
   quartus/bemicro        Altera Quartus project files for the BeMicro board
   quartus/bemicro_cv_a9  Altera Quartus project files for the new BeMicro board
   quartus/altde2-115     Altera Quartus project files for the DE2-115 board

Remarks and comments are distributed over the individual files.

HOWTO:

1.) make
2.) Open the project file in Quartus
2.a.) Compile with the play button
2.b.) Configure the FPGA with the programmer