Add Orange Pi Zero 3 pin mappings

[sigmondkukla]

Orange Pi Zero 3 pin mappings are confirmed to be the same as Zero 2, despite the processor version bump from H616 to H618. Added pin mappings in separate file.
Tested with the same procedure as @sillo01 on my new Zero 3 board:

# Tested pin by pin with a led
for pin in BOARD.keys():
    print(f'Testing pin {pin}.')
    GPIO.output(pin, GPIO.HIGH)
    input("Continue.")
    GPIO.output(pin, GPIO.LOW)

[mamin27]

Thanks for your work. I hope the quick code adoption.

[BorretSquared]

will review when I get the time to, just got my OPI Zero 3. Would a simple motor test with the pins be enough or do you recommend more?

[erelson]

Based on the nifty built-in gpio command in a terminal (with Ubuntu 20.04 on an OrangePi Zero 3)

orangepi@orangepizero3:~$ gpio readall
 +------+-----+----------+--------+---+   H616   +---+--------+----------+-----+------+
 | GPIO | wPi |   Name   |  Mode  | V | Physical | V |  Mode  | Name     | wPi | GPIO |
 +------+-----+----------+--------+---+----++----+---+--------+----------+-----+------+
 |      |     |     3.3V |        |   |  1 || 2  |   |        | 5V       |     |      |
 |  229 |   0 |    SDA.3 |    OFF | 0 |  3 || 4  |   |        | 5V       |     |      |
 |  228 |   1 |    SCL.3 |    OFF | 0 |  5 || 6  |   |        | GND      |     |      |
 |   73 |   2 |      PC9 |    OFF | 0 |  7 || 8  | 0 | OFF    | TXD.5    | 3   | 226  |
 |      |     |      GND |        |   |  9 || 10 | 0 | OFF    | RXD.5    | 4   | 227  |
 |   70 |   5 |      PC6 |   ALT5 | 0 | 11 || 12 | 0 | OFF    | PC11     | 6   | 75   |
 |   69 |   7 |      PC5 |   ALT5 | 0 | 13 || 14 |   |        | GND      |     |      |
 |   72 |   8 |      PC8 |     IN | 0 | 15 || 16 | 0 | OFF    | PC15     | 9   | 79   |
 |      |     |     3.3V |        |   | 17 || 18 | 0 | OFF    | PC14     | 10  | 78   |
 |  231 |  11 |   MOSI.1 |    OFF | 0 | 19 || 20 |   |        | GND      |     |      |
 |  232 |  12 |   MISO.1 |    OFF | 0 | 21 || 22 | 0 | OFF    | PC7      | 13  | 71   |
 |  230 |  14 |   SCLK.1 |    OFF | 0 | 23 || 24 | 0 | ALT3   | CE.1     | 15  | 233  |
 |      |     |      GND |        |   | 25 || 26 | 0 | OFF    | PC10     | 16  | 74   |
 |   65 |  17 |      PC1 |    OFF | 0 | 27 || 28 |   |        |          |     |      |
 |  272 |  18 |     PI16 |    OFF | 0 | 29 || 30 |   |        |          |     |      |
 |  262 |  19 |      PI6 |    OFF | 0 | 31 || 32 |   |        |          |     |      |
 |  234 |  20 |     PH10 |   ALT3 | 0 | 33 || 34 |   |        |          |     |      |
 +------+-----+----------+--------+---+----++----+---+--------+----------+-----+------+
 | GPIO | wPi |   Name   |  Mode  | V | Physical | V |  Mode  | Name     | wPi | GPIO |
 +------+-----+----------+--------+---+   H616   +---+--------+----------+-----+------+

I also came up with the same mapping this morning. Additionally, the single row of headers has a few more pins that could/should be included I think?

        27: 65,  # PC1
        29: 272,  # PI16
        31: 262,  # PI6
        33: 234,  # PH10