target/riscv: do not cache access to vxrm, vxsat and vcsr#20
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target/riscv: do not cache access to vxrm, vxsat and vcsr#20
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Based On: https://review.openocd.org/c/openocd/+/9416/2 vxrm and vxsat registers are mirrored in vcsr, so we can't cache any of them. Signed-off-by: Anatoly Parshintsev <anatoly.parshintsev@syntacore.com>
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Feb 2, 2026
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Based On: https://review.openocd.org/c/openocd/+/9416/2
vxrm and vxsat registers are mirrored in vcsr, so we can't cache any of them.