This project demonstrates a hardware-level Digital Password-Protected Locking System designed using combinational and sequential logic. The system validates a 4-bit binary input and manages access control without the use of microcontrollers.
📌 Project Features
4-Bit Binary Verification: Uses D Flip-Flops and XOR-based comparison logic to verify user input.
Attempt Counter: Tracks incorrect entries using a sequential counter.
Security Lockout: Automatically and permanently locks the system after three consecutive failed attempts.
Visual Feedback: - 7-Segment Display: Shows the number of remaining attempts.
LED Indicators: Green for "Access Granted," Red for "Incorrect," and a dedicated Lock LED.
Manual Reset: A global reset function to clear the counter and flip-flops.
🛠 Hardware Logic & Components
The system is built entirely on digital electronics principles:
D Flip-Flops: Captures and holds the 4-bit input sequence.
Logic Gates (XOR, AND, OR, NOT): XOR gates perform bit-by-bit equality checks between the input and the hardcoded password.
Comparators: Detects the "3-failed attempts" state to trigger the permanent lock.
7-Segment Decoder: Converts the counter state into a human-readable "remaining attempts" digit.
⚙️ How It Works
Input: The user sets a 4-bit code via manual switches.
Validation: XOR gates check if the input matches the predefined password.
Outcome:
Match: Green LED activates; access is granted.
Mismatch: Red LED flashes, the attempt counter increases, and the 7-segment display updates.
Lockout: Once the counter hits 3, a comparator disables the input path and lights the "Permanent Lock" LED.
📂 Repository Contents
Digital_Password_Protected_Locking_System.pdf: Full technical report and circuit design details.
.circ: Circuit diagrams and logic gate configurations.
Author
Yusuf Taha ÖNCÜ